1 //===-- Mips16InstrInfo.h - Mips16 Instruction Information ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips16 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPS16INSTRUCTIONINFO_H
15 #define MIPS16INSTRUCTIONINFO_H
17 #include "Mips16RegisterInfo.h"
18 #include "MipsInstrInfo.h"
22 class Mips16InstrInfo : public MipsInstrInfo {
23 const Mips16RegisterInfo RI;
26 explicit Mips16InstrInfo(MipsTargetMachine &TM);
28 virtual const MipsRegisterInfo &getRegisterInfo() const;
30 /// isLoadFromStackSlot - If the specified machine instruction is a direct
31 /// load from a stack slot, return the virtual or physical register number of
32 /// the destination along with the FrameIndex of the loaded stack slot. If
33 /// not, return 0. This predicate must return 0 if the instruction has
34 /// any side effects other than loading from the stack slot.
35 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
36 int &FrameIndex) const;
38 /// isStoreToStackSlot - If the specified machine instruction is a direct
39 /// store to a stack slot, return the virtual or physical register number of
40 /// the source reg along with the FrameIndex of the loaded stack slot. If
41 /// not, return 0. This predicate must return 0 if the instruction has
42 /// any side effects other than storing to the stack slot.
43 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
44 int &FrameIndex) const;
46 virtual void copyPhysReg(MachineBasicBlock &MBB,
47 MachineBasicBlock::iterator MI, DebugLoc DL,
48 unsigned DestReg, unsigned SrcReg,
51 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
52 MachineBasicBlock::iterator MBBI,
53 unsigned SrcReg, bool isKill, int FrameIndex,
54 const TargetRegisterClass *RC,
55 const TargetRegisterInfo *TRI) const;
57 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
58 MachineBasicBlock::iterator MBBI,
59 unsigned DestReg, int FrameIndex,
60 const TargetRegisterClass *RC,
61 const TargetRegisterInfo *TRI) const;
63 virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const;
65 virtual unsigned GetOppositeBranchOpc(unsigned Opc) const;
67 // Adjust SP by FrameSize bytes. Save RA, S0, S1
68 void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
69 MachineBasicBlock::iterator I) const;
71 // Adjust SP by FrameSize bytes. Restore RA, S0, S1
72 void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
73 MachineBasicBlock::iterator I) const;
76 /// Adjust SP by Amount bytes.
77 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
78 MachineBasicBlock::iterator I) const;
80 /// Emit a series of instructions to load an immediate.
81 // This is to adjust some FrameReg. We return the new register to be used
82 // in place of FrameReg and the adjusted immediate field (&NewImm)
84 unsigned loadImmediate(unsigned FrameReg,
85 int64_t Imm, MachineBasicBlock &MBB,
86 MachineBasicBlock::iterator II, DebugLoc DL,
87 unsigned &NewImm) const;
89 static bool validSpImm8(int offset) {
90 return ((offset & 7) == 0) && isInt<11>(offset);
94 // build the proper one based on the Imm field
97 const MCInstrDesc& AddiuSpImm(int64_t Imm) const;
100 (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const;
103 virtual unsigned GetAnalyzableBrOpc(unsigned Opc) const;
105 void ExpandRetRA16(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
108 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
109 void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
110 MachineBasicBlock::iterator I,
111 unsigned Reg1, unsigned Reg2) const;
113 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
114 void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount,
115 MachineBasicBlock &MBB,
116 MachineBasicBlock::iterator I) const;