1 //===- Mips16InstrInfo.td - Target Description for Mips16 -*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips16 instructions.
12 //===----------------------------------------------------------------------===//
14 class Mips16Pat<dag pattern, dag result> : Pat<pattern, result> {
15 let Predicates = [InMips16Mode];
19 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1,
20 hasExtraSrcRegAllocReq = 1 in
21 def RetRA16 : MipsPseudo16<(outs), (ins), "", [(MipsRet)]>;
23 def LI16E : FEXT_RI16<0b01101, (outs CPU16Regs:$rx),
25 !strconcat("li", "\t$rx, $amt"),
26 [(set CPU16Regs:$rx, immZExt16:$amt )],IILoad>;
28 let isReturn=1, isTerminator=1, hasDelaySlot=1, isCodeGenOnly=1,
29 isBarrier=1, hasCtrlDep=1, rx=0 in
30 def RET16 : FRR16_JALRC
31 <0,0,0, (outs), (ins CPURAReg:$target), "jr\t$target", [], IIBranch>;
33 // As stack alignment is always done with addiu, we need a 16-bit immediate
34 let Defs = [SP], Uses = [SP] in {
35 def ADJCALLSTACKDOWN16 : MipsPseudo16<(outs), (ins uimm16:$amt),
36 "!ADJCALLSTACKDOWN $amt",
37 [(callseq_start timm:$amt)]>;
38 def ADJCALLSTACKUP16 : MipsPseudo16<(outs), (ins uimm16:$amt1, uimm16:$amt2),
39 "!ADJCALLSTACKUP $amt1",
40 [(callseq_end timm:$amt1, timm:$amt2)]>;
44 // Jump and Link (Call)
45 let isCall=1, hasDelaySlot=1 in
47 FRR16_JALRC<0, 0, 0, (outs), (ins CPU16Regs:$rs),
48 "jalr \t$rs", [(MipsJmpLink CPU16Regs:$rs)], IIBranch>;
52 def : Mips16Pat<(i32 immZExt16:$in), (LI16E immZExt16:$in)>;