1 //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information -== ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MIPS16 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "Mips16RegisterInfo.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsAnalyzeImmediate.h"
18 #include "MipsInstrInfo.h"
19 #include "MipsMachineFunction.h"
20 #include "MipsSubtarget.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/ValueTypes.h"
27 #include "llvm/Constants.h"
28 #include "llvm/DebugInfo.h"
29 #include "llvm/Function.h"
30 #include "llvm/Support/CommandLine.h"
31 #include "llvm/Support/Debug.h"
32 #include "llvm/Support/ErrorHandling.h"
33 #include "llvm/Support/raw_ostream.h"
34 #include "llvm/Target/TargetFrameLowering.h"
35 #include "llvm/Target/TargetInstrInfo.h"
36 #include "llvm/Target/TargetMachine.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Type.h"
42 Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST,
43 const Mips16InstrInfo &I)
44 : MipsRegisterInfo(ST), TII(I) {}
46 bool Mips16RegisterInfo::requiresRegisterScavenging
47 (const MachineFunction &MF) const {
50 bool Mips16RegisterInfo::requiresFrameIndexScavenging
51 (const MachineFunction &MF) const {
55 bool Mips16RegisterInfo::useFPForScavengingIndex
56 (const MachineFunction &MF) const {
60 bool Mips16RegisterInfo::saveScavengerRegister
61 (MachineBasicBlock &MBB,
62 MachineBasicBlock::iterator I,
63 MachineBasicBlock::iterator &UseMI,
64 const TargetRegisterClass *RC,
67 TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
68 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
72 // This function eliminate ADJCALLSTACKDOWN,
73 // ADJCALLSTACKUP pseudo instructions
74 void Mips16RegisterInfo::
75 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
76 MachineBasicBlock::iterator I) const {
77 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
79 if (!TFI->hasReservedCallFrame(MF)) {
80 int64_t Amount = I->getOperand(0).getImm();
82 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
85 const Mips16InstrInfo *II = static_cast<const Mips16InstrInfo*>(&TII);
87 II->adjustStackPtr(Mips::SP, Amount, MBB, I);
93 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
94 unsigned OpNo, int FrameIndex,
96 int64_t SPOffset) const {
97 MachineInstr &MI = *II;
98 MachineFunction &MF = *MI.getParent()->getParent();
99 MachineFrameInfo *MFI = MF.getFrameInfo();
101 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
106 MinCSFI = CSI[0].getFrameIdx();
107 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
110 // The following stack frame objects are always
111 // referenced relative to $sp:
112 // 1. Outgoing arguments.
113 // 2. Pointer to dynamically allocated stack space.
114 // 3. Locations for callee-saved registers.
115 // Everything else is referenced relative to whatever register
116 // getFrameRegister() returns.
119 if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
122 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
123 if (TFI->hasFP(MF)) {
127 if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg())
128 FrameReg = MI.getOperand(OpNo+2).getReg();
133 // Calculate final offset.
134 // - There is no need to change the offset if the frame object
136 // following: an outgoing argument, pointer to a dynamically allocated
137 // stack space or a $gp restore location,
138 // - If the frame object is any of the following,
139 // its offset must be adjusted
140 // by adding the size of the stack:
141 // incoming argument, callee-saved register location or local variable.
143 Offset = SPOffset + (int64_t)StackSize;
144 Offset += MI.getOperand(OpNo + 1).getImm();
147 DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n");
149 if (!MI.isDebugValue() && ( ((FrameReg != Mips::SP) && !isInt<16>(Offset)) ||
150 ((FrameReg == Mips::SP) && !isInt<15>(Offset)) )) {
151 llvm_unreachable("frame offset does not fit in instruction");
153 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false);
154 MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);