1 //=- Mips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips32r6 instruction formats.
12 //===----------------------------------------------------------------------===//
14 class MipsR6Inst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther>,
16 let DecoderNamespace = "Mips32r6_64r6";
17 let EncodingPredicates = [HasStdEnc];
20 //===----------------------------------------------------------------------===//
24 //===----------------------------------------------------------------------===//
26 class OPGROUP<bits<6> Val> {
29 def OPGROUP_COP1 : OPGROUP<0b010001>;
30 def OPGROUP_COP2 : OPGROUP<0b010010>;
31 def OPGROUP_ADDI : OPGROUP<0b001000>;
32 def OPGROUP_AUI : OPGROUP<0b001111>;
33 def OPGROUP_BLEZ : OPGROUP<0b000110>;
34 def OPGROUP_BGTZ : OPGROUP<0b000111>;
35 def OPGROUP_BLEZL : OPGROUP<0b010110>;
36 def OPGROUP_BGTZL : OPGROUP<0b010111>;
37 def OPGROUP_DADDI : OPGROUP<0b011000>;
38 def OPGROUP_DAUI : OPGROUP<0b011101>;
39 def OPGROUP_PCREL : OPGROUP<0b111011>;
40 def OPGROUP_REGIMM : OPGROUP<0b000001>;
41 def OPGROUP_SPECIAL : OPGROUP<0b000000>;
42 def OPGROUP_SPECIAL3 : OPGROUP<0b011111>;
44 class OPCODE2<bits<2> Val> {
47 def OPCODE2_ADDIUPC : OPCODE2<0b00>;
48 def OPCODE2_LWPC : OPCODE2<0b01>;
49 def OPCODE2_LWUPC : OPCODE2<0b10>;
51 class OPCODE3<bits<3> Val> {
54 def OPCODE3_LDPC : OPCODE3<0b110>;
56 class OPCODE5<bits<5> Val> {
59 def OPCODE5_ALUIPC : OPCODE5<0b11111>;
60 def OPCODE5_AUIPC : OPCODE5<0b11110>;
61 def OPCODE5_DAHI : OPCODE5<0b00110>;
62 def OPCODE5_DATI : OPCODE5<0b11110>;
63 def OPCODE5_BC1EQZ : OPCODE5<0b01001>;
64 def OPCODE5_BC1NEZ : OPCODE5<0b01101>;
65 def OPCODE5_BC2EQZ : OPCODE5<0b01001>;
66 def OPCODE5_BC2NEZ : OPCODE5<0b01101>;
67 def OPCODE5_BGEZAL : OPCODE5<0b10001>;
69 class OPCODE6<bits<6> Val> {
72 def OPCODE6_ALIGN : OPCODE6<0b100000>;
73 def OPCODE6_DALIGN : OPCODE6<0b100100>;
74 def OPCODE6_BITSWAP : OPCODE6<0b100000>;
75 def OPCODE6_DBITSWAP : OPCODE6<0b100100>;
76 def OPCODE6_JALR : OPCODE6<0b001001>;
78 class FIELD_FMT<bits<5> Val> {
81 def FIELD_FMT_S : FIELD_FMT<0b10000>;
82 def FIELD_FMT_D : FIELD_FMT<0b10001>;
84 class FIELD_CMP_COND<bits<5> Val> {
87 def FIELD_CMP_COND_F : FIELD_CMP_COND<0b00000>;
88 def FIELD_CMP_COND_UN : FIELD_CMP_COND<0b00001>;
89 def FIELD_CMP_COND_EQ : FIELD_CMP_COND<0b00010>;
90 def FIELD_CMP_COND_UEQ : FIELD_CMP_COND<0b00011>;
91 def FIELD_CMP_COND_OLT : FIELD_CMP_COND<0b00100>;
92 def FIELD_CMP_COND_ULT : FIELD_CMP_COND<0b00101>;
93 def FIELD_CMP_COND_OLE : FIELD_CMP_COND<0b00110>;
94 def FIELD_CMP_COND_ULE : FIELD_CMP_COND<0b00111>;
95 def FIELD_CMP_COND_SF : FIELD_CMP_COND<0b01000>;
96 def FIELD_CMP_COND_NGLE : FIELD_CMP_COND<0b01001>;
97 def FIELD_CMP_COND_SEQ : FIELD_CMP_COND<0b01010>;
98 def FIELD_CMP_COND_NGL : FIELD_CMP_COND<0b01011>;
99 def FIELD_CMP_COND_LT : FIELD_CMP_COND<0b01100>;
100 def FIELD_CMP_COND_NGE : FIELD_CMP_COND<0b01101>;
101 def FIELD_CMP_COND_LE : FIELD_CMP_COND<0b01110>;
102 def FIELD_CMP_COND_NGT : FIELD_CMP_COND<0b01111>;
104 class FIELD_CMP_FORMAT<bits<5> Val> {
107 def FIELD_CMP_FORMAT_S : FIELD_CMP_FORMAT<0b10100>;
108 def FIELD_CMP_FORMAT_D : FIELD_CMP_FORMAT<0b10101>;
110 //===----------------------------------------------------------------------===//
114 //===----------------------------------------------------------------------===//
116 // Some encodings are ambiguous except by comparing field values.
118 class DecodeDisambiguates<string Name> {
119 string DecoderMethod = !strconcat("Decode", Name);
122 class DecodeDisambiguatedBy<string Name> : DecodeDisambiguates<Name> {
123 string DecoderNamespace = "Mips32r6_64r6_Ambiguous";
126 //===----------------------------------------------------------------------===//
130 //===----------------------------------------------------------------------===//
132 class AUI_FM : MipsR6Inst {
139 let Inst{31-26} = OPGROUP_AUI.Value;
140 let Inst{25-21} = rs;
141 let Inst{20-16} = rt;
142 let Inst{15-0} = imm;
145 class DAUI_FM : AUI_FM {
146 let Inst{31-26} = OPGROUP_DAUI.Value;
149 class BAL_FM : MipsR6Inst {
154 let Inst{31-26} = OPGROUP_REGIMM.Value;
155 let Inst{25-21} = 0b00000;
156 let Inst{20-16} = OPCODE5_BGEZAL.Value;
157 let Inst{15-0} = offset;
160 class COP1_2R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
166 let Inst{31-26} = OPGROUP_COP1.Value;
167 let Inst{25-21} = Format.Value;
168 let Inst{20-16} = 0b00000;
169 let Inst{15-11} = fs;
171 let Inst{5-0} = funct;
174 class COP1_3R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
181 let Inst{31-26} = OPGROUP_COP1.Value;
182 let Inst{25-21} = Format.Value;
183 let Inst{20-16} = ft;
184 let Inst{15-11} = fs;
186 let Inst{5-0} = funct;
189 class COP1_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
195 let Inst{31-26} = OPGROUP_COP1.Value;
196 let Inst{25-21} = Operation.Value;
197 let Inst{20-16} = ft;
198 let Inst{15-0} = offset;
201 class COP2_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
207 let Inst{31-26} = OPGROUP_COP2.Value;
208 let Inst{25-21} = Operation.Value;
209 let Inst{20-16} = ct;
210 let Inst{15-0} = offset;
213 class PCREL16_FM<OPCODE5 Operation> : MipsR6Inst {
219 let Inst{31-26} = OPGROUP_PCREL.Value;
220 let Inst{25-21} = rs;
221 let Inst{20-16} = Operation.Value;
222 let Inst{15-0} = imm;
225 class PCREL19_FM<OPCODE2 Operation> : MipsR6Inst {
231 let Inst{31-26} = OPGROUP_PCREL.Value;
232 let Inst{25-21} = rs;
233 let Inst{20-19} = Operation.Value;
234 let Inst{18-0} = imm;
237 class PCREL18_FM<OPCODE3 Operation> : MipsR6Inst {
243 let Inst{31-26} = OPGROUP_PCREL.Value;
244 let Inst{25-21} = rs;
245 let Inst{20-18} = Operation.Value;
246 let Inst{17-0} = imm;
249 class SPECIAL3_2R_FM<OPCODE6 Operation> : MipsR6Inst {
255 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
256 let Inst{25-21} = 0b00000;
257 let Inst{20-16} = rt;
258 let Inst{15-11} = rd;
259 let Inst{10-6} = 0b00000;
260 let Inst{5-0} = Operation.Value;
263 class SPECIAL_3R_FM<bits<5> mulop, bits<6> funct> : MipsR6Inst {
270 let Inst{31-26} = OPGROUP_SPECIAL.Value;
271 let Inst{25-21} = rs;
272 let Inst{20-16} = rt;
273 let Inst{15-11} = rd;
274 let Inst{10-6} = mulop;
275 let Inst{5-0} = funct;
278 // This class is ambiguous with other branches:
279 // BEQC/BNEC require that rs > rt
280 class CMP_BRANCH_2R_OFF16_FM<OPGROUP funct> : MipsR6Inst {
287 let Inst{31-26} = funct.Value;
288 let Inst{25-21} = rs;
289 let Inst{20-16} = rt;
290 let Inst{15-0} = offset;
293 // This class is ambiguous with other branches:
294 // BLEZC/BGEZC/BEQZALC/BNEZALC/BGTZALC require that rs == 0 && rt != 0
295 // The '1R_RT' in the name means 1 register in the rt field.
296 class CMP_BRANCH_1R_RT_OFF16_FM<OPGROUP funct> : MipsR6Inst {
302 let Inst{31-26} = funct.Value;
303 let Inst{25-21} = 0b00000;
304 let Inst{20-16} = rt;
305 let Inst{15-0} = offset;
308 // This class is ambiguous with other branches:
309 // BLTZC/BGTZC/BLTZALC/BGEZALC require that rs == rt && rt != 0
310 // The '1R_BOTH' in the name means 1 register in both the rs and rt fields.
311 class CMP_BRANCH_1R_BOTH_OFF16_FM<OPGROUP funct> : MipsR6Inst {
317 let Inst{31-26} = funct.Value;
318 let Inst{25-21} = rt;
319 let Inst{20-16} = rt;
320 let Inst{15-0} = offset;
323 class CMP_BRANCH_OFF21_FM<bits<6> funct> : MipsR6Inst {
324 bits<5> rs; // rs != 0
329 let Inst{31-26} = funct;
330 let Inst{25-21} = rs;
331 let Inst{20-0} = offset;
334 class JMP_IDX_COMPACT_FM<bits<6> funct> : MipsR6Inst {
340 let Inst{31-26} = funct;
341 let Inst{25-21} = 0b000000;
342 let Inst{20-16} = rt;
343 let Inst{15-0} = offset;
346 class BRANCH_OFF26_FM<bits<6> funct> : MipsR6Inst {
350 let Inst{31-26} = funct;
351 let Inst{25-0} = offset;
354 class SPECIAL3_ALIGN_FM<OPCODE6 Operation> : MipsR6Inst {
362 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
363 let Inst{25-21} = rs;
364 let Inst{20-16} = rt;
365 let Inst{15-11} = rd;
366 let Inst{10-8} = 0b010;
368 let Inst{5-0} = Operation.Value;
371 class SPECIAL3_DALIGN_FM<OPCODE6 Operation> : MipsR6Inst {
379 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
380 let Inst{25-21} = rs;
381 let Inst{20-16} = rt;
382 let Inst{15-11} = rd;
383 let Inst{10-9} = 0b01;
385 let Inst{5-0} = Operation.Value;
388 class REGIMM_FM<OPCODE5 Operation> : MipsR6Inst {
394 let Inst{31-26} = OPGROUP_REGIMM.Value;
395 let Inst{25-21} = rs;
396 let Inst{20-16} = Operation.Value;
397 let Inst{15-0} = imm;
400 class COP1_CMP_CONDN_FM<FIELD_CMP_FORMAT Format,
401 FIELD_CMP_COND Cond> : MipsR6Inst {
408 let Inst{31-26} = OPGROUP_COP1.Value;
409 let Inst{25-21} = Format.Value;
410 let Inst{20-16} = ft;
411 let Inst{15-11} = fs;
414 let Inst{4-0} = Cond.Value;
417 class JR_HB_R6_FM<OPCODE6 Operation> : MipsR6Inst {
422 let Inst{31-26} = OPGROUP_SPECIAL.Value;
423 let Inst{25-21} = rs;
428 let Inst{5-0} = Operation.Value;