1 //===-- MipsAsmPrinter.cpp - Mips LLVM assembly writer --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format MIPS assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "mips-asm-printer"
17 #include "MipsSubtarget.h"
18 #include "MipsInstrInfo.h"
19 #include "MipsTargetMachine.h"
20 #include "MipsMachineFunction.h"
21 #include "llvm/BasicBlock.h"
22 #include "llvm/Instructions.h"
23 #include "llvm/CodeGen/AsmPrinter.h"
24 #include "llvm/CodeGen/MachineFunctionPass.h"
25 #include "llvm/CodeGen/MachineConstantPool.h"
26 #include "llvm/CodeGen/MachineFrameInfo.h"
27 #include "llvm/CodeGen/MachineInstr.h"
28 #include "llvm/MC/MCStreamer.h"
29 #include "llvm/MC/MCAsmInfo.h"
30 #include "llvm/MC/MCSymbol.h"
31 #include "llvm/Target/Mangler.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetLoweringObjectFile.h"
34 #include "llvm/Target/TargetMachine.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetRegistry.h"
37 #include "llvm/ADT/SmallString.h"
38 #include "llvm/ADT/StringExtras.h"
39 #include "llvm/ADT/Twine.h"
40 #include "llvm/Support/raw_ostream.h"
44 class MipsAsmPrinter : public AsmPrinter {
45 const MipsSubtarget *Subtarget;
47 explicit MipsAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
48 : AsmPrinter(TM, Streamer) {
49 Subtarget = &TM.getSubtarget<MipsSubtarget>();
52 virtual const char *getPassName() const {
53 return "Mips Assembly Printer";
56 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
57 unsigned AsmVariant, const char *ExtraCode,
59 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
60 void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
61 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
62 const char *Modifier = 0);
63 void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
64 const char *Modifier = 0);
65 void printSavedRegsBitmask(raw_ostream &O);
66 void printHex32(unsigned int Value, raw_ostream &O);
68 const char *getCurrentABIString() const;
69 void emitFrameDirective();
71 void printInstruction(const MachineInstr *MI, raw_ostream &O); // autogen'd.
72 void EmitInstruction(const MachineInstr *MI) {
74 raw_svector_ostream OS(Str);
75 printInstruction(MI, OS);
76 OutStreamer.EmitRawText(OS.str());
78 virtual void EmitFunctionBodyStart();
79 virtual void EmitFunctionBodyEnd();
80 virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const;
81 static const char *getRegisterName(unsigned RegNo);
83 virtual void EmitFunctionEntryLabel();
84 void EmitStartOfAsmFile(Module &M);
86 } // end of anonymous namespace
88 #include "MipsGenAsmWriter.inc"
90 //===----------------------------------------------------------------------===//
92 // Mips Asm Directives
94 // -- Frame directive "frame Stackpointer, Stacksize, RARegister"
95 // Describe the stack frame.
97 // -- Mask directives "(f)mask bitmask, offset"
98 // Tells the assembler which registers are saved and where.
99 // bitmask - contain a little endian bitset indicating which registers are
100 // saved on function prologue (e.g. with a 0x80000000 mask, the
101 // assembler knows the register 31 (RA) is saved at prologue.
102 // offset - the position before stack pointer subtraction indicating where
103 // the first saved register on prologue is located. (e.g. with a
105 // Consider the following function prologue:
108 // .mask 0xc0000000,-8
109 // addiu $sp, $sp, -48
113 // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
114 // 30 (FP) are saved at prologue. As the save order on prologue is from
115 // left to right, RA is saved first. A -8 offset means that after the
116 // stack pointer subtration, the first register in the mask (RA) will be
117 // saved at address 48-8=40.
119 //===----------------------------------------------------------------------===//
121 //===----------------------------------------------------------------------===//
123 //===----------------------------------------------------------------------===//
125 // Create a bitmask with all callee saved registers for CPU or Floating Point
126 // registers. For CPU registers consider RA, GP and FP for saving if necessary.
127 void MipsAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
128 const TargetFrameLowering *TFI = TM.getFrameLowering();
129 const TargetRegisterInfo *RI = TM.getRegisterInfo();
130 const MipsFunctionInfo *MipsFI = MF->getInfo<MipsFunctionInfo>();
132 // CPU and FPU Saved Registers Bitmasks
133 unsigned int CPUBitmask = 0;
134 unsigned int FPUBitmask = 0;
136 // Set the CPU and FPU Bitmasks
137 const MachineFrameInfo *MFI = MF->getFrameInfo();
138 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
139 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
140 unsigned Reg = CSI[i].getReg();
141 unsigned RegNum = MipsRegisterInfo::getRegisterNumbering(Reg);
142 if (Mips::CPURegsRegisterClass->contains(Reg))
143 CPUBitmask |= (1 << RegNum);
145 FPUBitmask |= (1 << RegNum);
148 // Return Address and Frame registers must also be set in CPUBitmask.
149 // FIXME: Do we really need hasFP() call here? When no FP is present SP is
150 // just returned -- will it be ok?
152 CPUBitmask |= (1 << MipsRegisterInfo::
153 getRegisterNumbering(RI->getFrameRegister(*MF)));
155 if (MFI->adjustsStack())
156 CPUBitmask |= (1 << MipsRegisterInfo::
157 getRegisterNumbering(RI->getRARegister()));
160 O << "\t.mask \t"; printHex32(CPUBitmask, O);
161 O << ',' << MipsFI->getCPUTopSavedRegOff() << '\n';
164 O << "\t.fmask\t"; printHex32(FPUBitmask, O); O << ","
165 << MipsFI->getFPUTopSavedRegOff() << '\n';
168 // Print a 32 bit hex number with all numbers.
169 void MipsAsmPrinter::printHex32(unsigned Value, raw_ostream &O) {
171 for (int i = 7; i >= 0; i--)
172 O << utohexstr((Value & (0xF << (i*4))) >> (i*4));
175 //===----------------------------------------------------------------------===//
176 // Frame and Set directives
177 //===----------------------------------------------------------------------===//
180 void MipsAsmPrinter::emitFrameDirective() {
181 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
183 unsigned stackReg = RI.getFrameRegister(*MF);
184 unsigned returnReg = RI.getRARegister();
185 unsigned stackSize = MF->getFrameInfo()->getStackSize();
187 OutStreamer.EmitRawText("\t.frame\t$" +
188 Twine(LowercaseString(getRegisterName(stackReg))) +
189 "," + Twine(stackSize) + ",$" +
190 Twine(LowercaseString(getRegisterName(returnReg))));
193 /// Emit Set directives.
194 const char *MipsAsmPrinter::getCurrentABIString() const {
195 switch (Subtarget->getTargetABI()) {
196 case MipsSubtarget::O32: return "abi32";
197 case MipsSubtarget::O64: return "abiO64";
198 case MipsSubtarget::N32: return "abiN32";
199 case MipsSubtarget::N64: return "abi64";
200 case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
204 llvm_unreachable("Unknown Mips ABI");
208 void MipsAsmPrinter::EmitFunctionEntryLabel() {
209 OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
210 OutStreamer.EmitLabel(CurrentFnSym);
213 /// EmitFunctionBodyStart - Targets can override this to emit stuff before
214 /// the first basic block in the function.
215 void MipsAsmPrinter::EmitFunctionBodyStart() {
216 emitFrameDirective();
218 SmallString<128> Str;
219 raw_svector_ostream OS(Str);
220 printSavedRegsBitmask(OS);
221 OutStreamer.EmitRawText(OS.str());
224 /// EmitFunctionBodyEnd - Targets can override this to emit stuff after
225 /// the last basic block in the function.
226 void MipsAsmPrinter::EmitFunctionBodyEnd() {
227 // There are instruction for this macros, but they must
228 // always be at the function end, and we can't emit and
229 // break with BB logic.
230 OutStreamer.EmitRawText(StringRef("\t.set\tmacro"));
231 OutStreamer.EmitRawText(StringRef("\t.set\treorder"));
232 OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
236 /// isBlockOnlyReachableByFallthough - Return true if the basic block has
237 /// exactly one predecessor and the control transfer mechanism between
238 /// the predecessor and this block is a fall-through.
239 bool MipsAsmPrinter::isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB)
241 // The predecessor has to be immediately before this block.
242 const MachineBasicBlock *Pred = *MBB->pred_begin();
244 // If the predecessor is a switch statement, assume a jump table
245 // implementation, so it is not a fall through.
246 if (const BasicBlock *bb = Pred->getBasicBlock())
247 if (isa<SwitchInst>(bb->getTerminator()))
250 return AsmPrinter::isBlockOnlyReachableByFallthrough(MBB);
253 // Print out an operand for an inline asm expression.
254 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
255 unsigned AsmVariant,const char *ExtraCode,
257 // Does this asm operand have a single letter operand modifier?
258 if (ExtraCode && ExtraCode[0])
259 return true; // Unknown modifier.
261 printOperand(MI, OpNo, O);
265 void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
267 const MachineOperand &MO = MI->getOperand(opNum);
270 if (MO.getTargetFlags())
273 switch(MO.getTargetFlags()) {
274 case MipsII::MO_GPREL: O << "%gp_rel("; break;
275 case MipsII::MO_GOT_CALL: O << "%call16("; break;
276 case MipsII::MO_GOT: {
277 const MachineOperand &LastMO = MI->getOperand(opNum-1);
278 bool LastMOIsGP = LastMO.getType() == MachineOperand::MO_Register
279 && LastMO.getReg() == Mips::GP;
280 if (MI->getOpcode() == Mips::LW || LastMOIsGP)
286 case MipsII::MO_ABS_HILO:
287 if (MI->getOpcode() == Mips::LUi)
294 switch (MO.getType()) {
295 case MachineOperand::MO_Register:
296 O << '$' << LowercaseString(getRegisterName(MO.getReg()));
299 case MachineOperand::MO_Immediate:
300 O << (short int)MO.getImm();
303 case MachineOperand::MO_MachineBasicBlock:
304 O << *MO.getMBB()->getSymbol();
307 case MachineOperand::MO_GlobalAddress:
308 O << *Mang->getSymbol(MO.getGlobal());
311 case MachineOperand::MO_BlockAddress: {
312 MCSymbol* BA = GetBlockAddressSymbol(MO.getBlockAddress());
317 case MachineOperand::MO_ExternalSymbol:
318 O << *GetExternalSymbolSymbol(MO.getSymbolName());
321 case MachineOperand::MO_JumpTableIndex:
322 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
323 << '_' << MO.getIndex();
326 case MachineOperand::MO_ConstantPoolIndex:
327 O << MAI->getPrivateGlobalPrefix() << "CPI"
328 << getFunctionNumber() << "_" << MO.getIndex();
330 O << "+" << MO.getOffset();
334 llvm_unreachable("<unknown operand type>");
337 if (closeP) O << ")";
340 void MipsAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,
342 const MachineOperand &MO = MI->getOperand(opNum);
344 O << (unsigned short int)MO.getImm();
346 printOperand(MI, opNum, O);
349 void MipsAsmPrinter::
350 printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
351 const char *Modifier) {
352 // when using stack locations for not load/store instructions
353 // print the same way as all normal 3 operand instructions.
354 if (Modifier && !strcmp(Modifier, "stackloc")) {
355 printOperand(MI, opNum+1, O);
357 printOperand(MI, opNum, O);
361 // Load/Store memory operands -- imm($reg)
362 // If PIC target the target is loaded as the
363 // pattern lw $25,%call16($28)
364 printOperand(MI, opNum, O);
366 printOperand(MI, opNum+1, O);
370 void MipsAsmPrinter::
371 printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
372 const char *Modifier) {
373 const MachineOperand& MO = MI->getOperand(opNum);
374 O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
377 void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
378 // FIXME: Use SwitchSection.
380 // Tell the assembler which ABI we are using
381 OutStreamer.EmitRawText("\t.section .mdebug." + Twine(getCurrentABIString()));
383 // TODO: handle O64 ABI
384 if (Subtarget->isABI_EABI()) {
385 if (Subtarget->isGP32bit())
386 OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long32"));
388 OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long64"));
391 // return to previous section
392 OutStreamer.EmitRawText(StringRef("\t.previous"));
395 // Force static initialization.
396 extern "C" void LLVMInitializeMipsAsmPrinter() {
397 RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
398 RegisterAsmPrinter<MipsAsmPrinter> Y(TheMipselTarget);