1 //===-- Mips/MipsCodeEmitter.cpp - Convert Mips Code to Machine Code ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Mips machine instructions
11 // into relocatable machine code.
13 //===---------------------------------------------------------------------===//
16 #include "MCTargetDesc/MipsBaseInfo.h"
17 #include "MipsInstrInfo.h"
18 #include "MipsRelocations.h"
19 #include "MipsSubtarget.h"
20 #include "MipsTargetMachine.h"
21 #include "llvm/ADT/Statistic.h"
22 #include "llvm/CodeGen/JITCodeEmitter.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFunctionPass.h"
25 #include "llvm/CodeGen/MachineInstr.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/CodeGen/MachineJumpTableInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/MachineOperand.h"
30 #include "llvm/CodeGen/Passes.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DerivedTypes.h"
33 #include "llvm/PassManager.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/raw_ostream.h"
43 #define DEBUG_TYPE "jit"
45 STATISTIC(NumEmitted, "Number of machine instructions emitted");
49 class MipsCodeEmitter : public MachineFunctionPass {
51 const MipsInstrInfo *II;
53 const MipsSubtarget *Subtarget;
56 const std::vector<MachineConstantPoolEntry> *MCPEs;
57 const std::vector<MachineJumpTableEntry> *MJTEs;
60 void getAnalysisUsage(AnalysisUsage &AU) const override {
61 AU.addRequired<MachineModuleInfo> ();
62 MachineFunctionPass::getAnalysisUsage(AU);
68 MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
69 : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr),
70 TM(tm), MCE(mce), MCPEs(nullptr), MJTEs(nullptr),
71 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
73 bool runOnMachineFunction(MachineFunction &MF) override;
75 const char *getPassName() const override {
76 return "Mips Machine Code Emitter";
79 /// getBinaryCodeForInstr - This function, generated by the
80 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
81 /// machine instructions.
82 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
84 void emitInstruction(MachineBasicBlock::instr_iterator MI,
85 MachineBasicBlock &MBB);
89 void emitWord(unsigned Word);
91 /// Routines that handle operands which add machine relocations which are
92 /// fixed up by the relocation stage.
93 void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
94 bool MayNeedFarStub) const;
95 void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
96 void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
97 void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const;
98 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const;
100 /// getMachineOpValue - Return binary encoding of operand. If the machine
101 /// operand requires relocation, record the relocation and return zero.
102 unsigned getMachineOpValue(const MachineInstr &MI,
103 const MachineOperand &MO) const;
105 unsigned getRelocation(const MachineInstr &MI,
106 const MachineOperand &MO) const;
108 unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
109 unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const;
110 unsigned getBranchTargetOpValueMM(const MachineInstr &MI,
111 unsigned OpNo) const;
113 unsigned getBranchTarget21OpValue(const MachineInstr &MI,
114 unsigned OpNo) const;
115 unsigned getBranchTarget26OpValue(const MachineInstr &MI,
116 unsigned OpNo) const;
117 unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const;
119 unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
120 unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
121 unsigned getMemEncodingMMImm12(const MachineInstr &MI, unsigned OpNo) const;
122 unsigned getMSAMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
123 unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const;
124 unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
125 unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const;
126 unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const;
127 unsigned getSimm18Lsl3Encoding(const MachineInstr &MI, unsigned OpNo) const;
129 /// Expand pseudo instructions with accumulator register operands.
130 void expandACCInstr(MachineBasicBlock::instr_iterator MI,
131 MachineBasicBlock &MBB, unsigned Opc) const;
133 /// \brief Expand pseudo instruction. Return true if MI was expanded.
134 bool expandPseudos(MachineBasicBlock::instr_iterator &MI,
135 MachineBasicBlock &MBB) const;
139 char MipsCodeEmitter::ID = 0;
141 bool MipsCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
142 MipsTargetMachine &Target = static_cast<MipsTargetMachine &>(
143 const_cast<TargetMachine &>(MF.getTarget()));
145 JTI = Target.getJITInfo();
146 II = Target.getInstrInfo();
147 TD = Target.getDataLayout();
148 Subtarget = &TM.getSubtarget<MipsSubtarget> ();
149 MCPEs = &MF.getConstantPool()->getConstants();
151 if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables();
152 JTI->Initialize(MF, IsPIC, Subtarget->isLittle());
153 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
156 DEBUG(errs() << "JITTing function '"
157 << MF.getName() << "'\n");
158 MCE.startFunction(MF);
160 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
162 MCE.StartMachineBasicBlock(MBB);
163 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
164 E = MBB->instr_end(); I != E;)
165 emitInstruction(*I++, *MBB);
167 } while (MCE.finishFunction(MF));
172 unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI,
173 const MachineOperand &MO) const {
174 // NOTE: This relocations are for static.
175 uint64_t TSFlags = MI.getDesc().TSFlags;
176 uint64_t Form = TSFlags & MipsII::FormMask;
177 if (Form == MipsII::FrmJ)
178 return Mips::reloc_mips_26;
179 if ((Form == MipsII::FrmI || Form == MipsII::FrmFI)
181 return Mips::reloc_mips_pc16;
182 if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi)
183 return Mips::reloc_mips_hi;
184 return Mips::reloc_mips_lo;
187 unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI,
188 unsigned OpNo) const {
189 MachineOperand MO = MI.getOperand(OpNo);
191 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
192 else if (MO.isSymbol())
193 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
195 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
197 llvm_unreachable("Unexpected jump target operand kind.");
201 unsigned MipsCodeEmitter::getJumpTargetOpValueMM(const MachineInstr &MI,
202 unsigned OpNo) const {
203 llvm_unreachable("Unimplemented function.");
207 unsigned MipsCodeEmitter::getBranchTargetOpValueMM(const MachineInstr &MI,
208 unsigned OpNo) const {
209 llvm_unreachable("Unimplemented function.");
213 unsigned MipsCodeEmitter::getBranchTarget21OpValue(const MachineInstr &MI,
214 unsigned OpNo) const {
215 llvm_unreachable("Unimplemented function.");
219 unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI,
220 unsigned OpNo) const {
221 llvm_unreachable("Unimplemented function.");
225 unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI,
226 unsigned OpNo) const {
227 llvm_unreachable("Unimplemented function.");
231 unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
232 unsigned OpNo) const {
233 MachineOperand MO = MI.getOperand(OpNo);
234 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
238 unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI,
239 unsigned OpNo) const {
240 // Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
241 assert(MI.getOperand(OpNo).isReg());
242 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
243 return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
246 unsigned MipsCodeEmitter::getMemEncodingMMImm12(const MachineInstr &MI,
247 unsigned OpNo) const {
248 llvm_unreachable("Unimplemented function.");
252 unsigned MipsCodeEmitter::getMSAMemEncoding(const MachineInstr &MI,
253 unsigned OpNo) const {
254 llvm_unreachable("Unimplemented function.");
258 unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI,
259 unsigned OpNo) const {
260 // size is encoded as size-1.
261 return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
264 unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI,
265 unsigned OpNo) const {
266 // size is encoded as pos+size-1.
267 return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
268 getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
271 unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI,
272 unsigned OpNo) const {
273 llvm_unreachable("Unimplemented function.");
277 unsigned MipsCodeEmitter::getSimm18Lsl3Encoding(const MachineInstr &MI,
278 unsigned OpNo) const {
279 llvm_unreachable("Unimplemented function.");
283 unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI,
284 unsigned OpNo) const {
285 llvm_unreachable("Unimplemented function.");
289 /// getMachineOpValue - Return binary encoding of operand. If the machine
290 /// operand requires relocation, record the relocation and return zero.
291 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
292 const MachineOperand &MO) const {
294 return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
296 return static_cast<unsigned>(MO.getImm());
297 else if (MO.isGlobal())
298 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
299 else if (MO.isSymbol())
300 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
302 emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
304 emitJumpTableAddress(MO.getIndex(), getRelocation(MI, MO));
306 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
308 llvm_unreachable("Unable to encode MachineOperand!");
312 void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
313 bool MayNeedFarStub) const {
314 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
315 const_cast<GlobalValue *>(GV), 0,
319 void MipsCodeEmitter::
320 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const {
321 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
325 void MipsCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) const {
326 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
327 Reloc, CPI, 0, false));
330 void MipsCodeEmitter::
331 emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const {
332 MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
333 Reloc, JTIndex, 0, false));
336 void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
337 unsigned Reloc) const {
338 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
342 void MipsCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI,
343 MachineBasicBlock &MBB) {
344 DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI);
346 // Expand pseudo instruction. Skip if MI was not expanded.
347 if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) &&
348 !expandPseudos(MI, MBB))
351 MCE.processDebugLoc(MI->getDebugLoc(), true);
353 emitWord(getBinaryCodeForInstr(*MI));
354 ++NumEmitted; // Keep track of the # of mi's emitted
356 MCE.processDebugLoc(MI->getDebugLoc(), false);
359 void MipsCodeEmitter::emitWord(unsigned Word) {
360 DEBUG(errs() << " 0x";
361 errs().write_hex(Word) << "\n");
362 if (Subtarget->isLittle())
363 MCE.emitWordLE(Word);
365 MCE.emitWordBE(Word);
368 void MipsCodeEmitter::expandACCInstr(MachineBasicBlock::instr_iterator MI,
369 MachineBasicBlock &MBB,
370 unsigned Opc) const {
371 // Expand "pseudomult $ac0, $t0, $t1" to "mult $t0, $t1".
372 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opc))
373 .addReg(MI->getOperand(1).getReg()).addReg(MI->getOperand(2).getReg());
376 bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI,
377 MachineBasicBlock &MBB) const {
378 switch (MI->getOpcode()) {
380 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::SLL), Mips::ZERO)
381 .addReg(Mips::ZERO).addImm(0);
384 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO)
385 .addReg(Mips::ZERO).addOperand(MI->getOperand(0));
388 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0)
391 case Mips::JALRPseudo:
392 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA)
393 .addReg(MI->getOperand(0).getReg());
395 case Mips::PseudoMULT:
396 expandACCInstr(MI, MBB, Mips::MULT);
398 case Mips::PseudoMULTu:
399 expandACCInstr(MI, MBB, Mips::MULTu);
401 case Mips::PseudoSDIV:
402 expandACCInstr(MI, MBB, Mips::SDIV);
404 case Mips::PseudoUDIV:
405 expandACCInstr(MI, MBB, Mips::UDIV);
407 case Mips::PseudoMADD:
408 expandACCInstr(MI, MBB, Mips::MADD);
410 case Mips::PseudoMADDU:
411 expandACCInstr(MI, MBB, Mips::MADDU);
413 case Mips::PseudoMSUB:
414 expandACCInstr(MI, MBB, Mips::MSUB);
416 case Mips::PseudoMSUBU:
417 expandACCInstr(MI, MBB, Mips::MSUBU);
423 (MI--)->eraseFromBundle();
427 /// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips
428 /// code to the specified MCE object.
429 FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM,
430 JITCodeEmitter &JCE) {
431 return new MipsCodeEmitter(TM, JCE);
434 #include "MipsGenCodeEmitter.inc"