1 //===-- Mips/MipsCodeEmitter.cpp - Convert Mips Code to Machine Code ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Mips machine instructions
11 // into relocatable machine code.
13 //===---------------------------------------------------------------------===//
16 #include "MCTargetDesc/MipsBaseInfo.h"
17 #include "MipsInstrInfo.h"
18 #include "MipsRelocations.h"
19 #include "MipsSubtarget.h"
20 #include "MipsTargetMachine.h"
21 #include "llvm/ADT/Statistic.h"
22 #include "llvm/CodeGen/JITCodeEmitter.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFunctionPass.h"
25 #include "llvm/CodeGen/MachineInstr.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/CodeGen/MachineJumpTableInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/MachineOperand.h"
30 #include "llvm/CodeGen/Passes.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DerivedTypes.h"
33 #include "llvm/PassManager.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/raw_ostream.h"
43 #define DEBUG_TYPE "jit"
45 STATISTIC(NumEmitted, "Number of machine instructions emitted");
49 class MipsCodeEmitter : public MachineFunctionPass {
51 const MipsInstrInfo *II;
53 const MipsSubtarget *Subtarget;
56 const std::vector<MachineConstantPoolEntry> *MCPEs;
57 const std::vector<MachineJumpTableEntry> *MJTEs;
60 void getAnalysisUsage(AnalysisUsage &AU) const override {
61 AU.addRequired<MachineModuleInfo> ();
62 MachineFunctionPass::getAnalysisUsage(AU);
68 MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
69 : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr),
70 TM(tm), MCE(mce), MCPEs(nullptr), MJTEs(nullptr),
71 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
73 bool runOnMachineFunction(MachineFunction &MF) override;
75 const char *getPassName() const override {
76 return "Mips Machine Code Emitter";
79 /// getBinaryCodeForInstr - This function, generated by the
80 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
81 /// machine instructions.
82 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
84 void emitInstruction(MachineBasicBlock::instr_iterator MI,
85 MachineBasicBlock &MBB);
89 void emitWord(unsigned Word);
91 /// Routines that handle operands which add machine relocations which are
92 /// fixed up by the relocation stage.
93 void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
94 bool MayNeedFarStub) const;
95 void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
96 void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
97 void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const;
98 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const;
100 /// getMachineOpValue - Return binary encoding of operand. If the machine
101 /// operand requires relocation, record the relocation and return zero.
102 unsigned getMachineOpValue(const MachineInstr &MI,
103 const MachineOperand &MO) const;
105 unsigned getRelocation(const MachineInstr &MI,
106 const MachineOperand &MO) const;
108 unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
109 unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const;
110 unsigned getBranchTargetOpValueMM(const MachineInstr &MI,
111 unsigned OpNo) const;
113 unsigned getBranchTarget21OpValue(const MachineInstr &MI,
114 unsigned OpNo) const;
115 unsigned getBranchTarget26OpValue(const MachineInstr &MI,
116 unsigned OpNo) const;
117 unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const;
119 unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
120 unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
121 unsigned getMemEncodingMMImm12(const MachineInstr &MI, unsigned OpNo) const;
122 unsigned getMSAMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
123 unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const;
124 unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
125 unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const;
126 unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const;
127 unsigned getSimm18Lsl3Encoding(const MachineInstr &MI, unsigned OpNo) const;
129 /// Expand pseudo instructions with accumulator register operands.
130 void expandACCInstr(MachineBasicBlock::instr_iterator MI,
131 MachineBasicBlock &MBB, unsigned Opc) const;
133 void expandPseudoIndirectBranch(MachineBasicBlock::instr_iterator MI,
134 MachineBasicBlock &MBB) const;
136 /// \brief Expand pseudo instruction. Return true if MI was expanded.
137 bool expandPseudos(MachineBasicBlock::instr_iterator &MI,
138 MachineBasicBlock &MBB) const;
142 char MipsCodeEmitter::ID = 0;
144 bool MipsCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
145 MipsTargetMachine &Target = static_cast<MipsTargetMachine &>(
146 const_cast<TargetMachine &>(MF.getTarget()));
147 // Initialize the subtarget so that we can grab the subtarget dependent
148 // variables from it.
149 Subtarget = &TM.getSubtarget<MipsSubtarget>();
150 JTI = Target.getSubtargetImpl()->getJITInfo();
151 II = Subtarget->getInstrInfo();
152 TD = Subtarget->getDataLayout();
153 MCPEs = &MF.getConstantPool()->getConstants();
155 if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables();
156 JTI->Initialize(MF, IsPIC, Subtarget->isLittle());
157 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
160 DEBUG(errs() << "JITTing function '"
161 << MF.getName() << "'\n");
162 MCE.startFunction(MF);
164 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
166 MCE.StartMachineBasicBlock(MBB);
167 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
168 E = MBB->instr_end(); I != E;)
169 emitInstruction(*I++, *MBB);
171 } while (MCE.finishFunction(MF));
176 unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI,
177 const MachineOperand &MO) const {
178 // NOTE: This relocations are for static.
179 uint64_t TSFlags = MI.getDesc().TSFlags;
180 uint64_t Form = TSFlags & MipsII::FormMask;
181 if (Form == MipsII::FrmJ)
182 return Mips::reloc_mips_26;
183 if ((Form == MipsII::FrmI || Form == MipsII::FrmFI)
185 return Mips::reloc_mips_pc16;
186 if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi)
187 return Mips::reloc_mips_hi;
188 return Mips::reloc_mips_lo;
191 unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI,
192 unsigned OpNo) const {
193 MachineOperand MO = MI.getOperand(OpNo);
195 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
196 else if (MO.isSymbol())
197 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
199 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
201 llvm_unreachable("Unexpected jump target operand kind.");
205 unsigned MipsCodeEmitter::getJumpTargetOpValueMM(const MachineInstr &MI,
206 unsigned OpNo) const {
207 llvm_unreachable("Unimplemented function.");
211 unsigned MipsCodeEmitter::getBranchTargetOpValueMM(const MachineInstr &MI,
212 unsigned OpNo) const {
213 llvm_unreachable("Unimplemented function.");
217 unsigned MipsCodeEmitter::getBranchTarget21OpValue(const MachineInstr &MI,
218 unsigned OpNo) const {
219 llvm_unreachable("Unimplemented function.");
223 unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI,
224 unsigned OpNo) const {
225 llvm_unreachable("Unimplemented function.");
229 unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI,
230 unsigned OpNo) const {
231 llvm_unreachable("Unimplemented function.");
235 unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
236 unsigned OpNo) const {
237 MachineOperand MO = MI.getOperand(OpNo);
238 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
242 unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI,
243 unsigned OpNo) const {
244 // Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
245 assert(MI.getOperand(OpNo).isReg());
246 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
247 return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
250 unsigned MipsCodeEmitter::getMemEncodingMMImm12(const MachineInstr &MI,
251 unsigned OpNo) const {
252 llvm_unreachable("Unimplemented function.");
256 unsigned MipsCodeEmitter::getMSAMemEncoding(const MachineInstr &MI,
257 unsigned OpNo) const {
258 llvm_unreachable("Unimplemented function.");
262 unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI,
263 unsigned OpNo) const {
264 // size is encoded as size-1.
265 return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
268 unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI,
269 unsigned OpNo) const {
270 // size is encoded as pos+size-1.
271 return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
272 getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
275 unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI,
276 unsigned OpNo) const {
277 llvm_unreachable("Unimplemented function.");
281 unsigned MipsCodeEmitter::getSimm18Lsl3Encoding(const MachineInstr &MI,
282 unsigned OpNo) const {
283 llvm_unreachable("Unimplemented function.");
287 unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI,
288 unsigned OpNo) const {
289 llvm_unreachable("Unimplemented function.");
293 /// getMachineOpValue - Return binary encoding of operand. If the machine
294 /// operand requires relocation, record the relocation and return zero.
295 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
296 const MachineOperand &MO) const {
298 return TM.getSubtargetImpl()->getRegisterInfo()->getEncodingValue(
301 return static_cast<unsigned>(MO.getImm());
302 else if (MO.isGlobal())
303 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
304 else if (MO.isSymbol())
305 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
307 emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
309 emitJumpTableAddress(MO.getIndex(), getRelocation(MI, MO));
311 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
313 llvm_unreachable("Unable to encode MachineOperand!");
317 void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
318 bool MayNeedFarStub) const {
319 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
320 const_cast<GlobalValue *>(GV), 0,
324 void MipsCodeEmitter::
325 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const {
326 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
330 void MipsCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) const {
331 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
332 Reloc, CPI, 0, false));
335 void MipsCodeEmitter::
336 emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const {
337 MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
338 Reloc, JTIndex, 0, false));
341 void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
342 unsigned Reloc) const {
343 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
347 void MipsCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI,
348 MachineBasicBlock &MBB) {
349 DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI);
351 // Expand pseudo instruction. Skip if MI was not expanded.
352 if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) &&
353 !expandPseudos(MI, MBB))
356 MCE.processDebugLoc(MI->getDebugLoc(), true);
358 emitWord(getBinaryCodeForInstr(*MI));
359 ++NumEmitted; // Keep track of the # of mi's emitted
361 MCE.processDebugLoc(MI->getDebugLoc(), false);
364 void MipsCodeEmitter::emitWord(unsigned Word) {
365 DEBUG(errs() << " 0x";
366 errs().write_hex(Word) << "\n");
367 if (Subtarget->isLittle())
368 MCE.emitWordLE(Word);
370 MCE.emitWordBE(Word);
373 void MipsCodeEmitter::expandACCInstr(MachineBasicBlock::instr_iterator MI,
374 MachineBasicBlock &MBB,
375 unsigned Opc) const {
376 // Expand "pseudomult $ac0, $t0, $t1" to "mult $t0, $t1".
377 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opc))
378 .addReg(MI->getOperand(1).getReg()).addReg(MI->getOperand(2).getReg());
381 void MipsCodeEmitter::expandPseudoIndirectBranch(
382 MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB) const {
383 // This logic is duplicated from MipsAsmPrinter::emitPseudoIndirectBranch()
384 bool HasLinkReg = false;
387 if (Subtarget->hasMips64r6()) {
388 // MIPS64r6 should use (JALR64 ZERO_64, $rs)
389 Opcode = Mips::JALR64;
391 } else if (Subtarget->hasMips32r6()) {
392 // MIPS32r6 should use (JALR ZERO, $rs)
395 } else if (Subtarget->inMicroMipsMode())
396 // microMIPS should use (JR_MM $rs)
397 Opcode = Mips::JR_MM;
399 // Everything else should use (JR $rs)
403 auto MIB = BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opcode));
406 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
410 MIB.addReg(MI->getOperand(0).getReg());
413 bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI,
414 MachineBasicBlock &MBB) const {
415 switch (MI->getOpcode()) {
417 llvm_unreachable("Unhandled pseudo");
420 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::SLL), Mips::ZERO)
421 .addReg(Mips::ZERO).addImm(0);
424 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO)
425 .addReg(Mips::ZERO).addOperand(MI->getOperand(0));
428 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0)
431 case Mips::JALRPseudo:
432 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA)
433 .addReg(MI->getOperand(0).getReg());
435 case Mips::PseudoMULT:
436 expandACCInstr(MI, MBB, Mips::MULT);
438 case Mips::PseudoMULTu:
439 expandACCInstr(MI, MBB, Mips::MULTu);
441 case Mips::PseudoSDIV:
442 expandACCInstr(MI, MBB, Mips::SDIV);
444 case Mips::PseudoUDIV:
445 expandACCInstr(MI, MBB, Mips::UDIV);
447 case Mips::PseudoMADD:
448 expandACCInstr(MI, MBB, Mips::MADD);
450 case Mips::PseudoMADDU:
451 expandACCInstr(MI, MBB, Mips::MADDU);
453 case Mips::PseudoMSUB:
454 expandACCInstr(MI, MBB, Mips::MSUB);
456 case Mips::PseudoMSUBU:
457 expandACCInstr(MI, MBB, Mips::MSUBU);
459 case Mips::PseudoReturn:
460 case Mips::PseudoReturn64:
461 case Mips::PseudoIndirectBranch:
462 case Mips::PseudoIndirectBranch64:
463 expandPseudoIndirectBranch(MI, MBB);
465 case TargetOpcode::CFI_INSTRUCTION:
466 case TargetOpcode::IMPLICIT_DEF:
467 case TargetOpcode::KILL:
472 (MI--)->eraseFromBundle();
476 /// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips
477 /// code to the specified MCE object.
478 FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM,
479 JITCodeEmitter &JCE) {
480 return new MipsCodeEmitter(TM, JCE);
483 #include "MipsGenCodeEmitter.inc"