1 //===-- DelaySlotFiller.cpp - Mips Delay Slot Filler ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Simple pass to fills delay slots with useful instructions.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "delay-slot-filler"
17 #include "MipsTargetMachine.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetRegisterInfo.h"
29 STATISTIC(FilledSlots, "Number of delay slots filled");
30 STATISTIC(UsefulSlots, "Number of delay slots filled with instructions that"
33 static cl::opt<bool> DisableDelaySlotFiller(
34 "disable-mips-delay-filler",
36 cl::desc("Disable the delay slot filler, which attempts to fill the Mips"
37 "delay slots with useful instructions."),
40 // This option can be used to silence complaints by machine verifier passes.
41 static cl::opt<bool> SkipDelaySlotFiller(
42 "skip-mips-delay-filler",
44 cl::desc("Skip MIPS' delay slot filling pass."),
48 struct Filler : public MachineFunctionPass {
49 typedef MachineBasicBlock::instr_iterator InstrIter;
50 typedef MachineBasicBlock::reverse_instr_iterator ReverseInstrIter;
53 const TargetInstrInfo *TII;
57 Filler(TargetMachine &tm)
58 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
60 virtual const char *getPassName() const {
61 return "Mips Delay Slot Filler";
64 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
65 bool runOnMachineFunction(MachineFunction &F) {
66 if (SkipDelaySlotFiller)
70 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
72 Changed |= runOnMachineBasicBlock(*FI);
76 bool isDelayFiller(MachineBasicBlock &MBB,
79 void insertCallUses(InstrIter MI,
80 SmallSet<unsigned, 32> &RegDefs,
81 SmallSet<unsigned, 32> &RegUses);
83 void insertDefsUses(InstrIter MI,
84 SmallSet<unsigned, 32> &RegDefs,
85 SmallSet<unsigned, 32> &RegUses);
87 bool IsRegInSet(SmallSet<unsigned, 32> &RegSet,
90 bool delayHasHazard(InstrIter candidate,
91 bool &sawLoad, bool &sawStore,
92 SmallSet<unsigned, 32> &RegDefs,
93 SmallSet<unsigned, 32> &RegUses);
96 findDelayInstr(MachineBasicBlock &MBB, InstrIter slot,
102 } // end of anonymous namespace
104 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
105 /// We assume there is only one delay slot per delayed instruction.
107 runOnMachineBasicBlock(MachineBasicBlock &MBB) {
108 bool Changed = false;
109 LastFiller = MBB.instr_end();
111 for (InstrIter I = MBB.instr_begin(); I != MBB.instr_end(); ++I)
112 if (I->hasDelaySlot()) {
115 InstrIter InstrWithSlot = I;
118 // Delay slot filling is disabled at -O0.
119 if (!DisableDelaySlotFiller && (TM.getOptLevel() != CodeGenOpt::None) &&
120 findDelayInstr(MBB, I, D)) {
121 MBB.splice(llvm::next(I), &MBB, D);
124 BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
126 // Record the filler instruction that filled the delay slot.
127 // The instruction after it will be visited in the next iteration.
130 // Bundle the delay slot filler to InstrWithSlot so that the machine
131 // verifier doesn't expect this instruction to be a terminator.
132 MIBundleBuilder(MBB, InstrWithSlot, llvm::next(LastFiller));
138 /// createMipsDelaySlotFillerPass - Returns a pass that fills in delay
139 /// slots in Mips MachineFunctions
140 FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) {
141 return new Filler(tm);
144 bool Filler::findDelayInstr(MachineBasicBlock &MBB,
147 SmallSet<unsigned, 32> RegDefs;
148 SmallSet<unsigned, 32> RegUses;
150 insertDefsUses(slot, RegDefs, RegUses);
152 bool sawLoad = false;
153 bool sawStore = false;
155 for (ReverseInstrIter I(slot); I != MBB.instr_rend(); ++I) {
157 if (I->isDebugValue())
160 // Convert to forward iterator.
161 InstrIter FI(llvm::next(I).base());
163 if (I->hasUnmodeledSideEffects()
170 // ERET, DERET or WAIT, PAUSE. Need to add these to instruction
175 if (delayHasHazard(FI, sawLoad, sawStore, RegDefs, RegUses)) {
176 insertDefsUses(FI, RegDefs, RegUses);
187 bool Filler::delayHasHazard(InstrIter candidate,
188 bool &sawLoad, bool &sawStore,
189 SmallSet<unsigned, 32> &RegDefs,
190 SmallSet<unsigned, 32> &RegUses) {
191 if (candidate->isImplicitDef() || candidate->isKill())
194 // Loads or stores cannot be moved past a store to the delay slot
195 // and stores cannot be moved past a load.
196 if (candidate->mayLoad()) {
202 if (candidate->mayStore()) {
210 assert((!candidate->isCall() && !candidate->isReturn()) &&
211 "Cannot put calls or returns in delay slot.");
213 for (unsigned i = 0, e = candidate->getNumOperands(); i!= e; ++i) {
214 const MachineOperand &MO = candidate->getOperand(i);
217 if (!MO.isReg() || !(Reg = MO.getReg()))
221 // check whether Reg is defined or used before delay slot.
222 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg))
226 // check whether Reg is defined before delay slot.
227 if (IsRegInSet(RegDefs, Reg))
234 // Helper function for getting a MachineOperand's register number and adding it
235 // to RegDefs or RegUses.
236 static void insertDefUse(const MachineOperand &MO,
237 SmallSet<unsigned, 32> &RegDefs,
238 SmallSet<unsigned, 32> &RegUses,
239 unsigned ExcludedReg = 0) {
242 if (!MO.isReg() || !(Reg = MO.getReg()) || (Reg == ExcludedReg))
251 // Insert Defs and Uses of MI into the sets RegDefs and RegUses.
252 void Filler::insertDefsUses(InstrIter MI,
253 SmallSet<unsigned, 32> &RegDefs,
254 SmallSet<unsigned, 32> &RegUses) {
255 unsigned I, E = MI->getDesc().getNumOperands();
257 for (I = 0; I != E; ++I)
258 insertDefUse(MI->getOperand(I), RegDefs, RegUses);
260 // If MI is a call, add RA to RegDefs to prevent users of RA from going into
263 RegDefs.insert(Mips::RA);
267 // Return if MI is a return.
271 // Examine the implicit operands. Exclude register AT which is in the list of
272 // clobbered registers of branch instructions.
273 E = MI->getNumOperands();
275 insertDefUse(MI->getOperand(I), RegDefs, RegUses, Mips::AT);
278 //returns true if the Reg or its alias is in the RegSet.
279 bool Filler::IsRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) {
280 // Check Reg and all aliased Registers.
281 for (MCRegAliasIterator AI(Reg, TM.getRegisterInfo(), true);
283 if (RegSet.count(*AI))