1 //===-- DelaySlotFiller.cpp - Mips delay slot filler ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Simple pass to fills delay slots with useful instructions.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "delay-slot-filler"
17 #include "MipsTargetMachine.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetRegisterInfo.h"
24 #include "llvm/ADT/SmallSet.h"
25 #include "llvm/ADT/Statistic.h"
29 STATISTIC(FilledSlots, "Number of delay slots filled");
30 STATISTIC(UsefulSlots, "Number of delay slots filled with instructions that"
33 static cl::opt<bool> EnableDelaySlotFiller(
34 "enable-mips-delay-filler",
36 cl::desc("Fill the Mips delay slots useful instructions."),
40 struct Filler : public MachineFunctionPass {
43 const TargetInstrInfo *TII;
44 MachineBasicBlock::iterator LastFiller;
47 Filler(TargetMachine &tm)
48 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
50 virtual const char *getPassName() const {
51 return "Mips Delay Slot Filler";
54 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
55 bool runOnMachineFunction(MachineFunction &F) {
57 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
59 Changed |= runOnMachineBasicBlock(*FI);
63 bool isDelayFiller(MachineBasicBlock &MBB,
64 MachineBasicBlock::iterator candidate);
66 void insertCallUses(MachineBasicBlock::iterator MI,
67 SmallSet<unsigned, 32>& RegDefs,
68 SmallSet<unsigned, 32>& RegUses);
70 void insertDefsUses(MachineBasicBlock::iterator MI,
71 SmallSet<unsigned, 32>& RegDefs,
72 SmallSet<unsigned, 32>& RegUses);
74 bool IsRegInSet(SmallSet<unsigned, 32>& RegSet,
77 bool delayHasHazard(MachineBasicBlock::iterator candidate,
78 bool &sawLoad, bool &sawStore,
79 SmallSet<unsigned, 32> &RegDefs,
80 SmallSet<unsigned, 32> &RegUses);
83 findDelayInstr(MachineBasicBlock &MBB, MachineBasicBlock::iterator slot,
84 MachineBasicBlock::iterator &Filler);
89 } // end of anonymous namespace
91 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
92 /// We assume there is only one delay slot per delayed instruction.
94 runOnMachineBasicBlock(MachineBasicBlock &MBB) {
96 LastFiller = MBB.end();
98 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
99 if (I->hasDelaySlot()) {
103 MachineBasicBlock::iterator D;
105 if (EnableDelaySlotFiller && findDelayInstr(MBB, I, D)) {
106 MBB.splice(llvm::next(I), &MBB, D);
110 BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
112 // Record the filler instruction that filled the delay slot.
113 // The instruction after it will be visited in the next iteration.
120 /// createMipsDelaySlotFillerPass - Returns a pass that fills in delay
121 /// slots in Mips MachineFunctions
122 FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) {
123 return new Filler(tm);
126 bool Filler::findDelayInstr(MachineBasicBlock &MBB,
127 MachineBasicBlock::iterator slot,
128 MachineBasicBlock::iterator &Filler) {
129 SmallSet<unsigned, 32> RegDefs;
130 SmallSet<unsigned, 32> RegUses;
132 insertDefsUses(slot, RegDefs, RegUses);
134 bool sawLoad = false;
135 bool sawStore = false;
137 for (MachineBasicBlock::reverse_iterator I(slot); I != MBB.rend(); ++I) {
139 if (I->isDebugValue())
142 // Convert to forward iterator.
143 MachineBasicBlock::iterator FI(llvm::next(I).base());
145 if (I->hasUnmodeledSideEffects()
152 // ERET, DERET or WAIT, PAUSE. Need to add these to instruction
157 if (delayHasHazard(FI, sawLoad, sawStore, RegDefs, RegUses)) {
158 insertDefsUses(FI, RegDefs, RegUses);
169 bool Filler::delayHasHazard(MachineBasicBlock::iterator candidate,
172 SmallSet<unsigned, 32> &RegDefs,
173 SmallSet<unsigned, 32> &RegUses) {
174 if (candidate->isImplicitDef() || candidate->isKill())
177 // Loads or stores cannot be moved past a store to the delay slot
178 // and stores cannot be moved past a load.
179 if (candidate->mayLoad()) {
185 if (candidate->mayStore()) {
193 assert((!candidate->isCall() && !candidate->isReturn()) &&
194 "Cannot put calls or returns in delay slot.");
196 for (unsigned i = 0, e = candidate->getNumOperands(); i!= e; ++i) {
197 const MachineOperand &MO = candidate->getOperand(i);
200 if (!MO.isReg() || !(Reg = MO.getReg()))
204 // check whether Reg is defined or used before delay slot.
205 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg))
209 // check whether Reg is defined before delay slot.
210 if (IsRegInSet(RegDefs, Reg))
217 // Insert Defs and Uses of MI into the sets RegDefs and RegUses.
218 void Filler::insertDefsUses(MachineBasicBlock::iterator MI,
219 SmallSet<unsigned, 32>& RegDefs,
220 SmallSet<unsigned, 32>& RegUses) {
221 // If MI is a call or return, just examine the explicit non-variadic operands.
222 MCInstrDesc MCID = MI->getDesc();
223 unsigned e = MI->isCall() || MI->isReturn() ? MCID.getNumOperands() :
224 MI->getNumOperands();
226 // Add RA to RegDefs to prevent users of RA from going into delay slot.
228 RegDefs.insert(Mips::RA);
230 for (unsigned i = 0; i != e; ++i) {
231 const MachineOperand &MO = MI->getOperand(i);
234 if (!MO.isReg() || !(Reg = MO.getReg()))
244 //returns true if the Reg or its alias is in the RegSet.
245 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) {
246 if (RegSet.count(Reg))
248 // check Aliased Registers
249 for (const unsigned *Alias = TM.getRegisterInfo()->getAliasSet(Reg);
251 if (RegSet.count(*Alias))