1 //===-- DelaySlotFiller.cpp - Mips Delay Slot Filler ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Simple pass to fills delay slots with useful instructions.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "delay-slot-filler"
17 #include "MipsTargetMachine.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetRegisterInfo.h"
24 #include "llvm/ADT/SmallSet.h"
25 #include "llvm/ADT/Statistic.h"
29 STATISTIC(FilledSlots, "Number of delay slots filled");
30 STATISTIC(UsefulSlots, "Number of delay slots filled with instructions that"
33 static cl::opt<bool> EnableDelaySlotFiller(
34 "enable-mips-delay-filler",
36 cl::desc("Fill the Mips delay slots useful instructions."),
39 // This option can be used to silence complaints by machine verifier passes.
40 static cl::opt<bool> SkipDelaySlotFiller(
41 "skip-mips-delay-filler",
43 cl::desc("Skip MIPS' delay slot filling pass."),
47 struct Filler : public MachineFunctionPass {
48 typedef MachineBasicBlock::instr_iterator InstrIter;
49 typedef MachineBasicBlock::reverse_instr_iterator ReverseInstrIter;
52 const TargetInstrInfo *TII;
56 Filler(TargetMachine &tm)
57 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
59 virtual const char *getPassName() const {
60 return "Mips Delay Slot Filler";
63 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
64 bool runOnMachineFunction(MachineFunction &F) {
65 if (SkipDelaySlotFiller)
69 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
71 Changed |= runOnMachineBasicBlock(*FI);
75 bool isDelayFiller(MachineBasicBlock &MBB,
78 void insertCallUses(InstrIter MI,
79 SmallSet<unsigned, 32> &RegDefs,
80 SmallSet<unsigned, 32> &RegUses);
82 void insertDefsUses(InstrIter MI,
83 SmallSet<unsigned, 32> &RegDefs,
84 SmallSet<unsigned, 32> &RegUses);
86 bool IsRegInSet(SmallSet<unsigned, 32> &RegSet,
89 bool delayHasHazard(InstrIter candidate,
90 bool &sawLoad, bool &sawStore,
91 SmallSet<unsigned, 32> &RegDefs,
92 SmallSet<unsigned, 32> &RegUses);
95 findDelayInstr(MachineBasicBlock &MBB, InstrIter slot,
101 } // end of anonymous namespace
103 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
104 /// We assume there is only one delay slot per delayed instruction.
106 runOnMachineBasicBlock(MachineBasicBlock &MBB) {
107 bool Changed = false;
108 LastFiller = MBB.instr_end();
110 for (InstrIter I = MBB.instr_begin(); I != MBB.instr_end(); ++I)
111 if (I->hasDelaySlot()) {
117 if (EnableDelaySlotFiller && findDelayInstr(MBB, I, D)) {
118 MBB.splice(llvm::next(I), &MBB, D);
121 BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
123 // Record the filler instruction that filled the delay slot.
124 // The instruction after it will be visited in the next iteration.
127 // Set InsideBundle bit so that the machine verifier doesn't expect this
128 // instruction to be a terminator.
129 LastFiller->setIsInsideBundle();
135 /// createMipsDelaySlotFillerPass - Returns a pass that fills in delay
136 /// slots in Mips MachineFunctions
137 FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) {
138 return new Filler(tm);
141 bool Filler::findDelayInstr(MachineBasicBlock &MBB,
144 SmallSet<unsigned, 32> RegDefs;
145 SmallSet<unsigned, 32> RegUses;
147 insertDefsUses(slot, RegDefs, RegUses);
149 bool sawLoad = false;
150 bool sawStore = false;
152 for (ReverseInstrIter I(slot); I != MBB.instr_rend(); ++I) {
154 if (I->isDebugValue())
157 // Convert to forward iterator.
158 InstrIter FI(llvm::next(I).base());
160 if (I->hasUnmodeledSideEffects()
167 // ERET, DERET or WAIT, PAUSE. Need to add these to instruction
172 if (delayHasHazard(FI, sawLoad, sawStore, RegDefs, RegUses)) {
173 insertDefsUses(FI, RegDefs, RegUses);
184 bool Filler::delayHasHazard(InstrIter candidate,
185 bool &sawLoad, bool &sawStore,
186 SmallSet<unsigned, 32> &RegDefs,
187 SmallSet<unsigned, 32> &RegUses) {
188 if (candidate->isImplicitDef() || candidate->isKill())
191 // Loads or stores cannot be moved past a store to the delay slot
192 // and stores cannot be moved past a load.
193 if (candidate->mayLoad()) {
199 if (candidate->mayStore()) {
207 assert((!candidate->isCall() && !candidate->isReturn()) &&
208 "Cannot put calls or returns in delay slot.");
210 for (unsigned i = 0, e = candidate->getNumOperands(); i!= e; ++i) {
211 const MachineOperand &MO = candidate->getOperand(i);
214 if (!MO.isReg() || !(Reg = MO.getReg()))
218 // check whether Reg is defined or used before delay slot.
219 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg))
223 // check whether Reg is defined before delay slot.
224 if (IsRegInSet(RegDefs, Reg))
231 // Insert Defs and Uses of MI into the sets RegDefs and RegUses.
232 void Filler::insertDefsUses(InstrIter MI,
233 SmallSet<unsigned, 32> &RegDefs,
234 SmallSet<unsigned, 32> &RegUses) {
235 // If MI is a call or return, just examine the explicit non-variadic operands.
236 MCInstrDesc MCID = MI->getDesc();
237 unsigned e = MI->isCall() || MI->isReturn() ? MCID.getNumOperands() :
238 MI->getNumOperands();
240 // Add RA to RegDefs to prevent users of RA from going into delay slot.
242 RegDefs.insert(Mips::RA);
244 for (unsigned i = 0; i != e; ++i) {
245 const MachineOperand &MO = MI->getOperand(i);
248 if (!MO.isReg() || !(Reg = MO.getReg()))
258 //returns true if the Reg or its alias is in the RegSet.
259 bool Filler::IsRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) {
260 // Check Reg and all aliased Registers.
261 for (MCRegAliasIterator AI(Reg, TM.getRegisterInfo(), true);
263 if (RegSet.count(*AI))