1 //===-- MipsExpandPseudo.cpp - Expand pseudo instructions ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass expands pseudo instructions into target instructions after register
11 // allocation but before post-RA scheduling.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "mips-expand-pseudo"
18 #include "MipsTargetMachine.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/ADT/Statistic.h"
27 struct MipsExpandPseudo : public MachineFunctionPass {
30 const TargetInstrInfo *TII;
33 MipsExpandPseudo(TargetMachine &tm)
34 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
36 virtual const char *getPassName() const {
37 return "Mips PseudoInstrs Expansion";
40 bool runOnMachineFunction(MachineFunction &F);
41 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
44 void ExpandBuildPairF64(MachineBasicBlock&, MachineBasicBlock::iterator);
45 void ExpandExtractElementF64(MachineBasicBlock&,
46 MachineBasicBlock::iterator);
48 char MipsExpandPseudo::ID = 0;
49 } // end of anonymous namespace
51 bool MipsExpandPseudo::runOnMachineFunction(MachineFunction& F) {
54 for (MachineFunction::iterator I = F.begin(); I != F.end(); ++I)
55 Changed |= runOnMachineBasicBlock(*I);
60 bool MipsExpandPseudo::runOnMachineBasicBlock(MachineBasicBlock& MBB) {
63 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end();) {
64 const MCInstrDesc& MCid = I->getDesc();
66 switch(MCid.getOpcode()) {
70 case Mips::BuildPairF64:
71 ExpandBuildPairF64(MBB, I);
73 case Mips::ExtractElementF64:
74 ExpandExtractElementF64(MBB, I);
78 // delete original instr
86 void MipsExpandPseudo::ExpandBuildPairF64(MachineBasicBlock& MBB,
87 MachineBasicBlock::iterator I) {
88 unsigned DstReg = I->getOperand(0).getReg();
89 unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg();
90 const MCInstrDesc& Mtc1Tdd = TII->get(Mips::MTC1);
91 DebugLoc dl = I->getDebugLoc();
92 const unsigned* SubReg =
93 TM.getRegisterInfo()->getSubRegisters(DstReg);
97 BuildMI(MBB, I, dl, Mtc1Tdd, *SubReg).addReg(LoReg);
98 BuildMI(MBB, I, dl, Mtc1Tdd, *(SubReg + 1)).addReg(HiReg);
101 void MipsExpandPseudo::ExpandExtractElementF64(MachineBasicBlock& MBB,
102 MachineBasicBlock::iterator I) {
103 unsigned DstReg = I->getOperand(0).getReg();
104 unsigned SrcReg = I->getOperand(1).getReg();
105 unsigned N = I->getOperand(2).getImm();
106 const MCInstrDesc& Mfc1Tdd = TII->get(Mips::MFC1);
107 DebugLoc dl = I->getDebugLoc();
108 const unsigned* SubReg = TM.getRegisterInfo()->getSubRegisters(SrcReg);
110 BuildMI(MBB, I, dl, Mfc1Tdd, DstReg).addReg(*(SubReg + N));
113 /// createMipsMipsExpandPseudoPass - Returns a pass that expands pseudo
114 /// instrs into real instrs
115 FunctionPass *llvm::createMipsExpandPseudoPass(MipsTargetMachine &tm) {
116 return new MipsExpandPseudo(tm);