1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #include "MipsISelDAGToDAG.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
17 #include "Mips16ISelDAGToDAG.h"
18 #include "MipsMachineFunction.h"
19 #include "MipsRegisterInfo.h"
20 #include "MipsSEISelDAGToDAG.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/SelectionDAGNodes.h"
27 #include "llvm/IR/CFG.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/IR/Instructions.h"
30 #include "llvm/IR/Intrinsics.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetMachine.h"
38 #define DEBUG_TYPE "mips-isel"
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
44 //===----------------------------------------------------------------------===//
45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
49 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
50 Subtarget = &TM.getSubtarget<MipsSubtarget>();
51 bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
53 processFunctionAfterISel(MF);
58 /// getGlobalBaseReg - Output the instructions required to put the
59 /// GOT address into a register.
60 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
61 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
62 return CurDAG->getRegister(GlobalBaseReg,
63 getTargetLowering()->getPointerTy()).getNode();
66 /// ComplexPattern used on MipsInstrInfo
67 /// Used on Mips Load/Store instructions
68 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
69 SDValue &Offset) const {
70 llvm_unreachable("Unimplemented function.");
74 bool MipsDAGToDAGISel::selectAddrRegReg(SDValue Addr, SDValue &Base,
75 SDValue &Offset) const {
76 llvm_unreachable("Unimplemented function.");
80 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
81 SDValue &Offset) const {
82 llvm_unreachable("Unimplemented function.");
86 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
87 SDValue &Offset) const {
88 llvm_unreachable("Unimplemented function.");
92 bool MipsDAGToDAGISel::selectIntAddrMM(SDValue Addr, SDValue &Base,
93 SDValue &Offset) const {
94 llvm_unreachable("Unimplemented function.");
98 bool MipsDAGToDAGISel::selectIntAddrMSA(SDValue Addr, SDValue &Base,
99 SDValue &Offset) const {
100 llvm_unreachable("Unimplemented function.");
104 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
105 SDValue &Offset, SDValue &Alias) {
106 llvm_unreachable("Unimplemented function.");
110 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm) const {
111 llvm_unreachable("Unimplemented function.");
115 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const {
116 llvm_unreachable("Unimplemented function.");
120 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const {
121 llvm_unreachable("Unimplemented function.");
125 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const {
126 llvm_unreachable("Unimplemented function.");
130 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const {
131 llvm_unreachable("Unimplemented function.");
135 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const {
136 llvm_unreachable("Unimplemented function.");
140 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const {
141 llvm_unreachable("Unimplemented function.");
145 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const {
146 llvm_unreachable("Unimplemented function.");
150 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const {
151 llvm_unreachable("Unimplemented function.");
155 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
156 llvm_unreachable("Unimplemented function.");
160 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
161 llvm_unreachable("Unimplemented function.");
165 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
166 llvm_unreachable("Unimplemented function.");
170 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
171 llvm_unreachable("Unimplemented function.");
175 /// Select instructions not customized! Used for
176 /// expanded, promoted and normal instructions
177 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
178 unsigned Opcode = Node->getOpcode();
180 // Dump information about the Node being selected
181 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
183 // If we have a custom node, we already have selected!
184 if (Node->isMachineOpcode()) {
185 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
190 // See if subclasses can handle this node.
191 std::pair<bool, SDNode*> Ret = selectNode(Node);
199 // Get target GOT address.
200 case ISD::GLOBAL_OFFSET_TABLE:
201 return getGlobalBaseReg();
206 assert((Subtarget->systemSupportsUnalignedAccess() ||
207 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
208 cast<MemSDNode>(Node)->getAlignment()) &&
209 "Unexpected unaligned loads/stores.");
214 // Select the default instruction
215 SDNode *ResNode = SelectCode(Node);
217 DEBUG(errs() << "=> ");
218 if (ResNode == nullptr || ResNode == Node)
219 DEBUG(Node->dump(CurDAG));
221 DEBUG(ResNode->dump(CurDAG));
222 DEBUG(errs() << "\n");
226 bool MipsDAGToDAGISel::
227 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
228 std::vector<SDValue> &OutOps) {
229 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
230 OutOps.push_back(Op);
234 /// createMipsISelDag - This pass converts a legalized DAG into a
235 /// MIPS-specific DAG, ready for instruction scheduling.
236 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
237 if (TM.getSubtargetImpl()->inMips16Mode())
238 return llvm::createMips16ISelDag(TM);
240 return llvm::createMipsSEISelDag(TM);