1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #include "MipsISelDAGToDAG.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
17 #include "Mips16ISelDAGToDAG.h"
18 #include "MipsMachineFunction.h"
19 #include "MipsRegisterInfo.h"
20 #include "MipsSEISelDAGToDAG.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/SelectionDAGNodes.h"
27 #include "llvm/IR/CFG.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/IR/Instructions.h"
30 #include "llvm/IR/Intrinsics.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetMachine.h"
38 #define DEBUG_TYPE "mips-isel"
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
44 //===----------------------------------------------------------------------===//
45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
49 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
50 bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
52 processFunctionAfterISel(MF);
57 /// getGlobalBaseReg - Output the instructions required to put the
58 /// GOT address into a register.
59 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
60 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
61 return CurDAG->getRegister(GlobalBaseReg,
62 getTargetLowering()->getPointerTy()).getNode();
65 /// ComplexPattern used on MipsInstrInfo
66 /// Used on Mips Load/Store instructions
67 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
68 SDValue &Offset) const {
69 llvm_unreachable("Unimplemented function.");
73 bool MipsDAGToDAGISel::selectAddrRegReg(SDValue Addr, SDValue &Base,
74 SDValue &Offset) const {
75 llvm_unreachable("Unimplemented function.");
79 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
80 SDValue &Offset) const {
81 llvm_unreachable("Unimplemented function.");
85 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
86 SDValue &Offset) const {
87 llvm_unreachable("Unimplemented function.");
91 bool MipsDAGToDAGISel::selectIntAddrMM(SDValue Addr, SDValue &Base,
92 SDValue &Offset) const {
93 llvm_unreachable("Unimplemented function.");
97 bool MipsDAGToDAGISel::selectIntAddrMSA(SDValue Addr, SDValue &Base,
98 SDValue &Offset) const {
99 llvm_unreachable("Unimplemented function.");
103 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
104 SDValue &Offset, SDValue &Alias) {
105 llvm_unreachable("Unimplemented function.");
109 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm) const {
110 llvm_unreachable("Unimplemented function.");
114 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const {
115 llvm_unreachable("Unimplemented function.");
119 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const {
120 llvm_unreachable("Unimplemented function.");
124 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const {
125 llvm_unreachable("Unimplemented function.");
129 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const {
130 llvm_unreachable("Unimplemented function.");
134 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const {
135 llvm_unreachable("Unimplemented function.");
139 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const {
140 llvm_unreachable("Unimplemented function.");
144 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const {
145 llvm_unreachable("Unimplemented function.");
149 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const {
150 llvm_unreachable("Unimplemented function.");
154 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
155 llvm_unreachable("Unimplemented function.");
159 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
160 llvm_unreachable("Unimplemented function.");
164 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
165 llvm_unreachable("Unimplemented function.");
169 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
170 llvm_unreachable("Unimplemented function.");
174 /// Select instructions not customized! Used for
175 /// expanded, promoted and normal instructions
176 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
177 unsigned Opcode = Node->getOpcode();
179 // Dump information about the Node being selected
180 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
182 // If we have a custom node, we already have selected!
183 if (Node->isMachineOpcode()) {
184 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
189 // See if subclasses can handle this node.
190 std::pair<bool, SDNode*> Ret = selectNode(Node);
198 // Get target GOT address.
199 case ISD::GLOBAL_OFFSET_TABLE:
200 return getGlobalBaseReg();
205 assert((Subtarget.systemSupportsUnalignedAccess() ||
206 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
207 cast<MemSDNode>(Node)->getAlignment()) &&
208 "Unexpected unaligned loads/stores.");
213 // Select the default instruction
214 SDNode *ResNode = SelectCode(Node);
216 DEBUG(errs() << "=> ");
217 if (ResNode == nullptr || ResNode == Node)
218 DEBUG(Node->dump(CurDAG));
220 DEBUG(ResNode->dump(CurDAG));
221 DEBUG(errs() << "\n");
225 bool MipsDAGToDAGISel::
226 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
227 std::vector<SDValue> &OutOps) {
228 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
229 OutOps.push_back(Op);
233 /// createMipsISelDag - This pass converts a legalized DAG into a
234 /// MIPS-specific DAG, ready for instruction scheduling.
235 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
236 if (TM.getSubtargetImpl()->inMips16Mode())
237 return llvm::createMips16ISelDag(TM);
239 return llvm::createMipsSEISelDag(TM);