1 //===-- MipsISelDAGToDAG.cpp - A dag to dag inst selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "mips-isel"
16 #include "MipsISelLowering.h"
17 #include "MipsMachineFunction.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSubtarget.h"
20 #include "MipsTargetMachine.h"
21 #include "llvm/GlobalValue.h"
22 #include "llvm/Instructions.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/Support/CFG.h"
25 #include "llvm/Type.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFunction.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/CodeGen/MachineInstrBuilder.h"
30 #include "llvm/CodeGen/MachineRegisterInfo.h"
31 #include "llvm/CodeGen/SelectionDAGISel.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/Compiler.h"
34 #include "llvm/Support/Debug.h"
37 //===----------------------------------------------------------------------===//
38 // Instruction Selector Implementation
39 //===----------------------------------------------------------------------===//
41 //===----------------------------------------------------------------------===//
42 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
43 // instructions for SelectionDAG operations.
44 //===----------------------------------------------------------------------===//
47 class VISIBILITY_HIDDEN MipsDAGToDAGISel : public SelectionDAGISel {
49 /// TM - Keep a reference to MipsTargetMachine.
50 MipsTargetMachine &TM;
52 /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
53 /// make the right decision when generating code for different targets.
54 const MipsSubtarget &Subtarget;
57 explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
58 SelectionDAGISel(*tm.getTargetLowering()),
59 TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
61 virtual void InstructionSelect();
64 virtual const char *getPassName() const {
65 return "MIPS DAG->DAG Pattern Instruction Selection";
70 // Include the pieces autogenerated from the target description.
71 #include "MipsGenDAGISel.inc"
73 SDValue getGlobalBaseReg();
74 SDNode *Select(SDValue N);
77 bool SelectAddr(SDValue Op, SDValue N,
78 SDValue &Base, SDValue &Offset);
81 // getI32Imm - Return a target constant with the specified
82 // value, of type i32.
83 inline SDValue getI32Imm(unsigned Imm) {
84 return CurDAG->getTargetConstant(Imm, MVT::i32);
95 /// InstructionSelect - This callback is invoked by
96 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
97 void MipsDAGToDAGISel::
101 // Codegen the basic block.
103 DOUT << "===== Instruction selection begins:\n";
107 // Select target instructions for the DAG.
111 DOUT << "===== Instruction selection ends:\n";
114 CurDAG->RemoveDeadNodes();
117 /// getGlobalBaseReg - Output the instructions required to put the
118 /// GOT address into a register.
119 SDValue MipsDAGToDAGISel::getGlobalBaseReg() {
120 MachineFunction* MF = BB->getParent();
122 for(MachineRegisterInfo::livein_iterator ii = MF->getRegInfo().livein_begin(),
123 ee = MF->getRegInfo().livein_end(); ii != ee; ++ii)
124 if (ii->first == Mips::GP) {
128 assert(GP && "GOT PTR not in liveins");
129 return CurDAG->getCopyFromReg(CurDAG->getEntryNode(),
133 /// ComplexPattern used on MipsInstrInfo
134 /// Used on Mips Load/Store instructions
135 bool MipsDAGToDAGISel::
136 SelectAddr(SDValue Op, SDValue Addr, SDValue &Offset, SDValue &Base)
138 // if Address is FI, get the TargetFrameIndex.
139 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
140 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
141 Offset = CurDAG->getTargetConstant(0, MVT::i32);
145 // on PIC code Load GA
146 if (TM.getRelocationModel() == Reloc::PIC_) {
147 if ((Addr.getOpcode() == ISD::TargetGlobalAddress) ||
148 (Addr.getOpcode() == ISD::TargetJumpTable)){
149 Base = CurDAG->getRegister(Mips::GP, MVT::i32);
154 if ((Addr.getOpcode() == ISD::TargetExternalSymbol ||
155 Addr.getOpcode() == ISD::TargetGlobalAddress))
159 // Operand is a result from an ADD.
160 if (Addr.getOpcode() == ISD::ADD) {
161 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
162 if (Predicate_immSExt16(CN)) {
164 // If the first operand is a FI, get the TargetFI Node
165 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>
166 (Addr.getOperand(0))) {
167 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
169 Base = Addr.getOperand(0);
172 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), MVT::i32);
179 Offset = CurDAG->getTargetConstant(0, MVT::i32);
183 /// Select instructions not customized! Used for
184 /// expanded, promoted and normal instructions
185 SDNode* MipsDAGToDAGISel::
188 SDNode *Node = N.getNode();
189 unsigned Opcode = Node->getOpcode();
191 // Dump information about the Node being selected
193 DOUT << std::string(Indent, ' ') << "Selecting: ";
194 DEBUG(Node->dump(CurDAG));
199 // If we have a custom node, we already have selected!
200 if (Node->isMachineOpcode()) {
202 DOUT << std::string(Indent-2, ' ') << "== ";
203 DEBUG(Node->dump(CurDAG));
211 // Instruction Selection not handled by the auto-generated
212 // tablegen selection should be handled here.
220 SDValue InFlag = Node->getOperand(2), CmpLHS;
221 unsigned Opc = InFlag.getOpcode(), MOp;
223 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
224 (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
225 "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
227 if (Opcode == ISD::ADDE) {
228 CmpLHS = InFlag.getValue(0);
231 CmpLHS = InFlag.getOperand(0);
235 SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
237 SDValue LHS = Node->getOperand(0);
238 SDValue RHS = Node->getOperand(1);
240 MVT VT = LHS.getValueType();
241 SDNode *Carry = CurDAG->getTargetNode(Mips::SLTu, VT, Ops, 2);
242 SDNode *AddCarry = CurDAG->getTargetNode(Mips::ADDu, VT,
243 SDValue(Carry,0), RHS);
245 return CurDAG->SelectNodeTo(N.getNode(), MOp, VT, MVT::Flag,
246 LHS, SDValue(AddCarry,0));
249 /// Mul/Div with two results
253 case ISD::UMUL_LOHI: {
254 SDValue Op1 = Node->getOperand(0);
255 SDValue Op2 = Node->getOperand(1);
258 if (Opcode == ISD::UMUL_LOHI || Opcode == ISD::SMUL_LOHI)
259 Op = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
261 Op = (Opcode == ISD::UDIVREM ? Mips::DIVu : Mips::DIV);
263 SDNode *Node = CurDAG->getTargetNode(Op, MVT::Flag, Op1, Op2);
265 SDValue InFlag = SDValue(Node, 0);
266 SDNode *Lo = CurDAG->getTargetNode(Mips::MFLO, MVT::i32,
268 InFlag = SDValue(Lo,1);
269 SDNode *Hi = CurDAG->getTargetNode(Mips::MFHI, MVT::i32, InFlag);
271 if (!N.getValue(0).use_empty())
272 ReplaceUses(N.getValue(0), SDValue(Lo,0));
274 if (!N.getValue(1).use_empty())
275 ReplaceUses(N.getValue(1), SDValue(Hi,0));
284 SDValue MulOp1 = Node->getOperand(0);
285 SDValue MulOp2 = Node->getOperand(1);
287 unsigned MulOp = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
288 SDNode *MulNode = CurDAG->getTargetNode(MulOp, MVT::Flag, MulOp1, MulOp2);
290 SDValue InFlag = SDValue(MulNode, 0);
292 if (MulOp == ISD::MUL)
293 return CurDAG->getTargetNode(Mips::MFLO, MVT::i32, InFlag);
295 return CurDAG->getTargetNode(Mips::MFHI, MVT::i32, InFlag);
298 /// Div/Rem operations
303 SDValue Op1 = Node->getOperand(0);
304 SDValue Op2 = Node->getOperand(1);
307 if (Opcode == ISD::SDIV || Opcode == ISD::UDIV) {
308 Op = (Opcode == ISD::SDIV ? Mips::DIV : Mips::DIVu);
311 Op = (Opcode == ISD::SREM ? Mips::DIV : Mips::DIVu);
314 SDNode *Node = CurDAG->getTargetNode(Op, MVT::Flag, Op1, Op2);
316 SDValue InFlag = SDValue(Node, 0);
317 return CurDAG->getTargetNode(MOp, MVT::i32, InFlag);
320 // Get target GOT address.
321 case ISD::GLOBAL_OFFSET_TABLE: {
322 SDValue Result = getGlobalBaseReg();
323 ReplaceUses(N, Result);
327 /// Handle direct and indirect calls when using PIC. On PIC, when
328 /// GOT is smaller than about 64k (small code) the GA target is
329 /// loaded with only one instruction. Otherwise GA's target must
330 /// be loaded with 3 instructions.
331 case MipsISD::JmpLink: {
332 if (TM.getRelocationModel() == Reloc::PIC_) {
333 //bool isCodeLarge = (TM.getCodeModel() == CodeModel::Large);
334 SDValue Chain = Node->getOperand(0);
335 SDValue Callee = Node->getOperand(1);
336 SDValue T9Reg = CurDAG->getRegister(Mips::T9, MVT::i32);
337 SDValue InFlag(0, 0);
339 if ( (isa<GlobalAddressSDNode>(Callee)) ||
340 (isa<ExternalSymbolSDNode>(Callee)) )
342 /// Direct call for global addresses and external symbols
343 SDValue GPReg = CurDAG->getRegister(Mips::GP, MVT::i32);
345 // Use load to get GOT target
346 SDValue Ops[] = { Callee, GPReg, Chain };
347 SDValue Load = SDValue(CurDAG->getTargetNode(Mips::LW, MVT::i32,
348 MVT::Other, Ops, 3), 0);
349 Chain = Load.getValue(1);
351 // Call target must be on T9
352 Chain = CurDAG->getCopyToReg(Chain, T9Reg, Load, InFlag);
355 Chain = CurDAG->getCopyToReg(Chain, T9Reg, Callee, InFlag);
357 // Emit Jump and Link Register
358 SDNode *ResNode = CurDAG->getTargetNode(Mips::JALR, MVT::Other,
359 MVT::Flag, T9Reg, Chain);
360 Chain = SDValue(ResNode, 0);
361 InFlag = SDValue(ResNode, 1);
362 ReplaceUses(SDValue(Node, 0), Chain);
363 ReplaceUses(SDValue(Node, 1), InFlag);
369 // Select the default instruction
370 SDNode *ResNode = SelectCode(N);
373 DOUT << std::string(Indent-2, ' ') << "=> ";
374 if (ResNode == NULL || ResNode == N.getNode())
375 DEBUG(N.getNode()->dump(CurDAG));
377 DEBUG(ResNode->dump(CurDAG));
385 /// createMipsISelDag - This pass converts a legalized DAG into a
386 /// MIPS-specific DAG, ready for instruction scheduling.
387 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
388 return new MipsDAGToDAGISel(TM);