1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "mips-isel"
15 #include "MipsISelDAGToDAG.h"
16 #include "Mips16ISelDAGToDAG.h"
17 #include "MipsSEISelDAGToDAG.h"
19 #include "MCTargetDesc/MipsBaseInfo.h"
20 #include "MipsMachineFunction.h"
21 #include "MipsRegisterInfo.h"
22 #include "llvm/CodeGen/MachineConstantPool.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/SelectionDAGNodes.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/IR/Instructions.h"
30 #include "llvm/IR/Intrinsics.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/CFG.h"
33 #include "llvm/Support/Debug.h"
34 #include "llvm/Support/ErrorHandling.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/Target/TargetMachine.h"
39 //===----------------------------------------------------------------------===//
40 // Instruction Selector Implementation
41 //===----------------------------------------------------------------------===//
43 //===----------------------------------------------------------------------===//
44 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
45 // instructions for SelectionDAG operations.
46 //===----------------------------------------------------------------------===//
48 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
49 bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
51 processFunctionAfterISel(MF);
56 /// getGlobalBaseReg - Output the instructions required to put the
57 /// GOT address into a register.
58 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
59 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
60 return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
63 /// ComplexPattern used on MipsInstrInfo
64 /// Used on Mips Load/Store instructions
65 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
66 SDValue &Offset) const {
67 llvm_unreachable("Unimplemented function.");
71 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
72 SDValue &Offset) const {
73 llvm_unreachable("Unimplemented function.");
77 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
78 SDValue &Offset) const {
79 llvm_unreachable("Unimplemented function.");
83 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
84 SDValue &Offset, SDValue &Alias) {
85 llvm_unreachable("Unimplemented function.");
89 /// Select instructions not customized! Used for
90 /// expanded, promoted and normal instructions
91 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
92 unsigned Opcode = Node->getOpcode();
94 // Dump information about the Node being selected
95 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
97 // If we have a custom node, we already have selected!
98 if (Node->isMachineOpcode()) {
99 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
103 // See if subclasses can handle this node.
104 std::pair<bool, SDNode*> Ret = selectNode(Node);
112 // Get target GOT address.
113 case ISD::GLOBAL_OFFSET_TABLE:
114 return getGlobalBaseReg();
119 assert(cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
120 cast<MemSDNode>(Node)->getAlignment() &&
121 "Unexpected unaligned loads/stores.");
126 // Select the default instruction
127 SDNode *ResNode = SelectCode(Node);
129 DEBUG(errs() << "=> ");
130 if (ResNode == NULL || ResNode == Node)
131 DEBUG(Node->dump(CurDAG));
133 DEBUG(ResNode->dump(CurDAG));
134 DEBUG(errs() << "\n");
138 bool MipsDAGToDAGISel::
139 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
140 std::vector<SDValue> &OutOps) {
141 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
142 OutOps.push_back(Op);
146 /// createMipsISelDag - This pass converts a legalized DAG into a
147 /// MIPS-specific DAG, ready for instruction scheduling.
148 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
149 if (TM.getSubtargetImpl()->inMips16Mode())
150 return llvm::createMips16ISelDag(TM);
152 return llvm::createMipsSEISelDag(TM);