1 //===-- MipsISelDAGToDAG.cpp - A dag to dag inst selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "mips-isel"
16 #include "MipsMachineFunction.h"
17 #include "MipsRegisterInfo.h"
18 #include "MipsSubtarget.h"
19 #include "MipsTargetMachine.h"
20 #include "llvm/GlobalValue.h"
21 #include "llvm/Instructions.h"
22 #include "llvm/Intrinsics.h"
23 #include "llvm/Support/CFG.h"
24 #include "llvm/Type.h"
25 #include "llvm/CodeGen/MachineConstantPool.h"
26 #include "llvm/CodeGen/MachineFunction.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/MachineRegisterInfo.h"
30 #include "llvm/CodeGen/SelectionDAGISel.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
37 //===----------------------------------------------------------------------===//
38 // Instruction Selector Implementation
39 //===----------------------------------------------------------------------===//
41 //===----------------------------------------------------------------------===//
42 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
43 // instructions for SelectionDAG operations.
44 //===----------------------------------------------------------------------===//
47 class MipsDAGToDAGISel : public SelectionDAGISel {
49 /// TM - Keep a reference to MipsTargetMachine.
50 MipsTargetMachine &TM;
52 /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
53 /// make the right decision when generating code for different targets.
54 const MipsSubtarget &Subtarget;
57 explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
59 TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
62 virtual const char *getPassName() const {
63 return "MIPS DAG->DAG Pattern Instruction Selection";
68 // Include the pieces autogenerated from the target description.
69 #include "MipsGenDAGISel.inc"
71 /// getTargetMachine - Return a reference to the TargetMachine, casted
72 /// to the target-specific type.
73 const MipsTargetMachine &getTargetMachine() {
74 return static_cast<const MipsTargetMachine &>(TM);
77 /// getInstrInfo - Return a reference to the TargetInstrInfo, casted
78 /// to the target-specific type.
79 const MipsInstrInfo *getInstrInfo() {
80 return getTargetMachine().getInstrInfo();
83 SDNode *getGlobalBaseReg();
84 SDNode *Select(SDNode *N);
87 bool SelectAddr(SDValue N, SDValue &Base, SDValue &Offset);
89 // getImm - Return a target constant with the specified value.
90 inline SDValue getImm(const SDNode *Node, unsigned Imm) {
91 return CurDAG->getTargetConstant(Imm, Node->getValueType(0));
94 virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
96 std::vector<SDValue> &OutOps);
102 /// getGlobalBaseReg - Output the instructions required to put the
103 /// GOT address into a register.
104 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
105 unsigned GlobalBaseReg = getInstrInfo()->getGlobalBaseReg(MF);
106 return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
109 /// ComplexPattern used on MipsInstrInfo
110 /// Used on Mips Load/Store instructions
111 bool MipsDAGToDAGISel::
112 SelectAddr(SDValue Addr, SDValue &Base, SDValue &Offset) {
113 EVT ValTy = Addr.getValueType();
114 unsigned GPReg = ValTy == MVT::i32 ? Mips::GP : Mips::GP_64;
116 // if Address is FI, get the TargetFrameIndex.
117 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
118 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy);
119 Offset = CurDAG->getTargetConstant(0, ValTy);
123 // on PIC code Load GA
124 if (TM.getRelocationModel() == Reloc::PIC_) {
125 if (Addr.getOpcode() == MipsISD::WrapperPIC) {
126 Base = CurDAG->getRegister(GPReg, ValTy);
127 Offset = Addr.getOperand(0);
131 if ((Addr.getOpcode() == ISD::TargetExternalSymbol ||
132 Addr.getOpcode() == ISD::TargetGlobalAddress))
134 else if (Addr.getOpcode() == ISD::TargetGlobalTLSAddress) {
135 Base = CurDAG->getRegister(GPReg, ValTy);
141 // Addresses of the form FI+const or FI|const
142 if (CurDAG->isBaseWithConstantOffset(Addr)) {
143 ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1));
144 if (isInt<16>(CN->getSExtValue())) {
146 // If the first operand is a FI, get the TargetFI Node
147 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>
148 (Addr.getOperand(0)))
149 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy);
151 Base = Addr.getOperand(0);
153 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), ValTy);
158 // Operand is a result from an ADD.
159 if (Addr.getOpcode() == ISD::ADD) {
160 // When loading from constant pools, load the lower address part in
161 // the instruction itself. Example, instead of:
162 // lui $2, %hi($CPI1_0)
163 // addiu $2, $2, %lo($CPI1_0)
166 // lui $2, %hi($CPI1_0)
167 // lwc1 $f0, %lo($CPI1_0)($2)
168 if ((Addr.getOperand(0).getOpcode() == MipsISD::Hi ||
169 Addr.getOperand(0).getOpcode() == ISD::LOAD) &&
170 Addr.getOperand(1).getOpcode() == MipsISD::Lo) {
171 SDValue LoVal = Addr.getOperand(1);
172 if (isa<ConstantPoolSDNode>(LoVal.getOperand(0)) ||
173 isa<GlobalAddressSDNode>(LoVal.getOperand(0))) {
174 Base = Addr.getOperand(0);
175 Offset = LoVal.getOperand(0);
182 Offset = CurDAG->getTargetConstant(0, ValTy);
186 /// Select instructions not customized! Used for
187 /// expanded, promoted and normal instructions
188 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
189 unsigned Opcode = Node->getOpcode();
190 DebugLoc dl = Node->getDebugLoc();
192 // Dump information about the Node being selected
193 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
195 // If we have a custom node, we already have selected!
196 if (Node->isMachineOpcode()) {
197 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
202 // Instruction Selection not handled by the auto-generated
203 // tablegen selection should be handled here.
210 SDValue InFlag = Node->getOperand(2), CmpLHS;
211 unsigned Opc = InFlag.getOpcode(); (void)Opc;
212 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
213 (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
214 "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
217 if (Opcode == ISD::ADDE) {
218 CmpLHS = InFlag.getValue(0);
221 CmpLHS = InFlag.getOperand(0);
225 SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
227 SDValue LHS = Node->getOperand(0);
228 SDValue RHS = Node->getOperand(1);
230 EVT VT = LHS.getValueType();
231 SDNode *Carry = CurDAG->getMachineNode(Mips::SLTu, dl, VT, Ops, 2);
232 SDNode *AddCarry = CurDAG->getMachineNode(Mips::ADDu, dl, VT,
233 SDValue(Carry,0), RHS);
235 return CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue,
236 LHS, SDValue(AddCarry,0));
239 /// Mul with two results
241 case ISD::UMUL_LOHI: {
242 assert(Node->getValueType(0) != MVT::i64 &&
243 "64-bit multiplication with two results not handled.");
244 SDValue Op1 = Node->getOperand(0);
245 SDValue Op2 = Node->getOperand(1);
248 Op = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
250 SDNode *Mul = CurDAG->getMachineNode(Op, dl, MVT::Glue, Op1, Op2);
252 SDValue InFlag = SDValue(Mul, 0);
253 SDNode *Lo = CurDAG->getMachineNode(Mips::MFLO, dl, MVT::i32,
255 InFlag = SDValue(Lo,1);
256 SDNode *Hi = CurDAG->getMachineNode(Mips::MFHI, dl, MVT::i32, InFlag);
258 if (!SDValue(Node, 0).use_empty())
259 ReplaceUses(SDValue(Node, 0), SDValue(Lo,0));
261 if (!SDValue(Node, 1).use_empty())
262 ReplaceUses(SDValue(Node, 1), SDValue(Hi,0));
269 // Mips32 has a 32-bit three operand mul instruction.
270 if (Subtarget.hasMips32() && Node->getValueType(0) == MVT::i32)
274 assert((Opcode == ISD::MUL || Node->getValueType(0) != MVT::i64) &&
275 "64-bit MULH* not handled.");
276 EVT Ty = Node->getValueType(0);
277 SDValue MulOp1 = Node->getOperand(0);
278 SDValue MulOp2 = Node->getOperand(1);
280 unsigned MulOp = (Opcode == ISD::MULHU ?
282 (Ty == MVT::i32 ? Mips::MULT : Mips::DMULT));
283 SDNode *MulNode = CurDAG->getMachineNode(MulOp, dl,
284 MVT::Glue, MulOp1, MulOp2);
286 SDValue InFlag = SDValue(MulNode, 0);
288 if (Opcode == ISD::MUL) {
289 unsigned Opc = (Ty == MVT::i32 ? Mips::MFLO : Mips::MFLO64);
290 return CurDAG->getMachineNode(Opc, dl, Ty, InFlag);
293 return CurDAG->getMachineNode(Mips::MFHI, dl, MVT::i32, InFlag);
296 // Get target GOT address.
297 case ISD::GLOBAL_OFFSET_TABLE:
298 return getGlobalBaseReg();
300 case ISD::ConstantFP: {
301 ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(Node);
302 if (Node->getValueType(0) == MVT::f64 && CN->isExactlyValue(+0.0)) {
303 SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl,
304 Mips::ZERO, MVT::i32);
305 return CurDAG->getMachineNode(Mips::BuildPairF64, dl, MVT::f64, Zero,
311 case MipsISD::ThreadPointer: {
312 unsigned SrcReg = Mips::HWR29;
313 unsigned DestReg = Mips::V1;
314 SDNode *Rdhwr = CurDAG->getMachineNode(Mips::RDHWR, Node->getDebugLoc(),
315 Node->getValueType(0), CurDAG->getRegister(SrcReg, MVT::i32));
316 SDValue Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, DestReg,
318 SDValue ResNode = CurDAG->getCopyFromReg(Chain, dl, DestReg, MVT::i32);
319 ReplaceUses(SDValue(Node, 0), ResNode);
320 return ResNode.getNode();
324 // Select the default instruction
325 SDNode *ResNode = SelectCode(Node);
327 DEBUG(errs() << "=> ");
328 if (ResNode == NULL || ResNode == Node)
329 DEBUG(Node->dump(CurDAG));
331 DEBUG(ResNode->dump(CurDAG));
332 DEBUG(errs() << "\n");
336 bool MipsDAGToDAGISel::
337 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
338 std::vector<SDValue> &OutOps) {
339 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
340 OutOps.push_back(Op);
344 /// createMipsISelDag - This pass converts a legalized DAG into a
345 /// MIPS-specific DAG, ready for instruction scheduling.
346 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
347 return new MipsDAGToDAGISel(TM);