1 //===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that Mips uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef MipsISELLOWERING_H
16 #define MipsISELLOWERING_H
18 #include "llvm/CodeGen/SelectionDAG.h"
19 #include "llvm/Target/TargetLowering.h"
21 #include "MipsSubtarget.h"
26 // Start the numbering from where ISD NodeType finishes.
27 FIRST_NUMBER = ISD::BUILTIN_OP_END,
29 // Jump and link (call)
32 // Get the Higher 16 bits from a 32-bit immediate
33 // No relation with Mips Hi register
36 // Get the Lower 16 bits from a 32-bit immediate
37 // No relation with Mips Lo register
40 // Handle gp_rel (small data/bss sections) relocation.
46 // Select CC Pseudo Instruction
49 // Floating Point Select CC Pseudo Instruction
52 // Floating Point Branch Conditional
55 // Floating Point Compare
58 // Floating Point Rounding
66 //===--------------------------------------------------------------------===//
67 // TargetLowering Implementation
68 //===--------------------------------------------------------------------===//
70 class MipsTargetLowering : public TargetLowering {
71 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
75 explicit MipsTargetLowering(MipsTargetMachine &TM);
77 /// LowerOperation - Provide custom lowering hooks for some operations.
78 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
80 /// getTargetNodeName - This method returns the name of a target specific
82 virtual const char *getTargetNodeName(unsigned Opcode) const;
84 /// getSetCCResultType - get the ISD::SETCC result ValueType
85 MVT::SimpleValueType getSetCCResultType(EVT VT) const;
87 /// getFunctionAlignment - Return the Log2 alignment of this function.
88 virtual unsigned getFunctionAlignment(const Function *F) const;
91 const MipsSubtarget *Subtarget;
94 // Lower Operand helpers
95 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
96 CallingConv::ID CallConv, bool isVarArg,
97 const SmallVectorImpl<ISD::InputArg> &Ins,
98 DebugLoc dl, SelectionDAG &DAG,
99 SmallVectorImpl<SDValue> &InVals);
101 // Lower Operand specifics
102 SDValue LowerANDOR(SDValue Op, SelectionDAG &DAG);
103 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG);
104 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
105 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG);
106 SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG);
107 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
108 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
109 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
110 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG);
111 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG);
112 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG);
115 LowerFormalArguments(SDValue Chain,
116 CallingConv::ID CallConv, bool isVarArg,
117 const SmallVectorImpl<ISD::InputArg> &Ins,
118 DebugLoc dl, SelectionDAG &DAG,
119 SmallVectorImpl<SDValue> &InVals);
122 LowerCall(SDValue Chain, SDValue Callee,
123 CallingConv::ID CallConv, bool isVarArg,
125 const SmallVectorImpl<ISD::OutputArg> &Outs,
126 const SmallVectorImpl<ISD::InputArg> &Ins,
127 DebugLoc dl, SelectionDAG &DAG,
128 SmallVectorImpl<SDValue> &InVals);
131 LowerReturn(SDValue Chain,
132 CallingConv::ID CallConv, bool isVarArg,
133 const SmallVectorImpl<ISD::OutputArg> &Outs,
134 DebugLoc dl, SelectionDAG &DAG);
136 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
137 MachineBasicBlock *MBB,
138 DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
140 // Inline asm support
141 ConstraintType getConstraintType(const std::string &Constraint) const;
143 std::pair<unsigned, const TargetRegisterClass*>
144 getRegForInlineAsmConstraint(const std::string &Constraint,
147 std::vector<unsigned>
148 getRegClassForInlineAsmConstraint(const std::string &Constraint,
151 virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
153 /// isFPImmLegal - Returns true if the target can instruction select the
154 /// specified FP immediate natively. If false, the legalizer will
155 /// materialize the FP immediate as a load from a constant pool.
156 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
160 #endif // MipsISELLOWERING_H