1 //===- MipsInstrFormats.td - Mips Instruction Formats ------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Describe MIPS instructions format
13 // CPU INSTRUCTION FORMATS
15 // opcode - operation code.
17 // rt - dst reg (on a 2 regs instr) or src reg (on a 3 reg instr).
18 // rd - dst reg, only used on 3 regs instr.
19 // shamt - only used on shift instructions, contains the shift amount.
20 // funct - combined with opcode field give us an operation code.
22 //===----------------------------------------------------------------------===//
24 // Format specifies the encoding used by the instruction. This is part of the
25 // ad-hoc solution used to emit machine instruction encodings by our machine
27 class Format<bits<4> val> {
31 def Pseudo : Format<0>;
35 def FrmFR : Format<4>;
36 def FrmFI : Format<5>;
37 def FrmOther : Format<6>; // Instruction w/ a custom format
39 // Generic Mips Format
40 class MipsInst<dag outs, dag ins, string asmstr, list<dag> pattern,
41 InstrItinClass itin, Format f>: Instruction
46 let Namespace = "Mips";
50 // Top 6 bits are the 'opcode' field
51 let Inst{31-26} = Opcode;
53 let OutOperandList = outs;
54 let InOperandList = ins;
56 let AsmString = asmstr;
57 let Pattern = pattern;
61 // Attributes specific to Mips instructions...
63 bits<4> FormBits = Form.Value;
65 // TSFlags layout should be kept in sync with MipsInstrInfo.h.
66 let TSFlags{3-0} = FormBits;
69 // Mips Pseudo Instructions Format
70 class MipsPseudo<dag outs, dag ins, string asmstr, list<dag> pattern>:
71 MipsInst<outs, ins, asmstr, pattern, IIPseudo, Pseudo> {
72 let isCodeGenOnly = 1;
76 //===----------------------------------------------------------------------===//
77 // Format R instruction class in Mips : <|opcode|rs|rt|rd|shamt|funct|>
78 //===----------------------------------------------------------------------===//
80 class FR<bits<6> op, bits<6> _funct, dag outs, dag ins, string asmstr,
81 list<dag> pattern, InstrItinClass itin>:
82 MipsInst<outs, ins, asmstr, pattern, itin, FrmR>
96 let Inst{10-6} = shamt;
97 let Inst{5-0} = funct;
100 //===----------------------------------------------------------------------===//
101 // Format I instruction class in Mips : <|opcode|rs|rt|immediate|>
102 //===----------------------------------------------------------------------===//
104 class FI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
105 InstrItinClass itin>: MipsInst<outs, ins, asmstr, pattern, itin, FrmI>
113 let Inst{25-21} = rs;
114 let Inst{20-16} = rt;
115 let Inst{15-0} = imm16;
118 class BranchBase<bits<6> op, dag outs, dag ins, string asmstr,
119 list<dag> pattern, InstrItinClass itin>:
120 MipsInst<outs, ins, asmstr, pattern, itin, FrmI>
128 let Inst{25-21} = rs;
129 let Inst{20-16} = rt;
130 let Inst{15-0} = imm16;
133 //===----------------------------------------------------------------------===//
134 // Format J instruction class in Mips : <|opcode|address|>
135 //===----------------------------------------------------------------------===//
137 class FJ<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
138 InstrItinClass itin>: MipsInst<outs, ins, asmstr, pattern, itin, FrmJ>
144 let Inst{25-0} = addr;
147 //===----------------------------------------------------------------------===//
149 // FLOATING POINT INSTRUCTION FORMATS
151 // opcode - operation code.
153 // ft - dst reg (on a 2 regs instr) or src reg (on a 3 reg instr).
154 // fd - dst reg, only used on 3 regs instr.
155 // fmt - double or single precision.
156 // funct - combined with opcode field give us an operation code.
158 //===----------------------------------------------------------------------===//
160 //===----------------------------------------------------------------------===//
161 // Format FR instruction class in Mips : <|opcode|fmt|ft|fs|fd|funct|>
162 //===----------------------------------------------------------------------===//
164 class FFR<bits<6> op, bits<6> _funct, bits<5> _fmt, dag outs, dag ins,
165 string asmstr, list<dag> pattern> :
166 MipsInst<outs, ins, asmstr, pattern, NoItinerary, FrmFR>
178 let Inst{25-21} = fmt;
179 let Inst{20-16} = ft;
180 let Inst{15-11} = fs;
182 let Inst{5-0} = funct;
185 //===----------------------------------------------------------------------===//
186 // Format FI instruction class in Mips : <|opcode|base|ft|immediate|>
187 //===----------------------------------------------------------------------===//
189 class FFI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern>:
190 MipsInst<outs, ins, asmstr, pattern, NoItinerary, FrmFI>
198 let Inst{25-21} = base;
199 let Inst{20-16} = ft;
200 let Inst{15-0} = imm16;
203 //===----------------------------------------------------------------------===//
204 // Compare instruction class in Mips : <|010001|fmt|ft|fs|0000011|condcode|>
205 //===----------------------------------------------------------------------===//
207 class FCC<bits<5> _fmt, dag outs, dag ins, string asmstr, list<dag> pattern> :
208 MipsInst<outs, ins, asmstr, pattern, NoItinerary, FrmOther>
218 let Inst{25-21} = fmt;
219 let Inst{20-16} = ft;
220 let Inst{15-11} = fs;
222 let Inst{5-4} = 0b11;
227 class FCMOV<bits<1> _tf, dag outs, dag ins, string asmstr,
229 MipsInst<outs, ins, asmstr, pattern, NoItinerary, FrmOther>
239 let Inst{25-21} = rs;
240 let Inst{20-18} = cc;
243 let Inst{15-11} = rd;
248 class FFCMOV<bits<5> _fmt, bits<1> _tf, dag outs, dag ins, string asmstr,
250 MipsInst<outs, ins, asmstr, pattern, NoItinerary, FrmOther>
262 let Inst{25-21} = fmt;
263 let Inst{20-18} = cc;
266 let Inst{15-11} = fs;
271 // FP unary instructions without patterns.
272 class FFR1<bits<6> funct, bits<5> fmt, string opstr, string fmtstr,
273 RegisterClass DstRC, RegisterClass SrcRC> :
274 FFR<0x11, funct, fmt, (outs DstRC:$fd), (ins SrcRC:$fs),
275 !strconcat(opstr, ".", fmtstr, "\t$fd, $fs"), []> {
279 // FP unary instructions with patterns.
280 class FFR1P<bits<6> funct, bits<5> fmt, string opstr, string fmtstr,
281 RegisterClass DstRC, RegisterClass SrcRC, SDNode OpNode> :
282 FFR<0x11, funct, fmt, (outs DstRC:$fd), (ins SrcRC:$fs),
283 !strconcat(opstr, ".", fmtstr, "\t$fd, $fs"),
284 [(set DstRC:$fd, (OpNode SrcRC:$fs))]> {
288 class FFR2P<bits<6> funct, bits<5> fmt, string opstr,
289 string fmtstr, RegisterClass RC, SDNode OpNode> :
290 FFR<0x11, funct, fmt, (outs RC:$fd), (ins RC:$fs, RC:$ft),
291 !strconcat(opstr, ".", fmtstr, "\t$fd, $fs, $ft"),
292 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))]>;