1 //===- MipsInstrFormats.td - Mips Instruction Formats ------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Describe MIPS instructions format
13 // CPU INSTRUCTION FORMATS
15 // opcode - operation code.
17 // rt - dst reg (on a 2 regs instr) or src reg (on a 3 reg instr).
18 // rd - dst reg, only used on 3 regs instr.
19 // shamt - only used on shift instructions, contains the shift amount.
20 // funct - combined with opcode field give us an operation code.
22 //===----------------------------------------------------------------------===//
24 // Generic Mips Format
25 class MipsInst<dag outs, dag ins, string asmstr, list<dag> pattern,
26 InstrItinClass itin>: Instruction
30 let Namespace = "Mips";
34 // Top 5 bits are the 'opcode' field
35 let Inst{31-26} = opcode;
37 dag OutOperandList = outs;
38 dag InOperandList = ins;
40 let AsmString = asmstr;
41 let Pattern = pattern;
45 // Mips Pseudo Instructions Format
46 class MipsPseudo<dag outs, dag ins, string asmstr, list<dag> pattern>:
47 MipsInst<outs, ins, asmstr, pattern, IIPseudo>;
49 //===----------------------------------------------------------------------===//
50 // Format R instruction class in Mips : <|opcode|rs|rt|rd|shamt|funct|>
51 //===----------------------------------------------------------------------===//
53 class FR<bits<6> op, bits<6> _funct, dag outs, dag ins, string asmstr,
54 list<dag> pattern, InstrItinClass itin>:
55 MipsInst<outs, ins, asmstr, pattern, itin>
69 let Inst{10-6} = shamt;
70 let Inst{5-0} = funct;
73 //===----------------------------------------------------------------------===//
74 // Format I instruction class in Mips : <|opcode|rs|rt|immediate|>
75 //===----------------------------------------------------------------------===//
77 class FI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
78 InstrItinClass itin>: MipsInst<outs, ins, asmstr, pattern, itin>
88 let Inst{15-0} = imm16;
91 //===----------------------------------------------------------------------===//
92 // Format J instruction class in Mips : <|opcode|address|>
93 //===----------------------------------------------------------------------===//
95 class FJ<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
96 InstrItinClass itin>: MipsInst<outs, ins, asmstr, pattern, itin>
102 let Inst{25-0} = addr;
106 class ExtIns<bits<6> _funct, string instr_asm, dag Outs, dag Ins,
107 list<dag> pattern, InstrItinClass itin>:
108 MipsInst<Outs, Ins, !strconcat(instr_asm, "\t$dst, $src, $pos, $size"),
120 let Inst{25-21} = rs;
121 let Inst{20-16} = rt;
122 let Inst{15-11} = sz;
123 let Inst{10-6} = pos;
124 let Inst{5-0} = funct;
127 //===----------------------------------------------------------------------===//
129 // FLOATING POINT INSTRUCTION FORMATS
131 // opcode - operation code.
133 // ft - dst reg (on a 2 regs instr) or src reg (on a 3 reg instr).
134 // fd - dst reg, only used on 3 regs instr.
135 // fmt - double or single precision.
136 // funct - combined with opcode field give us an operation code.
138 //===----------------------------------------------------------------------===//
140 //===----------------------------------------------------------------------===//
141 // Format FR instruction class in Mips : <|opcode|fmt|ft|fs|fd|funct|>
142 //===----------------------------------------------------------------------===//
144 class FFR<bits<6> op, bits<6> _funct, bits<5> _fmt, dag outs, dag ins,
145 string asmstr, list<dag> pattern> :
146 MipsInst<outs, ins, asmstr, pattern, NoItinerary>
158 let Inst{25-21} = fmt;
159 let Inst{20-16} = ft;
160 let Inst{15-11} = fs;
162 let Inst{5-0} = funct;
165 //===----------------------------------------------------------------------===//
166 // Format FI instruction class in Mips : <|opcode|base|ft|immediate|>
167 //===----------------------------------------------------------------------===//
169 class FFI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern>:
170 MipsInst<outs, ins, asmstr, pattern, NoItinerary>
178 let Inst{25-21} = base;
179 let Inst{20-16} = ft;
180 let Inst{15-0} = imm16;
183 //===----------------------------------------------------------------------===//
184 // Compare instruction class in Mips : <|010001|fmt|ft|fs|0000011|condcode|>
185 //===----------------------------------------------------------------------===//
187 class FCC<bits<5> _fmt, dag outs, dag ins, string asmstr, list<dag> pattern> :
188 MipsInst<outs, ins, asmstr, pattern, NoItinerary>
198 let Inst{25-21} = fmt;
199 let Inst{20-16} = ft;
200 let Inst{15-11} = fs;
202 let Inst{5-4} = 0b11;
207 class FCMOV<bits<1> _tf, dag outs, dag ins, string asmstr,
209 MipsInst<outs, ins, asmstr, pattern, NoItinerary>
219 let Inst{25-21} = rs;
223 let Inst{15-11} = rd;
228 class FFCMOV<bits<5> _fmt, bits<1> _tf, dag outs, dag ins, string asmstr,
230 MipsInst<outs, ins, asmstr, pattern, NoItinerary>
242 let Inst{25-21} = fmt;
246 let Inst{15-11} = fs;