1 //===-- MipsJITInfo.cpp - Implement the Mips JIT Interface ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the JIT interfaces for the Mips target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "jit"
15 #include "MipsJITInfo.h"
16 #include "MipsInstrInfo.h"
17 #include "MipsRelocations.h"
18 #include "MipsSubtarget.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/JITCodeEmitter.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Support/Memory.h"
29 void MipsJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
30 report_fatal_error("MipsJITInfo::replaceMachineCodeForFunction");
33 /// JITCompilerFunction - This contains the address of the JIT function used to
34 /// compile a function lazily.
35 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
37 // Get the ASMPREFIX for the current host. This is often '_'.
38 #ifndef __USER_LABEL_PREFIX__
39 #define __USER_LABEL_PREFIX__
41 #define GETASMPREFIX2(X) #X
42 #define GETASMPREFIX(X) GETASMPREFIX2(X)
43 #define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
45 // CompilationCallback stub - We can't use a C function with inline assembly in
46 // it, because the prolog/epilog inserted by GCC won't work for us. Instead,
47 // write our own wrapper, which does things our way, so we have complete control
48 // over register saving and restoring. This code saves registers, calls
49 // MipsCompilationCallbackC and restores registers.
51 #if defined (__mips__)
52 void MipsCompilationCallback();
57 ".globl " ASMPREFIX "MipsCompilationCallback\n"
58 ASMPREFIX "MipsCompilationCallback:\n"
59 ".ent " ASMPREFIX "MipsCompilationCallback\n"
60 ".frame $sp, 32, $ra\n"
64 "addiu $sp, $sp, -64\n"
67 // Save argument registers a0, a1, a2, a3, f12, f14 since they may contain
68 // stuff for the real target function right now. We have to act as if this
69 // whole compilation callback doesn't exist as far as the caller is
70 // concerned. We also need to save the ra register since it contains the
71 // original return address, and t8 register since it contains the address
72 // of the end of function stub.
79 "sdc1 $f12, 48($sp)\n"
80 "sdc1 $f14, 56($sp)\n"
82 // t8 points at the end of function stub. Pass the beginning of the stub
83 // to the MipsCompilationCallbackC.
84 "addiu $a0, $t8, -16\n"
85 "jal " ASMPREFIX "MipsCompilationCallbackC\n"
95 "ldc1 $f12, 48($sp)\n"
96 "ldc1 $f14, 56($sp)\n"
97 "addiu $sp, $sp, 64\n"
99 // Jump to the (newly modified) stub to invoke the real function.
100 "addiu $t8, $t8, -16\n"
105 ".end " ASMPREFIX "MipsCompilationCallback\n"
107 #else // host != Mips
108 void MipsCompilationCallback() {
110 "Cannot call MipsCompilationCallback() on a non-Mips arch!");
115 /// MipsCompilationCallbackC - This is the target-specific function invoked
116 /// by the function stub when we did not know the real target of a call.
117 /// This function must locate the start of the stub or call site and pass
118 /// it into the JIT compiler function.
119 extern "C" void MipsCompilationCallbackC(intptr_t StubAddr) {
120 // Get the address of the compiled code for this function.
121 intptr_t NewVal = (intptr_t) JITCompilerFunction((void*) StubAddr);
123 // Rewrite the function stub so that we don't end up here every time we
124 // execute the call. We're replacing the first four instructions of the
125 // stub with code that jumps to the compiled function:
126 // lui $t9, %hi(NewVal)
127 // addiu $t9, $t9, %lo(NewVal)
131 int Hi = ((unsigned)NewVal & 0xffff0000) >> 16;
132 if ((NewVal & 0x8000) != 0)
134 int Lo = (int)(NewVal & 0xffff);
136 *(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi;
137 *(intptr_t *)(StubAddr + 4) = 9 << 26 | 25 << 21 | 25 << 16 | Lo;
138 *(intptr_t *)(StubAddr + 8) = 25 << 21 | 8;
139 *(intptr_t *)(StubAddr + 12) = 0;
141 sys::Memory::InvalidateInstructionCache((void*) StubAddr, 16);
144 TargetJITInfo::LazyResolverFn MipsJITInfo::getLazyResolverFunction(
146 JITCompilerFunction = F;
147 return MipsCompilationCallback;
150 TargetJITInfo::StubLayout MipsJITInfo::getStubLayout() {
151 // The stub contains 4 4-byte instructions, aligned at 4 bytes. See
152 // emitFunctionStub for details.
153 StubLayout Result = { 4*4, 4 };
157 void *MipsJITInfo::emitFunctionStub(const Function *F, void *Fn,
158 JITCodeEmitter &JCE) {
159 JCE.emitAlignment(4);
160 void *Addr = (void*) (JCE.getCurrentPCValue());
161 if (!sys::Memory::setRangeWritable(Addr, 16))
162 llvm_unreachable("ERROR: Unable to mark stub writable.");
164 intptr_t EmittedAddr;
165 if (Fn != (void*)(intptr_t)MipsCompilationCallback)
166 EmittedAddr = (intptr_t)Fn;
168 EmittedAddr = (intptr_t)MipsCompilationCallback;
171 int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16;
172 if ((EmittedAddr & 0x8000) != 0)
174 int Lo = (int)(EmittedAddr & 0xffff);
176 // lui t9, %hi(EmittedAddr)
177 // addiu t9, t9, %lo(EmittedAddr)
180 JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi);
181 JCE.emitWordLE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
182 JCE.emitWordLE(25 << 21 | 24 << 11 | 9);
185 sys::Memory::InvalidateInstructionCache(Addr, 16);
186 if (!sys::Memory::setRangeExecutable(Addr, 16))
187 llvm_unreachable("ERROR: Unable to mark stub executable.");
192 /// relocate - Before the JIT can run a block of code that has been emitted,
193 /// it must rewrite the code to contain the actual addresses of any
194 /// referenced global symbols.
195 void MipsJITInfo::relocate(void *Function, MachineRelocation *MR,
196 unsigned NumRelocs, unsigned char *GOTBase) {
197 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
199 void *RelocPos = (char*) Function + MR->getMachineCodeOffset();
200 intptr_t ResultPtr = (intptr_t) MR->getResultPointer();
202 switch ((Mips::RelocationType) MR->getRelocationType()) {
203 case Mips::reloc_mips_pc16:
204 ResultPtr = (((ResultPtr - (intptr_t) RelocPos) - 4) >> 2) & 0xffff;
205 *((unsigned*) RelocPos) |= (unsigned) ResultPtr;
208 case Mips::reloc_mips_26:
209 ResultPtr = (ResultPtr & 0x0fffffff) >> 2;
210 *((unsigned*) RelocPos) |= (unsigned) ResultPtr;
213 case Mips::reloc_mips_hi:
214 ResultPtr = ResultPtr >> 16;
215 if ((((intptr_t) (MR->getResultPointer()) & 0xffff) >> 15) == 1) {
218 *((unsigned*) RelocPos) |= (unsigned) ResultPtr;
221 case Mips::reloc_mips_lo: {
222 // Addend is needed for unaligned load/store instructions, where offset
223 // for the second load/store in the expanded instruction sequence must
224 // be modified by +1 or +3. Otherwise, Addend is 0.
225 int Addend = *((unsigned*) RelocPos) & 0xffff;
226 ResultPtr = (ResultPtr + Addend) & 0xffff;
227 *((unsigned*) RelocPos) &= 0xffff0000;
228 *((unsigned*) RelocPos) |= (unsigned) ResultPtr;