1 //===-- MipsLongBranch.cpp - Emit long branches ---------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass expands a branch or jump instruction into a long branch if its
11 // offset is too large to fit into its immediate field.
14 // 1. Fix pc-region jump instructions which cross 256MB segment boundaries.
15 // 2. If program has inline assembly statements whose size cannot be
16 // determined accurately, load branch target addresses from the GOT.
17 //===----------------------------------------------------------------------===//
19 #define DEBUG_TYPE "mips-long-branch"
22 #include "MCTargetDesc/MipsBaseInfo.h"
23 #include "MipsTargetMachine.h"
24 #include "llvm/ADT/Statistic.h"
25 #include "llvm/CodeGen/MachineFunctionPass.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/MathExtras.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
36 STATISTIC(LongBranches, "Number of long branches.");
38 static cl::opt<bool> SkipLongBranch(
39 "skip-mips-long-branch",
41 cl::desc("MIPS: Skip long branch pass."),
44 static cl::opt<bool> ForceLongBranch(
45 "force-mips-long-branch",
47 cl::desc("MIPS: Expand all branches to long format."),
51 typedef MachineBasicBlock::iterator Iter;
52 typedef MachineBasicBlock::reverse_iterator ReverseIter;
55 uint64_t Size, Address;
59 MBBInfo() : Size(0), HasLongBranch(false), Br(0) {}
62 class MipsLongBranch : public MachineFunctionPass {
66 MipsLongBranch(TargetMachine &tm)
67 : MachineFunctionPass(ID), TM(tm),
68 IsPIC(TM.getRelocationModel() == Reloc::PIC_),
69 ABI(TM.getSubtarget<MipsSubtarget>().getTargetABI()),
70 LongBranchSeqSize(!IsPIC ? 2 : (ABI == MipsSubtarget::N64 ? 13 : 9)) {}
72 virtual const char *getPassName() const {
73 return "Mips Long Branch";
76 bool runOnMachineFunction(MachineFunction &F);
79 void splitMBB(MachineBasicBlock *MBB);
81 int64_t computeOffset(const MachineInstr *Br);
82 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL,
83 MachineBasicBlock *MBBOpnd);
84 void expandToLongBranch(MBBInfo &Info);
86 const TargetMachine &TM;
88 SmallVector<MBBInfo, 16> MBBInfos;
91 unsigned LongBranchSeqSize;
94 char MipsLongBranch::ID = 0;
95 } // end of anonymous namespace
97 /// createMipsLongBranchPass - Returns a pass that converts branches to long
99 FunctionPass *llvm::createMipsLongBranchPass(MipsTargetMachine &tm) {
100 return new MipsLongBranch(tm);
103 /// Iterate over list of Br's operands and search for a MachineBasicBlock
105 static MachineBasicBlock *getTargetMBB(const MachineInstr &Br) {
106 for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
107 const MachineOperand &MO = Br.getOperand(I);
113 assert(false && "This instruction does not have an MBB operand.");
117 // Traverse the list of instructions backwards until a non-debug instruction is
118 // found or it reaches E.
119 static ReverseIter getNonDebugInstr(ReverseIter B, ReverseIter E) {
121 if (!B->isDebugValue())
127 // Split MBB if it has two direct jumps/branches.
128 void MipsLongBranch::splitMBB(MachineBasicBlock *MBB) {
129 ReverseIter End = MBB->rend();
130 ReverseIter LastBr = getNonDebugInstr(MBB->rbegin(), End);
132 // Return if MBB has no branch instructions.
133 if ((LastBr == End) ||
134 (!LastBr->isConditionalBranch() && !LastBr->isUnconditionalBranch()))
137 ReverseIter FirstBr = getNonDebugInstr(llvm::next(LastBr), End);
139 // MBB has only one branch instruction if FirstBr is not a branch
141 if ((FirstBr == End) ||
142 (!FirstBr->isConditionalBranch() && !FirstBr->isUnconditionalBranch()))
145 assert(!FirstBr->isIndirectBranch() && "Unexpected indirect branch found.");
147 // Create a new MBB. Move instructions in MBB to the newly created MBB.
148 MachineBasicBlock *NewMBB =
149 MF->CreateMachineBasicBlock(MBB->getBasicBlock());
151 // Insert NewMBB and fix control flow.
152 MachineBasicBlock *Tgt = getTargetMBB(*FirstBr);
153 NewMBB->transferSuccessors(MBB);
154 NewMBB->removeSuccessor(Tgt);
155 MBB->addSuccessor(NewMBB);
156 MBB->addSuccessor(Tgt);
157 MF->insert(llvm::next(MachineFunction::iterator(MBB)), NewMBB);
159 NewMBB->splice(NewMBB->end(), MBB, (++LastBr).base(), MBB->end());
163 void MipsLongBranch::initMBBInfo() {
164 // Split the MBBs if they have two branches. Each basic block should have at
165 // most one branch after this loop is executed.
166 for (MachineFunction::iterator I = MF->begin(), E = MF->end(); I != E;)
169 MF->RenumberBlocks();
171 MBBInfos.resize(MF->size());
173 const MipsInstrInfo *TII =
174 static_cast<const MipsInstrInfo*>(TM.getInstrInfo());
175 for (unsigned I = 0, E = MBBInfos.size(); I < E; ++I) {
176 MachineBasicBlock *MBB = MF->getBlockNumbered(I);
178 // Compute size of MBB.
179 for (MachineBasicBlock::instr_iterator MI = MBB->instr_begin();
180 MI != MBB->instr_end(); ++MI)
181 MBBInfos[I].Size += TII->GetInstSizeInBytes(&*MI);
183 // Search for MBB's branch instruction.
184 ReverseIter End = MBB->rend();
185 ReverseIter Br = getNonDebugInstr(MBB->rbegin(), End);
187 if ((Br != End) && !Br->isIndirectBranch() &&
188 (Br->isConditionalBranch() ||
189 (Br->isUnconditionalBranch() &&
190 TM.getRelocationModel() == Reloc::PIC_)))
191 MBBInfos[I].Br = (++Br).base();
195 // Compute offset of branch in number of bytes.
196 int64_t MipsLongBranch::computeOffset(const MachineInstr *Br) {
198 int ThisMBB = Br->getParent()->getNumber();
199 int TargetMBB = getTargetMBB(*Br)->getNumber();
201 // Compute offset of a forward branch.
202 if (ThisMBB < TargetMBB) {
203 for (int N = ThisMBB + 1; N < TargetMBB; ++N)
204 Offset += MBBInfos[N].Size;
209 // Compute offset of a backward branch.
210 for (int N = ThisMBB; N >= TargetMBB; --N)
211 Offset += MBBInfos[N].Size;
216 // Replace Br with a branch which has the opposite condition code and a
217 // MachineBasicBlock operand MBBOpnd.
218 void MipsLongBranch::replaceBranch(MachineBasicBlock &MBB, Iter Br,
219 DebugLoc DL, MachineBasicBlock *MBBOpnd) {
220 const MipsInstrInfo *TII =
221 static_cast<const MipsInstrInfo*>(TM.getInstrInfo());
222 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode());
223 const MCInstrDesc &NewDesc = TII->get(NewOpc);
225 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc);
227 for (unsigned I = 0, E = Br->getDesc().getNumOperands(); I < E; ++I) {
228 MachineOperand &MO = Br->getOperand(I);
231 assert(MO.isMBB() && "MBB operand expected.");
235 MIB.addReg(MO.getReg());
240 Br->eraseFromParent();
243 // Expand branch instructions to long branches.
244 void MipsLongBranch::expandToLongBranch(MBBInfo &I) {
245 MachineBasicBlock::iterator Pos;
246 MachineBasicBlock *MBB = I.Br->getParent(), *TgtMBB = getTargetMBB(*I.Br);
247 DebugLoc DL = I.Br->getDebugLoc();
248 const BasicBlock *BB = MBB->getBasicBlock();
249 MachineFunction::iterator FallThroughMBB = ++MachineFunction::iterator(MBB);
250 MachineBasicBlock *LongBrMBB = MF->CreateMachineBasicBlock(BB);
252 const MipsInstrInfo *TII =
253 static_cast<const MipsInstrInfo*>(TM.getInstrInfo());
255 MF->insert(FallThroughMBB, LongBrMBB);
256 MBB->removeSuccessor(TgtMBB);
257 MBB->addSuccessor(LongBrMBB);
260 MachineBasicBlock *BalTgtMBB = MF->CreateMachineBasicBlock(BB);
261 MF->insert(FallThroughMBB, BalTgtMBB);
262 LongBrMBB->addSuccessor(BalTgtMBB);
263 BalTgtMBB->addSuccessor(TgtMBB);
265 int64_t TgtAddress = MBBInfos[TgtMBB->getNumber()].Address;
266 unsigned BalTgtMBBSize = 5;
267 int64_t Offset = TgtAddress - (I.Address + I.Size - BalTgtMBBSize * 4);
268 int64_t Lo = SignExtend64<16>(Offset & 0xffff);
269 int64_t Hi = SignExtend64<16>(((Offset + 0x8000) >> 16) & 0xffff);
271 if (ABI != MipsSubtarget::N64) {
273 // addiu $sp, $sp, -8
276 // lui $at, %hi($tgt - $baltgt)
278 // addiu $at, $at, %lo($tgt - $baltgt)
279 // addu $at, $ra, $at
286 Pos = LongBrMBB->begin();
288 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
289 .addReg(Mips::SP).addImm(-8);
290 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA)
291 .addReg(Mips::SP).addImm(0);
293 MIBundleBuilder(*LongBrMBB, Pos)
294 .append(BuildMI(*MF, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB))
295 .append(BuildMI(*MF, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi));
297 Pos = BalTgtMBB->begin();
299 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::AT)
300 .addReg(Mips::AT).addImm(Lo);
301 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT)
302 .addReg(Mips::RA).addReg(Mips::AT);
303 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA)
304 .addReg(Mips::SP).addImm(0);
306 MIBundleBuilder(*BalTgtMBB, Pos)
307 .append(BuildMI(*MF, DL, TII->get(Mips::JR)).addReg(Mips::AT))
308 .append(BuildMI(*MF, DL, TII->get(Mips::ADDiu), Mips::SP)
309 .addReg(Mips::SP).addImm(8));
312 // daddiu $sp, $sp, -16
314 // lui64 $at, %highest($tgt - $baltgt)
315 // daddiu $at, $at, %higher($tgt - $baltgt)
317 // daddiu $at, $at, %hi($tgt - $baltgt)
321 // daddiu $at, $at, %lo($tgt - $baltgt)
322 // daddu $at, $ra, $at
325 // daddiu $sp, $sp, 16
329 int64_t Higher = SignExtend64<16>(((Offset + 0x80008000) >> 32) & 0xffff);
331 SignExtend64<16>(((Offset + 0x800080008000LL) >> 48) & 0xffff);
333 Pos = LongBrMBB->begin();
335 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64)
336 .addReg(Mips::SP_64).addImm(-16);
337 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD)).addReg(Mips::RA_64)
338 .addReg(Mips::SP_64).addImm(0);
339 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LUi64), Mips::AT_64)
341 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::AT_64)
342 .addReg(Mips::AT_64).addImm(Higher);
343 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64)
344 .addReg(Mips::AT_64).addImm(16);
345 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::AT_64)
346 .addReg(Mips::AT_64).addImm(Hi);
348 MIBundleBuilder(*LongBrMBB, Pos)
349 .append(BuildMI(*MF, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB))
350 .append(BuildMI(*MF, DL, TII->get(Mips::DSLL), Mips::AT_64)
351 .addReg(Mips::AT_64).addImm(16));
353 Pos = BalTgtMBB->begin();
355 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::AT_64)
356 .addReg(Mips::AT_64).addImm(Lo);
357 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64)
358 .addReg(Mips::RA_64).addReg(Mips::AT_64);
359 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64)
360 .addReg(Mips::SP_64).addImm(0);
362 MIBundleBuilder(*BalTgtMBB, Pos)
363 .append(BuildMI(*MF, DL, TII->get(Mips::JR64)).addReg(Mips::AT_64))
364 .append(BuildMI(*MF, DL, TII->get(Mips::DADDiu), Mips::SP_64)
365 .addReg(Mips::SP_64).addImm(16));
368 assert(BalTgtMBBSize == BalTgtMBB->size());
369 assert(LongBrMBB->size() + BalTgtMBBSize == LongBranchSeqSize);
376 Pos = LongBrMBB->begin();
377 LongBrMBB->addSuccessor(TgtMBB);
378 MIBundleBuilder(*LongBrMBB, Pos)
379 .append(BuildMI(*MF, DL, TII->get(Mips::J)).addMBB(TgtMBB))
380 .append(BuildMI(*MF, DL, TII->get(Mips::NOP)));
382 assert(LongBrMBB->size() == LongBranchSeqSize);
385 if (I.Br->isUnconditionalBranch()) {
386 // Change branch destination.
387 assert(I.Br->getDesc().getNumOperands() == 1);
388 I.Br->RemoveOperand(0);
389 I.Br->addOperand(MachineOperand::CreateMBB(LongBrMBB));
391 // Change branch destination and reverse condition.
392 replaceBranch(*MBB, I.Br, DL, FallThroughMBB);
395 static void emitGPDisp(MachineFunction &F, const MipsInstrInfo *TII) {
396 MachineBasicBlock &MBB = F.front();
397 MachineBasicBlock::iterator I = MBB.begin();
398 DebugLoc DL = MBB.findDebugLoc(MBB.begin());
399 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0)
400 .addExternalSymbol("_gp_disp", MipsII::MO_ABS_HI);
401 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0)
402 .addReg(Mips::V0).addExternalSymbol("_gp_disp", MipsII::MO_ABS_LO);
403 MBB.removeLiveIn(Mips::V0);
406 bool MipsLongBranch::runOnMachineFunction(MachineFunction &F) {
407 const MipsInstrInfo *TII =
408 static_cast<const MipsInstrInfo*>(TM.getInstrInfo());
410 if (TM.getSubtarget<MipsSubtarget>().inMips16Mode())
412 if ((TM.getRelocationModel() == Reloc::PIC_) &&
413 TM.getSubtarget<MipsSubtarget>().isABI_O32() &&
414 F.getInfo<MipsFunctionInfo>()->globalBaseRegSet())
423 SmallVector<MBBInfo, 16>::iterator I, E = MBBInfos.end();
424 bool EverMadeChange = false, MadeChange = true;
429 for (I = MBBInfos.begin(); I != E; ++I) {
430 // Skip if this MBB doesn't have a branch or the branch has already been
431 // converted to a long branch.
432 if (!I->Br || I->HasLongBranch)
435 // Check if offset fits into 16-bit immediate field of branches.
436 if (!ForceLongBranch && isInt<16>(computeOffset(I->Br) / 4))
439 I->HasLongBranch = true;
440 I->Size += LongBranchSeqSize * 4;
442 EverMadeChange = MadeChange = true;
449 // Compute basic block addresses.
450 if (TM.getRelocationModel() == Reloc::PIC_) {
451 uint64_t Address = 0;
453 for (I = MBBInfos.begin(); I != E; Address += I->Size, ++I)
454 I->Address = Address;
458 for (I = MBBInfos.begin(); I != E; ++I)
459 if (I->HasLongBranch)
460 expandToLongBranch(*I);
462 MF->RenumberBlocks();