1 //===-- MipsMCInstLower.cpp - Convert Mips MachineInstr to MCInst ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains code to lower Mips MachineInstrs to their corresponding
13 //===----------------------------------------------------------------------===//
15 #include "MipsMCInstLower.h"
16 #include "MipsAsmPrinter.h"
17 #include "MipsInstrInfo.h"
18 #include "MipsMCSymbolRefExpr.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/MachineOperand.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCInst.h"
24 #include "llvm/Target/Mangler.h"
27 MipsMCInstLower::MipsMCInstLower(Mangler *mang, const MachineFunction &mf,
28 MipsAsmPrinter &asmprinter)
29 : Ctx(mf.getContext()), Mang(mang), AsmPrinter(asmprinter) {}
31 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
32 MachineOperandType MOTy,
33 unsigned Offset) const {
34 MipsMCSymbolRefExpr::VariantKind Kind;
35 const MCSymbol *Symbol;
37 switch(MO.getTargetFlags()) {
38 default: assert(0 && "Invalid target flag!");
39 case MipsII::MO_NO_FLAG: Kind = MipsMCSymbolRefExpr::VK_Mips_None; break;
40 case MipsII::MO_GPREL: Kind = MipsMCSymbolRefExpr::VK_Mips_GPREL; break;
41 case MipsII::MO_GOT_CALL: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_CALL; break;
42 case MipsII::MO_GOT: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT; break;
43 case MipsII::MO_ABS_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_ABS_HI; break;
44 case MipsII::MO_ABS_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_ABS_LO; break;
45 case MipsII::MO_TLSGD: Kind = MipsMCSymbolRefExpr::VK_Mips_TLSGD; break;
46 case MipsII::MO_GOTTPREL: Kind = MipsMCSymbolRefExpr::VK_Mips_GOTTPREL; break;
47 case MipsII::MO_TPREL_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_TPREL_HI; break;
48 case MipsII::MO_TPREL_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_TPREL_LO; break;
52 case MachineOperand::MO_MachineBasicBlock:
53 Symbol = MO.getMBB()->getSymbol();
56 case MachineOperand::MO_GlobalAddress:
57 Symbol = Mang->getSymbol(MO.getGlobal());
60 case MachineOperand::MO_BlockAddress:
61 Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
64 case MachineOperand::MO_ExternalSymbol:
65 Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
68 case MachineOperand::MO_JumpTableIndex:
69 Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
72 case MachineOperand::MO_ConstantPoolIndex:
73 Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
75 Offset += MO.getOffset();
79 llvm_unreachable("<unknown operand type>");
82 return MCOperand::CreateExpr(MipsMCSymbolRefExpr::Create(Kind, Symbol, Offset,
86 // If target is Mips1, expand double precision load/store to two single
87 // precision loads/stores.
89 // ldc1 $f0, lo($CPI0_0)($5) gets expanded to the following two instructions:
91 // lwc1 $f0, lo($CPI0_0)($5) and
92 // lwc1 $f1, lo($CPI0_0+4)($5)
94 // lwc1 $f1, lo($CPI0_0)($5) and
95 // lwc1 $f0, lo($CPI0_0+4)($5)
96 void MipsMCInstLower::LowerMips1F64LoadStore(const MachineInstr *MI,
98 SmallVector<MCInst, 4>& MCInsts,
100 const unsigned *SubReg) const {
101 MCInst InstLo, InstHi, DelaySlot;
102 unsigned SingleOpc = (Opc == Mips::LDC1 ? Mips::LWC1 : Mips::SWC1);
103 unsigned RegLo = isLittle ? *SubReg : *(SubReg + 1);
104 unsigned RegHi = isLittle ? *(SubReg + 1) : *SubReg;
105 const MachineOperand &MO1 = MI->getOperand(1);
106 const MachineOperand &MO2 = MI->getOperand(2);
108 InstLo.setOpcode(SingleOpc);
109 InstLo.addOperand(MCOperand::CreateReg(RegLo));
110 InstLo.addOperand(LowerOperand(MO1));
111 InstLo.addOperand(LowerOperand(MO2));
112 MCInsts.push_back(InstLo);
114 InstHi.setOpcode(SingleOpc);
115 InstHi.addOperand(MCOperand::CreateReg(RegHi));
116 InstHi.addOperand(LowerOperand(MO1));
117 if (MO2.isImm())// The offset of addr operand is an immediate: e.g. 0($sp)
118 InstHi.addOperand(MCOperand::CreateImm(MO2.getImm() + 4));
119 else// Otherwise, the offset must be a symbol: e.g. lo($CPI0_0)($5)
120 InstHi.addOperand(LowerSymbolOperand(MO2, MO2.getType(), 4));
121 MCInsts.push_back(InstHi);
123 // Need to insert a NOP in LWC1's delay slot.
124 if (SingleOpc == Mips::LWC1) {
125 DelaySlot.setOpcode(Mips::NOP);
126 MCInsts.push_back(DelaySlot);
130 MCOperand MipsMCInstLower::LowerOperand(const MachineOperand& MO) const {
131 MachineOperandType MOTy = MO.getType();
135 assert(0 && "unknown operand type");
137 case MachineOperand::MO_Register:
138 // Ignore all implicit register operands.
139 if (MO.isImplicit()) break;
140 return MCOperand::CreateReg(MO.getReg());
141 case MachineOperand::MO_Immediate:
142 return MCOperand::CreateImm(MO.getImm());
143 case MachineOperand::MO_MachineBasicBlock:
144 case MachineOperand::MO_GlobalAddress:
145 case MachineOperand::MO_ExternalSymbol:
146 case MachineOperand::MO_JumpTableIndex:
147 case MachineOperand::MO_ConstantPoolIndex:
148 case MachineOperand::MO_BlockAddress:
149 return LowerSymbolOperand(MO, MOTy, 0);
155 void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
156 OutMI.setOpcode(MI->getOpcode());
158 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
159 const MachineOperand &MO = MI->getOperand(i);
160 MCOperand MCOp = LowerOperand(MO);
163 OutMI.addOperand(MCOp);