1 //===- MipsMSAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 def HasMSA : Predicate<"Subtarget.hasMSA()">,
11 AssemblerPredicate<"FeatureMSA">;
13 class MSAInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
14 let Predicates = [HasMSA];
15 let Inst{31-26} = 0b011110;
18 class MSACBranch : MSAInst {
19 let Inst{31-26} = 0b010001;
22 class MSASpecial : MSAInst {
23 let Inst{31-26} = 0b000000;
26 class MSAPseudo<dag outs, dag ins, list<dag> pattern,
27 InstrItinClass itin = IIPseudo>:
28 MipsPseudo<outs, ins, pattern, itin> {
29 let Predicates = [HasMSA];
32 class MSA_BIT_B_FMT<bits<3> major, bits<6> minor>: MSAInst {
37 let Inst{25-23} = major;
38 let Inst{22-19} = 0b1110;
42 let Inst{5-0} = minor;
45 class MSA_BIT_H_FMT<bits<3> major, bits<6> minor>: MSAInst {
50 let Inst{25-23} = major;
51 let Inst{22-20} = 0b110;
55 let Inst{5-0} = minor;
58 class MSA_BIT_W_FMT<bits<3> major, bits<6> minor>: MSAInst {
63 let Inst{25-23} = major;
64 let Inst{22-21} = 0b10;
68 let Inst{5-0} = minor;
71 class MSA_BIT_D_FMT<bits<3> major, bits<6> minor>: MSAInst {
76 let Inst{25-23} = major;
81 let Inst{5-0} = minor;
84 class MSA_2R_FILL_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst {
88 let Inst{25-18} = major;
92 let Inst{5-0} = minor;
95 class MSA_2R_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst {
99 let Inst{25-18} = major;
100 let Inst{17-16} = df;
101 let Inst{15-11} = ws;
103 let Inst{5-0} = minor;
106 class MSA_2RF_FMT<bits<9> major, bits<1> df, bits<6> minor>: MSAInst {
110 let Inst{25-17} = major;
112 let Inst{15-11} = ws;
114 let Inst{5-0} = minor;
117 class MSA_3R_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
122 let Inst{25-23} = major;
123 let Inst{22-21} = df;
124 let Inst{20-16} = wt;
125 let Inst{15-11} = ws;
127 let Inst{5-0} = minor;
130 class MSA_3RF_FMT<bits<4> major, bits<1> df, bits<6> minor>: MSAInst {
135 let Inst{25-22} = major;
137 let Inst{20-16} = wt;
138 let Inst{15-11} = ws;
140 let Inst{5-0} = minor;
143 class MSA_3R_INDEX_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
148 let Inst{25-23} = major;
149 let Inst{22-21} = df;
150 let Inst{20-16} = rt;
151 let Inst{15-11} = ws;
153 let Inst{5-0} = minor;
156 class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst {
160 let Inst{25-16} = major;
161 let Inst{15-11} = ws;
163 let Inst{5-0} = minor;
166 class MSA_ELM_CFCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst {
170 let Inst{25-16} = major;
171 let Inst{15-11} = cs;
173 let Inst{5-0} = minor;
176 class MSA_ELM_CTCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst {
180 let Inst{25-16} = major;
181 let Inst{15-11} = rs;
183 let Inst{5-0} = minor;
186 class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
191 let Inst{25-22} = major;
192 let Inst{21-20} = 0b00;
193 let Inst{19-16} = n{3-0};
194 let Inst{15-11} = ws;
196 let Inst{5-0} = minor;
199 class MSA_ELM_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
204 let Inst{25-22} = major;
205 let Inst{21-19} = 0b100;
206 let Inst{18-16} = n{2-0};
207 let Inst{15-11} = ws;
209 let Inst{5-0} = minor;
212 class MSA_ELM_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
217 let Inst{25-22} = major;
218 let Inst{21-18} = 0b1100;
219 let Inst{17-16} = n{1-0};
220 let Inst{15-11} = ws;
222 let Inst{5-0} = minor;
225 class MSA_ELM_D_FMT<bits<4> major, bits<6> minor>: MSAInst {
230 let Inst{25-22} = major;
231 let Inst{21-17} = 0b11100;
233 let Inst{15-11} = ws;
235 let Inst{5-0} = minor;
238 class MSA_ELM_COPY_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
243 let Inst{25-22} = major;
244 let Inst{21-20} = 0b00;
245 let Inst{19-16} = n{3-0};
246 let Inst{15-11} = ws;
248 let Inst{5-0} = minor;
251 class MSA_ELM_COPY_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
256 let Inst{25-22} = major;
257 let Inst{21-19} = 0b100;
258 let Inst{18-16} = n{2-0};
259 let Inst{15-11} = ws;
261 let Inst{5-0} = minor;
264 class MSA_ELM_COPY_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
269 let Inst{25-22} = major;
270 let Inst{21-18} = 0b1100;
271 let Inst{17-16} = n{1-0};
272 let Inst{15-11} = ws;
274 let Inst{5-0} = minor;
277 class MSA_ELM_INSERT_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
282 let Inst{25-22} = major;
283 let Inst{21-20} = 0b00;
284 let Inst{19-16} = n{3-0};
285 let Inst{15-11} = rs;
287 let Inst{5-0} = minor;
290 class MSA_ELM_INSERT_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
295 let Inst{25-22} = major;
296 let Inst{21-19} = 0b100;
297 let Inst{18-16} = n{2-0};
298 let Inst{15-11} = rs;
300 let Inst{5-0} = minor;
303 class MSA_ELM_INSERT_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
308 let Inst{25-22} = major;
309 let Inst{21-18} = 0b1100;
310 let Inst{17-16} = n{1-0};
311 let Inst{15-11} = rs;
313 let Inst{5-0} = minor;
316 class MSA_I5_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
321 let Inst{25-23} = major;
322 let Inst{22-21} = df;
323 let Inst{20-16} = imm;
324 let Inst{15-11} = ws;
326 let Inst{5-0} = minor;
329 class MSA_I8_FMT<bits<2> major, bits<6> minor>: MSAInst {
334 let Inst{25-24} = major;
335 let Inst{23-16} = u8;
336 let Inst{15-11} = ws;
338 let Inst{5-0} = minor;
341 class MSA_I10_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
345 let Inst{25-23} = major;
346 let Inst{22-21} = df;
347 let Inst{20-11} = s10;
349 let Inst{5-0} = minor;
352 class MSA_MI10_FMT<bits<2> df, bits<4> minor>: MSAInst {
356 let Inst{25-16} = addr{9-0};
357 let Inst{15-11} = addr{20-16};
359 let Inst{5-2} = minor;
363 class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst {
368 let Inst{25-21} = major;
369 let Inst{20-16} = wt;
370 let Inst{15-11} = ws;
372 let Inst{5-0} = minor;
375 class MSA_CBRANCH_FMT<bits<3> major, bits<2> df>: MSACBranch {
379 let Inst{25-23} = major;
380 let Inst{22-21} = df;
381 let Inst{20-16} = wt;
382 let Inst{15-0} = offset;
385 class MSA_CBRANCH_V_FMT<bits<5> major>: MSACBranch {
389 let Inst{25-21} = major;
390 let Inst{20-16} = wt;
391 let Inst{15-0} = offset;
394 class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial {
400 let Inst{25-21} = rs;
401 let Inst{20-16} = rt;
402 let Inst{15-11} = rd;
403 let Inst{10-8} = 0b000;
405 let Inst{5-0} = minor;