1 //===- MipsMSAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 def HasMSA : Predicate<"Subtarget->hasMSA()">,
11 AssemblerPredicate<"FeatureMSA">;
13 class MSAInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
14 let Predicates = [HasMSA];
15 let Inst{31-26} = 0b011110;
18 class MSA64Inst : MSAInst {
19 let Predicates = [HasMSA, HasMips64];
22 class MSACBranch : MSAInst {
23 let Inst{31-26} = 0b010001;
26 class MSASpecial : MSAInst {
27 let Inst{31-26} = 0b000000;
30 class MSA64Special : MSA64Inst {
31 let Inst{31-26} = 0b000000;
34 class MSAPseudo<dag outs, dag ins, list<dag> pattern,
35 InstrItinClass itin = IIPseudo>:
36 MipsPseudo<outs, ins, pattern, itin> {
37 let Predicates = [HasMSA];
40 class MSA_BIT_B_FMT<bits<3> major, bits<6> minor>: MSAInst {
45 let Inst{25-23} = major;
46 let Inst{22-19} = 0b1110;
50 let Inst{5-0} = minor;
53 class MSA_BIT_H_FMT<bits<3> major, bits<6> minor>: MSAInst {
58 let Inst{25-23} = major;
59 let Inst{22-20} = 0b110;
63 let Inst{5-0} = minor;
66 class MSA_BIT_W_FMT<bits<3> major, bits<6> minor>: MSAInst {
71 let Inst{25-23} = major;
72 let Inst{22-21} = 0b10;
76 let Inst{5-0} = minor;
79 class MSA_BIT_D_FMT<bits<3> major, bits<6> minor>: MSAInst {
84 let Inst{25-23} = major;
89 let Inst{5-0} = minor;
92 class MSA_2R_FILL_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst {
96 let Inst{25-18} = major;
100 let Inst{5-0} = minor;
103 class MSA_2R_FILL_D_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSA64Inst {
107 let Inst{25-18} = major;
108 let Inst{17-16} = df;
109 let Inst{15-11} = rs;
111 let Inst{5-0} = minor;
114 class MSA_2R_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst {
118 let Inst{25-18} = major;
119 let Inst{17-16} = df;
120 let Inst{15-11} = ws;
122 let Inst{5-0} = minor;
125 class MSA_2RF_FMT<bits<9> major, bits<1> df, bits<6> minor>: MSAInst {
129 let Inst{25-17} = major;
131 let Inst{15-11} = ws;
133 let Inst{5-0} = minor;
136 class MSA_3R_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
141 let Inst{25-23} = major;
142 let Inst{22-21} = df;
143 let Inst{20-16} = wt;
144 let Inst{15-11} = ws;
146 let Inst{5-0} = minor;
149 class MSA_3RF_FMT<bits<4> major, bits<1> df, bits<6> minor>: MSAInst {
154 let Inst{25-22} = major;
156 let Inst{20-16} = wt;
157 let Inst{15-11} = ws;
159 let Inst{5-0} = minor;
162 class MSA_3R_INDEX_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
167 let Inst{25-23} = major;
168 let Inst{22-21} = df;
169 let Inst{20-16} = rt;
170 let Inst{15-11} = ws;
172 let Inst{5-0} = minor;
175 class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst {
179 let Inst{25-16} = major;
180 let Inst{15-11} = ws;
182 let Inst{5-0} = minor;
185 class MSA_ELM_CFCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst {
189 let Inst{25-16} = major;
190 let Inst{15-11} = cs;
192 let Inst{5-0} = minor;
195 class MSA_ELM_CTCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst {
199 let Inst{25-16} = major;
200 let Inst{15-11} = rs;
202 let Inst{5-0} = minor;
205 class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
210 let Inst{25-22} = major;
211 let Inst{21-20} = 0b00;
212 let Inst{19-16} = n{3-0};
213 let Inst{15-11} = ws;
215 let Inst{5-0} = minor;
218 class MSA_ELM_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
223 let Inst{25-22} = major;
224 let Inst{21-19} = 0b100;
225 let Inst{18-16} = n{2-0};
226 let Inst{15-11} = ws;
228 let Inst{5-0} = minor;
231 class MSA_ELM_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
236 let Inst{25-22} = major;
237 let Inst{21-18} = 0b1100;
238 let Inst{17-16} = n{1-0};
239 let Inst{15-11} = ws;
241 let Inst{5-0} = minor;
244 class MSA_ELM_D_FMT<bits<4> major, bits<6> minor>: MSAInst {
249 let Inst{25-22} = major;
250 let Inst{21-17} = 0b11100;
252 let Inst{15-11} = ws;
254 let Inst{5-0} = minor;
257 class MSA_ELM_COPY_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
262 let Inst{25-22} = major;
263 let Inst{21-20} = 0b00;
264 let Inst{19-16} = n{3-0};
265 let Inst{15-11} = ws;
267 let Inst{5-0} = minor;
270 class MSA_ELM_COPY_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
275 let Inst{25-22} = major;
276 let Inst{21-19} = 0b100;
277 let Inst{18-16} = n{2-0};
278 let Inst{15-11} = ws;
280 let Inst{5-0} = minor;
283 class MSA_ELM_COPY_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
288 let Inst{25-22} = major;
289 let Inst{21-18} = 0b1100;
290 let Inst{17-16} = n{1-0};
291 let Inst{15-11} = ws;
293 let Inst{5-0} = minor;
296 class MSA_ELM_COPY_D_FMT<bits<4> major, bits<6> minor>: MSA64Inst {
301 let Inst{25-22} = major;
302 let Inst{21-17} = 0b11100;
304 let Inst{15-11} = ws;
306 let Inst{5-0} = minor;
309 class MSA_ELM_INSERT_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
314 let Inst{25-22} = major;
315 let Inst{21-20} = 0b00;
316 let Inst{19-16} = n{3-0};
317 let Inst{15-11} = rs;
319 let Inst{5-0} = minor;
322 class MSA_ELM_INSERT_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
327 let Inst{25-22} = major;
328 let Inst{21-19} = 0b100;
329 let Inst{18-16} = n{2-0};
330 let Inst{15-11} = rs;
332 let Inst{5-0} = minor;
335 class MSA_ELM_INSERT_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
340 let Inst{25-22} = major;
341 let Inst{21-18} = 0b1100;
342 let Inst{17-16} = n{1-0};
343 let Inst{15-11} = rs;
345 let Inst{5-0} = minor;
348 class MSA_ELM_INSERT_D_FMT<bits<4> major, bits<6> minor>: MSA64Inst {
353 let Inst{25-22} = major;
354 let Inst{21-17} = 0b11100;
356 let Inst{15-11} = rs;
358 let Inst{5-0} = minor;
361 class MSA_I5_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
366 let Inst{25-23} = major;
367 let Inst{22-21} = df;
368 let Inst{20-16} = imm;
369 let Inst{15-11} = ws;
371 let Inst{5-0} = minor;
374 class MSA_I8_FMT<bits<2> major, bits<6> minor>: MSAInst {
379 let Inst{25-24} = major;
380 let Inst{23-16} = u8;
381 let Inst{15-11} = ws;
383 let Inst{5-0} = minor;
386 class MSA_I10_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
390 let Inst{25-23} = major;
391 let Inst{22-21} = df;
392 let Inst{20-11} = s10;
394 let Inst{5-0} = minor;
397 class MSA_MI10_FMT<bits<2> df, bits<4> minor>: MSAInst {
401 let Inst{25-16} = addr{9-0};
402 let Inst{15-11} = addr{20-16};
404 let Inst{5-2} = minor;
408 class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst {
413 let Inst{25-21} = major;
414 let Inst{20-16} = wt;
415 let Inst{15-11} = ws;
417 let Inst{5-0} = minor;
420 class MSA_CBRANCH_FMT<bits<3> major, bits<2> df>: MSACBranch {
424 let Inst{25-23} = major;
425 let Inst{22-21} = df;
426 let Inst{20-16} = wt;
427 let Inst{15-0} = offset;
430 class MSA_CBRANCH_V_FMT<bits<5> major>: MSACBranch {
434 let Inst{25-21} = major;
435 let Inst{20-16} = wt;
436 let Inst{15-0} = offset;
439 class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial {
445 let Inst{25-21} = rs;
446 let Inst{20-16} = rt;
447 let Inst{15-11} = rd;
448 let Inst{10-8} = 0b000;
450 let Inst{5-0} = minor;
453 class SPECIAL_DLSA_FMT<bits<6> minor>: MSA64Special {
459 let Inst{25-21} = rs;
460 let Inst{20-16} = rt;
461 let Inst{15-11} = rd;
462 let Inst{10-8} = 0b000;
464 let Inst{5-0} = minor;