1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
27 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
28 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
29 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
30 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
31 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
32 [SDNPCommutative, SDNPAssociative]>;
33 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
34 [SDNPCommutative, SDNPAssociative]>;
35 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
43 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
44 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
46 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
47 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
48 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
49 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
53 def uimm3 : Operand<i32> {
54 let PrintMethod = "printUnsignedImm";
57 def uimm4 : Operand<i32> {
58 let PrintMethod = "printUnsignedImm";
61 def uimm8 : Operand<i32> {
62 let PrintMethod = "printUnsignedImm";
65 def simm5 : Operand<i32>;
67 def simm10 : Operand<i32>;
69 def vsplat_uimm3 : Operand<vAny> {
70 let PrintMethod = "printUnsignedImm";
73 def vsplat_uimm4 : Operand<vAny> {
74 let PrintMethod = "printUnsignedImm";
77 def vsplat_uimm5 : Operand<vAny> {
78 let PrintMethod = "printUnsignedImm";
81 def vsplat_uimm6 : Operand<vAny> {
82 let PrintMethod = "printUnsignedImm";
85 def vsplat_uimm8 : Operand<vAny> {
86 let PrintMethod = "printUnsignedImm";
89 def vsplat_simm5 : Operand<vAny>;
91 def vsplat_simm10 : Operand<vAny>;
94 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
95 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
96 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
97 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
98 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
99 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
101 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
102 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
103 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
104 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
105 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
106 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
108 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
109 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
110 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
111 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
112 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
113 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
115 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
116 PatFrag<(ops node:$lhs, node:$rhs),
117 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
119 // ISD::SETFALSE cannot occur
120 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
121 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
122 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
123 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
124 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
125 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
126 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
127 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
128 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
129 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
130 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
131 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
132 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
133 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
134 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
135 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
136 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
137 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
138 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
139 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
140 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
141 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
142 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
143 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
144 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
145 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
146 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
147 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
148 // ISD::SETTRUE cannot occur
149 // ISD::SETFALSE2 cannot occur
150 // ISD::SETTRUE2 cannot occur
152 class vsetcc_type<ValueType ResTy, CondCode CC> :
153 PatFrag<(ops node:$lhs, node:$rhs),
154 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
156 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
157 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
158 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
159 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
160 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
161 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
162 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
163 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
164 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
165 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
166 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
167 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
168 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
169 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
170 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
171 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
172 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
173 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
174 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
175 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
177 def vsplati8 : PatFrag<(ops node:$e0),
178 (v16i8 (build_vector node:$e0, node:$e0,
185 node:$e0, node:$e0))>;
186 def vsplati16 : PatFrag<(ops node:$e0),
187 (v8i16 (build_vector node:$e0, node:$e0,
190 node:$e0, node:$e0))>;
191 def vsplati32 : PatFrag<(ops node:$e0),
192 (v4i32 (build_vector node:$e0, node:$e0,
193 node:$e0, node:$e0))>;
194 def vsplati64 : PatFrag<(ops node:$e0),
195 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>;
197 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
198 SDNodeXForm xform = NOOP_SDNodeXForm>
199 : PatLeaf<frag, pred, xform> {
200 Operand OpClass = opclass;
203 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
204 list<SDNode> roots = [],
205 list<SDNodeProperty> props = []> :
206 ComplexPattern<ty, numops, fn, roots, props> {
207 Operand OpClass = opclass;
210 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
212 [build_vector, bitconvert]>;
214 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
216 [build_vector, bitconvert]>;
218 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
220 [build_vector, bitconvert]>;
222 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
224 [build_vector, bitconvert]>;
226 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
228 [build_vector, bitconvert]>;
230 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
232 [build_vector, bitconvert]>;
234 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
236 [build_vector, bitconvert]>;
238 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
240 [build_vector, bitconvert]>;
242 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
244 [build_vector, bitconvert]>;
246 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
248 [build_vector, bitconvert]>;
250 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
252 [build_vector, bitconvert]>;
254 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
256 [build_vector, bitconvert]>;
258 // Any build_vector that is a constant splat with a value that is an exact
260 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
261 [build_vector, bitconvert]>;
264 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
265 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
267 // Instruction encoding.
268 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
269 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
270 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
271 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
273 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
274 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
275 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
276 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
278 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
279 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
280 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
281 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
283 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
284 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
285 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
286 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
288 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
289 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
290 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
291 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
293 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
294 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
295 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
296 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
298 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
300 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
302 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
303 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
304 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
305 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
307 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
308 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
309 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
310 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
312 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
313 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
314 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
315 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
317 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
318 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
319 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
320 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
322 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
323 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
324 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
325 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
327 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
328 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
329 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
330 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
332 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
333 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
334 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
335 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
337 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
338 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
339 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
340 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
342 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
343 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
344 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
345 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
347 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
348 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
349 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
350 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
352 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
353 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
354 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
355 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
357 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
358 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
359 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
360 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
362 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
364 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
366 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
368 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
370 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
371 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
372 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
373 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
375 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
376 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
377 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
378 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
380 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
381 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
382 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
383 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
385 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
387 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
389 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
391 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
392 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
393 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
394 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
396 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
397 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
398 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
399 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
401 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
402 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
403 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
404 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
406 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
408 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
409 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
410 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
411 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
413 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
414 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
415 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
416 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
418 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
420 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
421 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
422 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
423 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
425 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
426 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
427 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
428 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
430 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
431 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
432 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
433 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
435 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
436 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
437 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
438 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
440 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
441 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
442 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
443 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
445 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
446 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
447 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
448 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
450 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
451 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
452 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
453 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
455 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
456 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
457 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
458 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
460 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
461 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
462 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
464 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
465 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
466 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
468 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
470 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
471 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
472 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
473 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
475 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
476 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
477 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
478 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
480 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
481 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
482 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
484 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
485 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
486 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
488 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
489 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
490 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
492 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
493 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
494 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
496 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
497 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
498 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
500 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
501 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
502 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
504 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
505 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
507 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
508 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
510 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
511 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
513 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
514 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
516 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
517 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
519 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
520 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
522 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
523 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
525 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
526 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
528 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
529 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
531 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
532 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
534 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
535 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
537 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
538 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
540 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
541 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
543 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
544 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
546 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
547 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
549 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
550 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
552 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
553 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
555 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
556 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
558 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
559 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
561 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
562 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
564 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
565 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
567 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
568 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
570 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
571 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
572 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
574 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
575 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
577 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
578 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
580 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
581 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
583 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
584 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
586 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
587 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
589 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
590 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
592 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
593 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
595 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
596 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
598 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
599 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
601 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
602 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
604 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
605 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
607 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
608 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
610 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
611 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
613 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
614 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
616 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
617 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
619 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
620 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
622 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
623 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
625 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
626 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
628 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
629 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
631 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
632 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
634 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
635 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
637 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
638 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
640 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
641 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
643 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
644 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
646 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>;
647 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>;
649 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>;
650 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>;
652 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
653 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
655 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
656 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
658 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
659 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
661 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
662 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
663 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
665 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
666 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
667 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
669 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
670 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
671 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
673 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
674 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
675 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
677 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
678 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
679 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
680 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
682 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
683 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
684 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
685 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
687 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
688 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
689 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
690 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
692 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
693 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
694 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
695 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
697 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
698 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
699 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
701 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
702 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
703 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
704 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
706 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
707 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
708 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
709 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
711 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
712 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
713 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
714 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
716 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
717 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
718 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
719 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
721 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
722 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
724 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
725 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
727 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
728 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
729 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
730 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
732 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
733 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
734 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
735 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
737 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
738 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
739 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
740 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
742 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
743 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
744 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
745 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
747 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
748 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
749 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
750 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
752 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
753 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
754 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
755 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
757 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
758 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
759 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
760 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
762 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
763 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
764 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
765 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
767 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
768 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
769 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
770 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
772 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
773 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
774 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
775 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
777 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
778 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
779 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
780 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
782 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
783 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
784 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
785 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
787 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
788 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
789 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
790 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
792 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
794 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
795 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
797 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
798 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
800 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
801 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
802 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
803 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
805 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>;
806 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>;
808 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
809 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
811 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
812 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
813 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
814 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
816 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
817 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
818 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
819 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
821 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
822 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
823 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
824 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
826 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
828 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
830 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
832 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
834 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
835 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
836 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
837 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
839 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
840 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
841 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
842 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
844 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
845 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
846 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
847 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
849 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
850 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
851 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
852 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
854 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
855 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
856 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
857 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
859 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
860 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
861 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
863 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
864 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
865 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
866 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
868 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
869 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
870 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
871 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
873 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
874 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
875 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
876 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
878 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
879 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
880 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
881 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
883 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
884 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
885 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
886 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
888 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
889 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
890 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
891 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
893 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
894 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
895 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
896 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
898 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
899 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
900 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
901 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
903 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
904 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
905 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
906 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
908 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
909 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
910 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
911 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
913 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
914 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
915 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
916 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
918 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
919 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
920 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
921 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
923 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
924 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
925 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
926 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
928 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
929 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
930 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
931 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
933 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
934 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
935 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
936 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
938 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
939 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
940 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
941 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
943 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
944 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
945 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
946 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
948 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
949 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
950 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
951 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
953 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
954 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
955 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
956 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
958 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
959 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
960 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
961 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
963 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
964 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
965 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
966 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
968 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
969 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
970 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
971 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
973 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
974 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
975 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
976 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
978 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
980 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
983 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
984 RegisterClass RCWD, RegisterClass RCWS = RCWD,
985 InstrItinClass itin = NoItinerary> {
986 dag OutOperandList = (outs RCWD:$wd);
987 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
988 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
989 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
990 InstrItinClass Itinerary = itin;
993 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
994 RegisterClass RCWD, RegisterClass RCWS = RCWD,
995 InstrItinClass itin = NoItinerary> {
996 dag OutOperandList = (outs RCWD:$wd);
997 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
998 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
999 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
1000 InstrItinClass Itinerary = itin;
1003 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1004 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1005 InstrItinClass itin = NoItinerary> {
1006 dag OutOperandList = (outs RCWD:$wd);
1007 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
1008 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
1009 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
1010 InstrItinClass Itinerary = itin;
1013 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1014 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1015 InstrItinClass itin = NoItinerary> {
1016 dag OutOperandList = (outs RCWD:$wd);
1017 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
1018 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
1019 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
1020 InstrItinClass Itinerary = itin;
1023 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1024 SplatComplexPattern SplatImm, RegisterClass RCWD,
1025 RegisterClass RCWS = RCWD,
1026 InstrItinClass itin = NoItinerary> {
1027 dag OutOperandList = (outs RCWD:$wd);
1028 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u);
1029 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u");
1030 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))];
1031 InstrItinClass Itinerary = itin;
1034 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1035 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS,
1036 InstrItinClass itin = NoItinerary> {
1037 dag OutOperandList = (outs RCD:$rd);
1038 dag InOperandList = (ins RCWS:$ws, uimm4:$n);
1039 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1040 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))];
1041 InstrItinClass Itinerary = itin;
1044 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1045 SplatComplexPattern SplatImm, RegisterClass RCWD,
1046 RegisterClass RCWS = RCWD,
1047 InstrItinClass itin = NoItinerary> {
1048 dag OutOperandList = (outs RCWD:$wd);
1049 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm);
1050 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1051 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))];
1052 InstrItinClass Itinerary = itin;
1055 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1056 SplatComplexPattern SplatImm, RegisterClass RCWD,
1057 RegisterClass RCWS = RCWD,
1058 InstrItinClass itin = NoItinerary> {
1059 dag OutOperandList = (outs RCWD:$wd);
1060 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8);
1061 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1062 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))];
1063 InstrItinClass Itinerary = itin;
1066 // This class is deprecated and will be removed in the next few patches
1067 class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1068 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1069 InstrItinClass itin = NoItinerary> {
1070 dag OutOperandList = (outs RCWD:$wd);
1071 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
1072 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1073 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
1074 InstrItinClass Itinerary = itin;
1077 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD,
1078 InstrItinClass itin = NoItinerary> {
1079 dag OutOperandList = (outs RCWD:$wd);
1080 dag InOperandList = (ins vsplat_simm10:$i10);
1081 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
1082 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1083 list<dag> Pattern = [];
1084 bit hasSideEffects = 0;
1085 InstrItinClass Itinerary = itin;
1088 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1089 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1090 InstrItinClass itin = NoItinerary> {
1091 dag OutOperandList = (outs RCWD:$wd);
1092 dag InOperandList = (ins RCWS:$ws);
1093 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1094 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
1095 InstrItinClass Itinerary = itin;
1098 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1099 SDPatternOperator OpNode, RegisterClass RCWD,
1100 RegisterClass RCWS = RCWD,
1101 InstrItinClass itin = NoItinerary> {
1102 dag OutOperandList = (outs RCWD:$wd);
1103 dag InOperandList = (ins RCWS:$ws);
1104 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1105 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))];
1106 InstrItinClass Itinerary = itin;
1109 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1110 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1111 InstrItinClass itin = NoItinerary> :
1112 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>;
1115 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1116 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1117 RegisterClass RCWT = RCWD,
1118 InstrItinClass itin = NoItinerary> {
1119 dag OutOperandList = (outs RCWD:$wd);
1120 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1121 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1122 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1123 InstrItinClass Itinerary = itin;
1126 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterClass RCWD,
1127 RegisterClass RCWS = RCWD,
1128 RegisterClass RCWT = RCWD,
1129 InstrItinClass itin = NoItinerary> {
1130 dag OutOperandList = (outs RCWD:$wd);
1131 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
1132 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1133 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF RCWD:$wd_in, RCWS:$ws,
1135 string Constraints = "$wd = $wd_in";
1136 InstrItinClass Itinerary = itin;
1139 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1140 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1141 RegisterClass RCWT = RCWD,
1142 InstrItinClass itin = NoItinerary> {
1143 dag OutOperandList = (outs RCWD:$wd);
1144 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
1145 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1146 list<dag> Pattern = [(set RCWD:$wd,
1147 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))];
1148 InstrItinClass Itinerary = itin;
1149 string Constraints = "$wd = $wd_in";
1152 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1153 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1154 RegisterClass RCWT = RCWD,
1155 InstrItinClass itin = NoItinerary> :
1156 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
1158 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1159 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1160 RegisterClass RCWT = RCWD,
1161 InstrItinClass itin = NoItinerary> :
1162 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
1164 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
1165 dag OutOperandList = (outs);
1166 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
1167 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
1168 list<dag> Pattern = [];
1169 InstrItinClass Itinerary = IIBranch;
1171 bit isTerminator = 1;
1172 bit hasDelaySlot = 1;
1173 list<Register> Defs = [AT];
1176 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1177 RegisterClass RCD, RegisterClass RCWS,
1178 InstrItinClass itin = NoItinerary> {
1179 dag OutOperandList = (outs RCD:$wd);
1180 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n);
1181 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1182 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
1185 InstrItinClass Itinerary = itin;
1186 string Constraints = "$wd = $wd_in";
1189 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1190 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1191 InstrItinClass itin = NoItinerary> {
1192 dag OutOperandList = (outs RCWD:$wd);
1193 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
1194 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1195 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
1198 InstrItinClass Itinerary = itin;
1199 string Constraints = "$wd = $wd_in";
1202 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1203 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1204 RegisterClass RCWT = RCWD,
1205 InstrItinClass itin = NoItinerary> {
1206 dag OutOperandList = (outs RCWD:$wd);
1207 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1208 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1209 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1210 InstrItinClass Itinerary = itin;
1213 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD,
1214 RegisterClass RCWS = RCWD,
1215 RegisterClass RCWT = RCWD> :
1216 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt),
1217 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>;
1219 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>,
1221 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>,
1223 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>,
1225 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>,
1228 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>,
1230 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>,
1232 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>,
1234 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>,
1237 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>,
1239 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>,
1241 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>,
1243 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>,
1246 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>,
1248 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>,
1250 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>,
1252 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>,
1255 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable;
1256 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable;
1257 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable;
1258 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable;
1260 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>;
1261 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>;
1262 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>;
1263 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>;
1265 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>;
1266 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>;
1267 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>;
1268 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>;
1270 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>;
1272 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>;
1273 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>;
1274 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>;
1275 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>;
1277 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>;
1278 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>;
1279 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>;
1280 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>;
1282 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>,
1284 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>,
1286 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>,
1288 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>,
1291 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>,
1293 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>,
1295 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>,
1297 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>,
1300 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>,
1302 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>,
1304 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>,
1306 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>,
1309 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>,
1311 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>,
1313 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>,
1315 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>,
1318 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>;
1319 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>;
1320 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>;
1321 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>;
1323 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1324 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1325 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1326 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1328 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>;
1329 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>;
1330 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>;
1331 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>;
1333 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1335 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1337 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1339 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1342 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>;
1343 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>;
1344 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>;
1345 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>;
1347 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1349 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1351 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1353 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1356 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1358 class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1360 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1362 class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1364 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>;
1365 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>;
1366 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>;
1367 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>;
1369 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1370 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1371 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1372 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1374 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1375 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1376 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1377 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1379 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1382 dag OutOperandList = (outs MSA128B:$wd);
1383 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt);
1384 string AsmString = "bsel.v\t$wd, $ws, $wt";
1385 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws,
1387 InstrItinClass Itinerary = NoItinerary;
1388 string Constraints = "$wd = $wd_in";
1391 class BSELI_B_DESC {
1392 dag OutOperandList = (outs MSA128B:$wd);
1393 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8);
1394 string AsmString = "bseli.b\t$wd, $ws, $u8";
1395 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in,
1397 vsplati8_uimm8:$u8))];
1398 InstrItinClass Itinerary = NoItinerary;
1399 string Constraints = "$wd = $wd_in";
1402 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>;
1403 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>;
1404 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>;
1405 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>;
1407 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1408 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1409 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1410 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1412 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1413 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1414 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1415 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1417 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1419 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>,
1421 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>,
1423 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>,
1425 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>,
1428 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1430 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1432 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1434 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1438 dag OutOperandList = (outs GPR32:$rd);
1439 dag InOperandList = (ins MSACtrl:$cs);
1440 string AsmString = "cfcmsa\t$rd, $cs";
1441 InstrItinClass Itinerary = NoItinerary;
1442 bit hasSideEffects = 1;
1445 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>;
1446 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>;
1447 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>;
1448 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>;
1450 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>;
1451 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>;
1452 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>;
1453 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>;
1455 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1456 vsplati8_simm5, MSA128B>;
1457 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1458 vsplati16_simm5, MSA128H>;
1459 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1460 vsplati32_simm5, MSA128W>;
1461 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1462 vsplati64_simm5, MSA128D>;
1464 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1465 vsplati8_uimm5, MSA128B>;
1466 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1467 vsplati16_uimm5, MSA128H>;
1468 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1469 vsplati32_uimm5, MSA128W>;
1470 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1471 vsplati64_uimm5, MSA128D>;
1473 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>;
1474 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>;
1475 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>;
1476 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>;
1478 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>;
1479 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>;
1480 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>;
1481 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>;
1483 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1484 vsplati8_simm5, MSA128B>;
1485 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1486 vsplati16_simm5, MSA128H>;
1487 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1488 vsplati32_simm5, MSA128W>;
1489 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1490 vsplati64_simm5, MSA128D>;
1492 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1493 vsplati8_uimm5, MSA128B>;
1494 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1495 vsplati16_uimm5, MSA128H>;
1496 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1497 vsplati32_uimm5, MSA128W>;
1498 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1499 vsplati64_uimm5, MSA128D>;
1501 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1503 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1505 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1508 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1510 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1512 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1516 dag OutOperandList = (outs);
1517 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1518 string AsmString = "ctcmsa\t$cd, $rs";
1519 InstrItinClass Itinerary = NoItinerary;
1520 bit hasSideEffects = 1;
1523 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>;
1524 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>;
1525 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>;
1526 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>;
1528 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>;
1529 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>;
1530 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>;
1531 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>;
1533 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H,
1534 MSA128B, MSA128B>, IsCommutable;
1535 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W,
1536 MSA128H, MSA128H>, IsCommutable;
1537 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D,
1538 MSA128W, MSA128W>, IsCommutable;
1540 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H,
1541 MSA128B, MSA128B>, IsCommutable;
1542 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W,
1543 MSA128H, MSA128H>, IsCommutable;
1544 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D,
1545 MSA128W, MSA128W>, IsCommutable;
1547 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1548 MSA128H, MSA128B, MSA128B>,
1550 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1551 MSA128W, MSA128H, MSA128H>,
1553 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1554 MSA128D, MSA128W, MSA128W>,
1557 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1558 MSA128H, MSA128B, MSA128B>,
1560 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1561 MSA128W, MSA128H, MSA128H>,
1563 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1564 MSA128D, MSA128W, MSA128W>,
1567 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1568 MSA128H, MSA128B, MSA128B>;
1569 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1570 MSA128W, MSA128H, MSA128H>;
1571 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1572 MSA128D, MSA128W, MSA128W>;
1574 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1575 MSA128H, MSA128B, MSA128B>;
1576 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1577 MSA128W, MSA128H, MSA128H>;
1578 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1579 MSA128D, MSA128W, MSA128W>;
1581 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable;
1582 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable;
1584 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>,
1586 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>,
1589 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>,
1591 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>,
1594 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1596 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1599 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>;
1600 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>;
1602 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>;
1603 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>;
1605 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>,
1607 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>,
1610 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>,
1612 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>,
1615 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>,
1617 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>,
1620 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>,
1622 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>,
1625 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>,
1627 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>,
1630 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>,
1632 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>,
1635 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>,
1637 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>,
1640 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>;
1641 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>;
1643 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1644 MSA128H, MSA128W, MSA128W>;
1645 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1646 MSA128W, MSA128D, MSA128D>;
1648 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>;
1649 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>;
1651 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1653 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1656 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1658 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1661 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1663 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1666 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1668 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1671 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1673 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1676 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1678 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1681 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B,
1683 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H,
1685 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W,
1688 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>;
1689 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>;
1691 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1693 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1696 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>;
1697 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>;
1699 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1701 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1704 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>;
1705 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>;
1707 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1709 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1712 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1714 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1717 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>;
1718 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>;
1720 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>;
1721 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>;
1723 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>;
1724 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>;
1726 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1728 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1731 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>;
1732 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>;
1734 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>;
1735 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>;
1737 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>;
1738 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>;
1740 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>;
1741 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>;
1743 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>;
1744 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>;
1746 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>;
1747 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>;
1749 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>;
1750 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>;
1752 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>;
1753 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>;
1755 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>;
1756 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>;
1758 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>;
1759 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>;
1761 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>;
1762 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>;
1764 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>;
1765 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>;
1767 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>;
1768 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>;
1770 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1772 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1775 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1777 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1780 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1782 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1785 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1787 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1790 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1791 MSA128H, MSA128W, MSA128W>;
1792 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1793 MSA128W, MSA128D, MSA128D>;
1795 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H,
1797 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W,
1799 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D,
1802 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H,
1804 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W,
1806 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D,
1809 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H,
1811 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W,
1813 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D,
1816 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H,
1818 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W,
1820 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D,
1823 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>;
1824 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>;
1825 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>;
1826 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>;
1828 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>;
1829 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>;
1830 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>;
1831 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>;
1833 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>;
1834 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>;
1835 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>;
1836 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>;
1838 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>;
1839 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>;
1840 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>;
1841 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>;
1843 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B,
1845 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H,
1847 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W,
1850 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1851 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1852 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1853 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1855 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1856 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
1857 ComplexPattern Addr = addrRegImm,
1858 InstrItinClass itin = NoItinerary> {
1859 dag OutOperandList = (outs RCWD:$wd);
1860 dag InOperandList = (ins MemOpnd:$addr);
1861 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1862 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1863 InstrItinClass Itinerary = itin;
1866 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1867 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1868 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1869 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1871 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>;
1872 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>;
1873 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>;
1874 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>;
1876 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1877 ValueType TyNode, RegisterClass RCWD,
1878 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1879 InstrItinClass itin = NoItinerary> {
1880 dag OutOperandList = (outs RCWD:$wd);
1881 dag InOperandList = (ins MemOpnd:$addr);
1882 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1883 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1884 InstrItinClass Itinerary = itin;
1887 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1888 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1889 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1890 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1892 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
1894 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
1897 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
1899 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
1902 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>;
1903 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>;
1904 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>;
1905 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>;
1907 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>;
1908 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>;
1909 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>;
1910 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>;
1912 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128B>;
1913 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128H>;
1914 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128W>;
1915 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128D>;
1917 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128B>;
1918 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128H>;
1919 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128W>;
1920 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128D>;
1922 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
1924 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
1926 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
1928 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
1931 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
1933 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
1935 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
1937 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
1940 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>;
1941 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>;
1942 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>;
1943 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>;
1945 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128B>;
1946 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128H>;
1947 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128W>;
1948 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128D>;
1950 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128B>;
1951 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128H>;
1952 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128W>;
1953 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128D>;
1955 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
1957 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
1959 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
1961 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
1964 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
1966 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
1968 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
1970 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
1973 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>;
1974 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>;
1975 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>;
1976 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>;
1978 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>;
1979 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>;
1980 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>;
1981 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>;
1984 dag OutOperandList = (outs MSA128B:$wd);
1985 dag InOperandList = (ins MSA128B:$ws);
1986 string AsmString = "move.v\t$wd, $ws";
1987 list<dag> Pattern = [];
1988 InstrItinClass Itinerary = NoItinerary;
1991 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
1993 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
1996 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
1998 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2001 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>;
2002 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>;
2003 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>;
2004 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>;
2006 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>;
2007 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>;
2009 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2011 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2014 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>;
2015 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>;
2016 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>;
2017 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>;
2019 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
2020 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
2021 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
2022 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
2024 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>;
2025 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>;
2026 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>;
2027 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>;
2029 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>;
2030 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>;
2031 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>;
2032 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>;
2034 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2037 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>;
2038 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>;
2039 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>;
2040 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>;
2042 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>;
2044 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>;
2045 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>;
2046 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>;
2047 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>;
2049 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>;
2050 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>;
2051 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>;
2052 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>;
2054 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>;
2055 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>;
2056 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>;
2057 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>;
2059 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
2060 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
2061 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
2062 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
2064 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
2065 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
2066 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
2067 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
2069 class SHF_B_DESC : MSA_I8_X_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>;
2070 class SHF_H_DESC : MSA_I8_X_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>;
2071 class SHF_W_DESC : MSA_I8_X_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>;
2073 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>;
2074 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>;
2075 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>;
2076 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>;
2078 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
2079 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
2080 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
2081 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
2083 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>;
2084 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>;
2085 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>;
2086 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>;
2088 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2090 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2092 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2094 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2097 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B,
2099 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H,
2101 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W,
2103 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D,
2106 class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
2108 class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
2110 class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
2112 class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
2115 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>;
2116 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>;
2117 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>;
2118 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>;
2120 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2122 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2124 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2126 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2129 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>;
2130 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>;
2131 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>;
2132 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>;
2134 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
2135 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
2136 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
2137 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
2139 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>;
2140 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>;
2141 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>;
2142 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>;
2144 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2146 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2148 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2150 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2153 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>;
2154 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>;
2155 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>;
2156 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>;
2158 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
2159 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
2160 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
2161 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
2163 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2164 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2165 ComplexPattern Addr = addrRegImm,
2166 InstrItinClass itin = NoItinerary> {
2167 dag OutOperandList = (outs);
2168 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2169 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2170 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2171 InstrItinClass Itinerary = itin;
2174 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
2175 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
2176 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
2177 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
2179 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2180 ValueType TyNode, RegisterClass RCWD,
2181 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
2182 InstrItinClass itin = NoItinerary> {
2183 dag OutOperandList = (outs);
2184 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2185 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2186 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2187 InstrItinClass Itinerary = itin;
2190 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
2191 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
2192 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
2193 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
2195 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>;
2196 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>;
2197 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>;
2198 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>;
2200 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>;
2201 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>;
2202 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>;
2203 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>;
2205 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2207 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2209 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2211 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2214 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2216 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2218 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2220 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2223 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>;
2224 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>;
2225 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>;
2226 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>;
2228 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>;
2229 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>;
2230 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>;
2231 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>;
2233 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128B>;
2234 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128H>;
2235 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128W>;
2236 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128D>;
2238 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>;
2239 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>;
2240 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>;
2241 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>;
2243 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>;
2245 // Instruction defs.
2246 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2247 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2248 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2249 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2251 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2252 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2253 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2254 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2256 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2257 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2258 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2259 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2261 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2262 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2263 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2264 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2266 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2267 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2268 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2269 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2271 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2272 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2273 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2274 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2276 def AND_V : AND_V_ENC, AND_V_DESC;
2277 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2278 PseudoInstExpansion<(AND_V MSA128B:$wd,
2279 MSA128B:$ws, MSA128B:$wt)>;
2280 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2281 PseudoInstExpansion<(AND_V MSA128B:$wd,
2282 MSA128B:$ws, MSA128B:$wt)>;
2283 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2284 PseudoInstExpansion<(AND_V MSA128B:$wd,
2285 MSA128B:$ws, MSA128B:$wt)>;
2287 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2289 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2290 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2291 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2292 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2294 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2295 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2296 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2297 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2299 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2300 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2301 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2302 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2304 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2305 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2306 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2307 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2309 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2310 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2311 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2312 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2314 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2315 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2316 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2317 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2319 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2320 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2321 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2322 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2324 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2325 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2326 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2327 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2329 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2330 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2331 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2332 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2334 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2335 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2336 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2337 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2339 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2340 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2341 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2342 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2344 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2345 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2346 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2347 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2349 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2351 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2353 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2355 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2357 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2358 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2359 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2360 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2362 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2363 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2364 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2365 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2367 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2368 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2369 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2370 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2372 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2374 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2376 class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> :
2377 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt),
2378 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>,
2379 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws,
2381 let Constraints = "$wd_in = $wd";
2384 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>;
2385 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>;
2386 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>;
2387 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>;
2388 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>;
2390 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2392 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2393 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2394 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2395 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2397 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2398 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2399 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2400 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2402 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2403 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2404 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2405 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2407 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2409 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2410 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2411 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2412 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2414 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2415 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2416 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2417 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2419 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2421 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2422 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2423 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2424 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2426 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2427 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2428 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2429 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2431 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2432 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2433 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2434 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2436 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2437 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2438 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2439 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2441 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2442 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2443 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2444 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2446 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2447 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2448 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2449 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2451 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2452 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2453 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2454 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2456 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2457 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2458 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2459 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2461 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2462 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2463 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2465 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2466 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2467 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2469 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2471 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2472 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2473 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2474 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2476 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2477 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2478 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2479 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2481 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2482 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2483 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2485 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2486 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2487 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2489 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2490 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2491 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2493 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2494 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2495 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2497 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2498 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2499 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2501 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2502 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2503 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2505 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2506 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2508 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2509 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2511 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2512 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2514 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2515 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2517 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2518 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2520 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2521 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2523 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2524 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2526 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2527 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2529 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2530 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2532 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2533 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2535 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2536 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2538 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2539 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2541 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2542 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2544 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2545 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2547 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2548 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2550 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2551 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2553 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2554 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2556 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2557 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2559 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2560 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2562 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2563 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2565 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2566 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2568 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2569 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2571 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2572 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2573 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2575 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2576 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2578 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2579 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2581 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2582 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2584 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2585 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2587 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2588 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2590 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2591 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2593 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2594 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2596 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2597 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2599 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2600 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2602 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2603 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2605 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2606 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2608 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2609 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2611 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2612 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2614 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2615 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2617 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2618 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2620 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2621 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2623 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2624 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2626 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2627 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2629 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2630 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2632 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2633 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2635 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2636 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2638 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2639 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2641 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2642 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2644 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2645 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2647 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2648 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2650 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2651 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2653 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2654 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2656 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2657 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2659 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2660 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2662 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2663 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2664 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2666 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2667 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2668 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2670 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2671 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2672 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2674 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2675 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2676 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2678 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2679 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2680 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2681 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2683 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2684 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2685 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2686 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2688 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2689 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2690 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2691 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2693 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2694 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2695 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2696 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2698 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2699 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2700 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2702 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2703 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2704 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2705 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2707 def LD_B: LD_B_ENC, LD_B_DESC;
2708 def LD_H: LD_H_ENC, LD_H_DESC;
2709 def LD_W: LD_W_ENC, LD_W_DESC;
2710 def LD_D: LD_D_ENC, LD_D_DESC;
2712 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2713 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2714 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2715 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2717 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2718 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2719 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2720 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2722 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2723 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2725 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2726 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2728 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2729 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2730 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2731 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2733 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2734 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2735 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2736 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2738 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2739 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2740 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2741 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2743 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2744 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2745 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2746 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2748 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2749 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2750 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2751 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2753 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2754 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2755 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2756 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2758 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2759 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2760 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2761 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2763 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2764 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2765 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2766 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2768 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2769 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2770 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2771 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2773 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2774 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2775 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2776 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2778 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2779 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2780 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2781 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2783 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2784 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2785 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2786 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2788 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2789 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2790 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2791 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2793 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2795 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2796 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2798 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2799 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2801 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2802 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2803 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2804 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2806 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2807 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2809 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2810 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2812 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2813 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2814 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2815 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2817 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2818 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2819 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2820 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2822 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2823 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2824 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2825 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2827 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2828 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
2829 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2830 MSA128B:$ws, MSA128B:$wt)>;
2831 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
2832 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2833 MSA128B:$ws, MSA128B:$wt)>;
2834 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
2835 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2836 MSA128B:$ws, MSA128B:$wt)>;
2838 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2840 def OR_V : OR_V_ENC, OR_V_DESC;
2841 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
2842 PseudoInstExpansion<(OR_V MSA128B:$wd,
2843 MSA128B:$ws, MSA128B:$wt)>;
2844 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
2845 PseudoInstExpansion<(OR_V MSA128B:$wd,
2846 MSA128B:$ws, MSA128B:$wt)>;
2847 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
2848 PseudoInstExpansion<(OR_V MSA128B:$wd,
2849 MSA128B:$ws, MSA128B:$wt)>;
2851 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2853 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2854 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2855 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2856 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2858 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2859 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2860 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2861 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2863 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2864 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2865 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2866 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2868 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2869 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2870 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2871 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
2873 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
2874 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
2875 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
2876 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
2878 def SHF_B : SHF_B_ENC, SHF_B_DESC;
2879 def SHF_H : SHF_H_ENC, SHF_H_DESC;
2880 def SHF_W : SHF_W_ENC, SHF_W_DESC;
2882 def SLD_B : SLD_B_ENC, SLD_B_DESC;
2883 def SLD_H : SLD_H_ENC, SLD_H_DESC;
2884 def SLD_W : SLD_W_ENC, SLD_W_DESC;
2885 def SLD_D : SLD_D_ENC, SLD_D_DESC;
2887 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
2888 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
2889 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
2890 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
2892 def SLL_B : SLL_B_ENC, SLL_B_DESC;
2893 def SLL_H : SLL_H_ENC, SLL_H_DESC;
2894 def SLL_W : SLL_W_ENC, SLL_W_DESC;
2895 def SLL_D : SLL_D_ENC, SLL_D_DESC;
2897 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
2898 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
2899 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
2900 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
2902 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
2903 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
2904 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
2905 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
2907 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
2908 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
2909 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
2910 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
2912 def SRA_B : SRA_B_ENC, SRA_B_DESC;
2913 def SRA_H : SRA_H_ENC, SRA_H_DESC;
2914 def SRA_W : SRA_W_ENC, SRA_W_DESC;
2915 def SRA_D : SRA_D_ENC, SRA_D_DESC;
2917 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
2918 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
2919 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
2920 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
2922 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
2923 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
2924 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
2925 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
2927 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
2928 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
2929 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
2930 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
2932 def SRL_B : SRL_B_ENC, SRL_B_DESC;
2933 def SRL_H : SRL_H_ENC, SRL_H_DESC;
2934 def SRL_W : SRL_W_ENC, SRL_W_DESC;
2935 def SRL_D : SRL_D_ENC, SRL_D_DESC;
2937 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
2938 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
2939 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
2940 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
2942 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
2943 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
2944 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
2945 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
2947 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
2948 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
2949 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
2950 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
2952 def ST_B: ST_B_ENC, ST_B_DESC;
2953 def ST_H: ST_H_ENC, ST_H_DESC;
2954 def ST_W: ST_W_ENC, ST_W_DESC;
2955 def ST_D: ST_D_ENC, ST_D_DESC;
2957 def STX_B: STX_B_ENC, STX_B_DESC;
2958 def STX_H: STX_H_ENC, STX_H_DESC;
2959 def STX_W: STX_W_ENC, STX_W_DESC;
2960 def STX_D: STX_D_ENC, STX_D_DESC;
2962 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
2963 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
2964 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
2965 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
2967 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
2968 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
2969 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
2970 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
2972 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
2973 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
2974 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
2975 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
2977 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
2978 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
2979 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
2980 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
2982 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
2983 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
2984 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
2985 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
2987 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
2988 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
2989 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
2990 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
2992 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
2993 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
2994 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
2995 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
2997 def XOR_V : XOR_V_ENC, XOR_V_DESC;
2998 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
2999 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3000 MSA128B:$ws, MSA128B:$wt)>;
3001 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3002 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3003 MSA128B:$ws, MSA128B:$wt)>;
3004 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3005 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3006 MSA128B:$ws, MSA128B:$wt)>;
3008 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3011 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3012 Pat<pattern, result>, Requires<pred>;
3014 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3015 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3017 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3018 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3019 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3020 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3021 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3022 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3023 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3025 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3026 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3027 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3029 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3030 (ST_B MSA128B:$ws, addr:$addr)>;
3031 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3032 (ST_H MSA128H:$ws, addr:$addr)>;
3033 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3034 (ST_W MSA128W:$ws, addr:$addr)>;
3035 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3036 (ST_D MSA128D:$ws, addr:$addr)>;
3037 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3038 (ST_H MSA128H:$ws, addr:$addr)>;
3039 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3040 (ST_W MSA128W:$ws, addr:$addr)>;
3041 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3042 (ST_D MSA128D:$ws, addr:$addr)>;
3044 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3045 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3046 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3047 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3048 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3049 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3051 class MSA_FABS_PSEUDO_DESC_BASE<RegisterClass RCWD, RegisterClass RCWS = RCWD,
3052 InstrItinClass itin = NoItinerary> :
3053 MipsPseudo<(outs RCWD:$wd),
3055 [(set RCWD:$wd, (fabs RCWS:$ws))]> {
3056 InstrItinClass Itinerary = itin;
3058 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128W>,
3059 PseudoInstExpansion<(FMAX_A_W MSA128W:$wd, MSA128W:$ws,
3061 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128D>,
3062 PseudoInstExpansion<(FMAX_A_D MSA128D:$wd, MSA128D:$ws,
3065 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3066 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3067 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3068 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3070 // These are endian-independant because the element size doesnt change
3071 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3072 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3073 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3074 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3075 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3076 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3078 // Little endian bitcasts are always no-ops
3079 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3080 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3081 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3082 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3083 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3084 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3086 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3087 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3088 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3089 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3090 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3092 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3093 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3094 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3095 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3096 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3098 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3099 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3100 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3101 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3102 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3104 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3105 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3106 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3107 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3108 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3110 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3111 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3112 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3113 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3114 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3116 // Big endian bitcasts expand to shuffle instructions.
3117 // This is because bitcast is defined to be a store/load sequence and the
3118 // vector store/load instructions are mixed-endian with respect to the vector
3119 // as a whole (little endian with respect to element order, but big endian
3122 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3123 RegisterClass DstRC, MSAInst Insn,
3124 RegisterClass ViaRC> :
3125 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3126 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3130 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3131 RegisterClass DstRC, MSAInst Insn,
3132 RegisterClass ViaRC> :
3133 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3134 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3138 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3139 RegisterClass DstRC> :
3140 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3142 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3143 RegisterClass DstRC> :
3144 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3146 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3147 RegisterClass DstRC> :
3148 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3152 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3157 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3158 RegisterClass DstRC> :
3159 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3161 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3162 RegisterClass DstRC> :
3163 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3165 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3166 RegisterClass DstRC> :
3167 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3169 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3170 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3171 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3172 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3173 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3174 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3176 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3177 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3178 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3179 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3180 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3182 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3183 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3184 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3185 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3186 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3188 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3189 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3190 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3191 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3192 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3194 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3195 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3196 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3197 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3198 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3200 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3201 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3202 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3203 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3204 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3206 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3207 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3208 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3209 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3210 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3212 // Pseudos used to implement BNZ.df, and BZ.df
3214 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3216 InstrItinClass itin = NoItinerary> :
3217 MipsPseudo<(outs GPR32:$dst),
3219 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3220 bit usesCustomInserter = 1;
3223 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3224 MSA128B, NoItinerary>;
3225 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3226 MSA128H, NoItinerary>;
3227 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3228 MSA128W, NoItinerary>;
3229 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3230 MSA128D, NoItinerary>;
3231 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3232 MSA128B, NoItinerary>;
3234 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3235 MSA128B, NoItinerary>;
3236 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3237 MSA128H, NoItinerary>;
3238 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3239 MSA128W, NoItinerary>;
3240 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3241 MSA128D, NoItinerary>;
3242 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3243 MSA128B, NoItinerary>;