1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
16 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
17 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
18 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
19 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
22 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
23 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
25 def uimm3 : Operand<i32> {
26 let PrintMethod = "printUnsignedImm";
29 def uimm4 : Operand<i32> {
30 let PrintMethod = "printUnsignedImm";
33 def uimm8 : Operand<i32> {
34 let PrintMethod = "printUnsignedImm";
37 def simm5 : Operand<i32>;
39 def simm10 : Operand<i32>;
41 // Instruction encoding.
42 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
43 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
44 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
45 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
47 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
48 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
49 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
50 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
52 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
53 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
54 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
55 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
57 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
58 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
59 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
60 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
62 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
63 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
64 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
65 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
67 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
68 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
69 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
70 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
72 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
74 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
76 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
77 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
78 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
79 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
81 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
82 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
83 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
84 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
86 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
87 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
88 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
89 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
91 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
92 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
93 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
94 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
96 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
97 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
98 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
99 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
101 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
102 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
103 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
104 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
106 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
107 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
108 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
109 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
111 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
112 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
113 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
114 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
116 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
117 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
118 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
119 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
121 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
122 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
123 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
124 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
126 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
127 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
128 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
129 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
131 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
132 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
133 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
134 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
136 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
138 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
140 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
142 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
144 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
145 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
146 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
147 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
149 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
150 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
151 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
152 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
154 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
155 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
156 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
157 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
159 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
161 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
163 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
165 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
166 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
167 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
168 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
170 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
171 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
172 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
173 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
175 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
176 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
177 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
178 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
180 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
182 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
183 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
184 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
185 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
187 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
188 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
189 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
190 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
192 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
194 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
195 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
196 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
197 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
199 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
200 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
201 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
202 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
204 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
205 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
206 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
207 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
209 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
210 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
211 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
212 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
214 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
215 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
216 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
217 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
219 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
220 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
221 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
222 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
224 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
225 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
226 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
227 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
229 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
230 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
231 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
232 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
234 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
235 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
236 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
238 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
239 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
240 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
242 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
244 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
245 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
246 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
247 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
249 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
250 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
251 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
252 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
254 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
255 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
256 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
258 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
259 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
260 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
262 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
263 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
264 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
266 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
267 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
268 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
270 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
271 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
272 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
274 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
275 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
276 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
278 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
279 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
281 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
282 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
284 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
285 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
287 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
288 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
290 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
291 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
293 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
294 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
296 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
297 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
299 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
300 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
302 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
303 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
305 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
306 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
308 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
309 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
311 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
312 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
314 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
315 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
317 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
318 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
320 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
321 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
323 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
324 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
326 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
327 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
329 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
330 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
332 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
333 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
335 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
336 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
338 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
339 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
341 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
342 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
344 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
345 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
346 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
348 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
349 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
351 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
352 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
354 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
355 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
357 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
358 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
360 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
361 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
363 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
364 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
366 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
367 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
369 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
370 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
372 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
373 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
375 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
376 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
378 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
379 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
381 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
382 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
384 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
385 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
387 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
388 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
390 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
391 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
393 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
394 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
396 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
397 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
399 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
400 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
402 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
403 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
405 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
406 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
408 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
409 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
411 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
412 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
414 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
415 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
417 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
418 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
420 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>;
421 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>;
423 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>;
424 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>;
426 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
427 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
429 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
430 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
432 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
433 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
435 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
436 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
437 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
439 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
440 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
441 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
443 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
444 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
445 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
447 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
448 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
449 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
451 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
452 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
453 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
454 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
456 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
457 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
458 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
459 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
461 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
462 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
463 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
464 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
466 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
467 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
468 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
469 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
471 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
472 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
473 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
475 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
476 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
477 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
478 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
480 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
481 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
482 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
483 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
485 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
486 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
487 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
488 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
490 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
491 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
492 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
493 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
495 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
496 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
498 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
499 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
501 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
502 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
503 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
504 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
506 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
507 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
508 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
509 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
511 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
512 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
513 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
514 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
516 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
517 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
518 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
519 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
521 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
522 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
523 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
524 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
526 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
527 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
528 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
529 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
531 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
532 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
533 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
534 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
536 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
537 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
538 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
539 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
541 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
542 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
543 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
544 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
546 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
547 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
548 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
549 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
551 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
552 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
553 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
554 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
556 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
557 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
558 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
559 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
561 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
562 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
563 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
564 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
566 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
568 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
569 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
571 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
572 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
574 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
575 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
576 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
577 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
579 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>;
580 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>;
582 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
583 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
585 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
586 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
587 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
588 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
590 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
591 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
592 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
593 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
595 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
596 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
597 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
598 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
600 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
602 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
604 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
606 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
608 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
609 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
610 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
611 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
613 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
614 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
615 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
616 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
618 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
619 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
620 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
621 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
623 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
624 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
625 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
626 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
628 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
629 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
630 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
631 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
633 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
634 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
635 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
637 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
638 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
639 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
640 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
642 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
643 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
644 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
645 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
647 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
648 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
649 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
650 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
652 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
653 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
654 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
655 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
657 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
658 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
659 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
660 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
662 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
663 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
664 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
665 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
667 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
668 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
669 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
670 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
672 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
673 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
674 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
675 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
677 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
678 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
679 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
680 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
682 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
683 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
684 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
685 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
687 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
688 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
689 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
690 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
692 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
693 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
694 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
695 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
697 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
698 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
699 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
700 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
702 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
703 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
704 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
705 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
707 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
708 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
709 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
710 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
712 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
713 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
714 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
715 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
717 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
718 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
719 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
720 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
722 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
723 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
724 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
725 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
727 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
728 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
729 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
730 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
732 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
733 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
734 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
735 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
737 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
738 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
739 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
740 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
742 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
743 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
744 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
745 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
747 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
748 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
749 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
750 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
752 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
754 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
757 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
758 RegisterClass RCWD, RegisterClass RCWS = RCWD,
759 InstrItinClass itin = NoItinerary> {
760 dag OutOperandList = (outs RCWD:$wd);
761 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
762 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
763 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
764 InstrItinClass Itinerary = itin;
767 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
768 RegisterClass RCWD, RegisterClass RCWS = RCWD,
769 InstrItinClass itin = NoItinerary> {
770 dag OutOperandList = (outs RCWD:$wd);
771 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
772 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
773 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
774 InstrItinClass Itinerary = itin;
777 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
778 RegisterClass RCWD, RegisterClass RCWS = RCWD,
779 InstrItinClass itin = NoItinerary> {
780 dag OutOperandList = (outs RCWD:$wd);
781 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
782 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
783 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
784 InstrItinClass Itinerary = itin;
787 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
788 RegisterClass RCWD, RegisterClass RCWS = RCWD,
789 InstrItinClass itin = NoItinerary> {
790 dag OutOperandList = (outs RCWD:$wd);
791 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
792 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
793 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
794 InstrItinClass Itinerary = itin;
797 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
798 RegisterClass RCD, RegisterClass RCWS,
799 InstrItinClass itin = NoItinerary> {
800 dag OutOperandList = (outs RCD:$rd);
801 dag InOperandList = (ins RCWS:$ws, uimm6:$n);
802 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
803 list<dag> Pattern = [(set RCD:$rd, (OpNode RCWS:$ws, immZExt6:$n))];
804 InstrItinClass Itinerary = itin;
807 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
808 RegisterClass RCWD, RegisterClass RCWS = RCWD,
809 InstrItinClass itin = NoItinerary> {
810 dag OutOperandList = (outs RCWD:$wd);
811 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
812 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
813 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
814 InstrItinClass Itinerary = itin;
817 class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
818 RegisterClass RCWD, RegisterClass RCWS = RCWD,
819 InstrItinClass itin = NoItinerary> {
820 dag OutOperandList = (outs RCWD:$wd);
821 dag InOperandList = (ins RCWS:$ws, simm5:$s5);
822 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5");
823 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immSExt5:$s5))];
824 InstrItinClass Itinerary = itin;
827 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
828 RegisterClass RCWD, RegisterClass RCWS = RCWD,
829 InstrItinClass itin = NoItinerary> {
830 dag OutOperandList = (outs RCWD:$wd);
831 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
832 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
833 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
834 InstrItinClass Itinerary = itin;
837 class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
839 InstrItinClass itin = NoItinerary> {
840 dag OutOperandList = (outs RCWD:$wd);
841 dag InOperandList = (ins simm10:$i10);
842 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
843 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))];
844 InstrItinClass Itinerary = itin;
847 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
848 RegisterClass RCWD, RegisterClass RCWS = RCWD,
849 InstrItinClass itin = NoItinerary> {
850 dag OutOperandList = (outs RCWD:$wd);
851 dag InOperandList = (ins RCWS:$ws);
852 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
853 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
854 InstrItinClass Itinerary = itin;
857 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
858 RegisterClass RCWD, RegisterClass RCWS = RCWD,
859 InstrItinClass itin = NoItinerary> :
860 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>;
863 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
864 RegisterClass RCWD, RegisterClass RCWS = RCWD,
865 RegisterClass RCWT = RCWD,
866 InstrItinClass itin = NoItinerary> {
867 dag OutOperandList = (outs RCWD:$wd);
868 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
869 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
870 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
871 InstrItinClass Itinerary = itin;
874 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
875 RegisterClass RCWD, RegisterClass RCWS = RCWD,
876 RegisterClass RCWT = RCWD,
877 InstrItinClass itin = NoItinerary> {
878 dag OutOperandList = (outs RCWD:$wd);
879 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
880 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
881 list<dag> Pattern = [(set RCWD:$wd,
882 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))];
883 InstrItinClass Itinerary = itin;
884 string Constraints = "$wd = $wd_in";
887 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
888 RegisterClass RCWD, RegisterClass RCWS = RCWD,
889 RegisterClass RCWT = RCWD,
890 InstrItinClass itin = NoItinerary> :
891 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
893 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
894 RegisterClass RCWD, RegisterClass RCWS = RCWD,
895 RegisterClass RCWT = RCWD,
896 InstrItinClass itin = NoItinerary> :
897 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
899 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
900 dag OutOperandList = (outs);
901 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
902 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
903 list<dag> Pattern = [];
904 InstrItinClass Itinerary = IIBranch;
906 bit isTerminator = 1;
907 bit hasDelaySlot = 1;
908 list<Register> Defs = [AT];
911 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
912 RegisterClass RCD, RegisterClass RCWS,
913 InstrItinClass itin = NoItinerary> {
914 dag OutOperandList = (outs RCD:$wd);
915 dag InOperandList = (ins RCD:$wd_in, uimm6:$n, RCWS:$rs);
916 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
917 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
920 InstrItinClass Itinerary = itin;
921 string Constraints = "$wd = $wd_in";
924 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
925 RegisterClass RCWD, RegisterClass RCWS = RCWD,
926 InstrItinClass itin = NoItinerary> {
927 dag OutOperandList = (outs RCWD:$wd);
928 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
929 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
930 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
933 InstrItinClass Itinerary = itin;
934 string Constraints = "$wd = $wd_in";
937 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
938 RegisterClass RCWD, RegisterClass RCWS = RCWD,
939 RegisterClass RCWT = RCWD,
940 InstrItinClass itin = NoItinerary> {
941 dag OutOperandList = (outs RCWD:$wd);
942 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
943 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
944 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
945 InstrItinClass Itinerary = itin;
948 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>,
950 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>,
952 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>,
954 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>,
957 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>,
959 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>,
961 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>,
963 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>,
966 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>,
968 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>,
970 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>,
972 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>,
975 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>,
977 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>,
979 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>,
981 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>,
984 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable;
985 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable;
986 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable;
987 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable;
989 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", int_mips_addvi_b, MSA128B>;
990 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", int_mips_addvi_h, MSA128H>;
991 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", int_mips_addvi_w, MSA128W>;
992 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", int_mips_addvi_d, MSA128D>;
994 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", int_mips_and_v, MSA128B>;
996 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>;
998 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>;
999 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>;
1000 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>;
1001 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>;
1003 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>;
1004 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>;
1005 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>;
1006 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>;
1008 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>,
1010 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>,
1012 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>,
1014 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>,
1017 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>,
1019 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>,
1021 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>,
1023 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>,
1026 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>,
1028 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>,
1030 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>,
1032 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>,
1035 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>,
1037 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>,
1039 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>,
1041 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>,
1044 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>;
1045 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>;
1046 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>;
1047 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>;
1049 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1050 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1051 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1052 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1054 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>;
1055 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>;
1056 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>;
1057 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>;
1059 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1061 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1063 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1065 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1068 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>;
1069 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>;
1070 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>;
1071 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>;
1073 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1075 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1077 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1079 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1082 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1084 class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1086 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1088 class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1090 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>;
1091 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>;
1092 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>;
1093 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>;
1095 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1096 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1097 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1098 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1100 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1101 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1102 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1103 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1105 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1107 class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>;
1109 class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>;
1111 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>;
1112 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>;
1113 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>;
1114 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>;
1116 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1117 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1118 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1119 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1121 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1122 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1123 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1124 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1126 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1128 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, MSA128B>,
1130 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, MSA128H>,
1132 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, MSA128W>,
1134 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, MSA128D>,
1137 class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, MSA128B>;
1138 class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, MSA128H>;
1139 class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, MSA128W>;
1140 class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, MSA128D>;
1143 dag OutOperandList = (outs GPR32:$rd);
1144 dag InOperandList = (ins MSACtrl:$cs);
1145 string AsmString = "cfcmsa\t$rd, $cs";
1146 InstrItinClass Itinerary = NoItinerary;
1147 bit hasSideEffects = 1;
1150 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, MSA128B>;
1151 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, MSA128H>;
1152 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, MSA128W>;
1153 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, MSA128D>;
1155 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, MSA128B>;
1156 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, MSA128H>;
1157 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, MSA128W>;
1158 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, MSA128D>;
1160 class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b,
1162 class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h,
1164 class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w,
1166 class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d,
1169 class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b,
1171 class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h,
1173 class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w,
1175 class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d,
1178 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, MSA128B>;
1179 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, MSA128H>;
1180 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, MSA128W>;
1181 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, MSA128D>;
1183 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, MSA128B>;
1184 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, MSA128H>;
1185 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, MSA128W>;
1186 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, MSA128D>;
1188 class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b,
1190 class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h,
1192 class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w,
1194 class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d,
1197 class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b,
1199 class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h,
1201 class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w,
1203 class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d,
1206 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", int_mips_copy_s_b,
1208 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", int_mips_copy_s_h,
1210 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", int_mips_copy_s_w,
1213 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", int_mips_copy_u_b,
1215 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", int_mips_copy_u_h,
1217 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", int_mips_copy_u_w,
1221 dag OutOperandList = (outs);
1222 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1223 string AsmString = "ctcmsa\t$cd, $rs";
1224 InstrItinClass Itinerary = NoItinerary;
1225 bit hasSideEffects = 1;
1228 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>;
1229 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>;
1230 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>;
1231 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>;
1233 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>;
1234 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>;
1235 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>;
1236 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>;
1238 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H,
1239 MSA128B, MSA128B>, IsCommutable;
1240 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W,
1241 MSA128H, MSA128H>, IsCommutable;
1242 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D,
1243 MSA128W, MSA128W>, IsCommutable;
1245 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H,
1246 MSA128B, MSA128B>, IsCommutable;
1247 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W,
1248 MSA128H, MSA128H>, IsCommutable;
1249 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D,
1250 MSA128W, MSA128W>, IsCommutable;
1252 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1253 MSA128H, MSA128B, MSA128B>,
1255 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1256 MSA128W, MSA128H, MSA128H>,
1258 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1259 MSA128D, MSA128W, MSA128W>,
1262 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1263 MSA128H, MSA128B, MSA128B>,
1265 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1266 MSA128W, MSA128H, MSA128H>,
1268 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1269 MSA128D, MSA128W, MSA128W>,
1272 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1273 MSA128H, MSA128B, MSA128B>;
1274 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1275 MSA128W, MSA128H, MSA128H>;
1276 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1277 MSA128D, MSA128W, MSA128W>;
1279 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1280 MSA128H, MSA128B, MSA128B>;
1281 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1282 MSA128W, MSA128H, MSA128H>;
1283 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1284 MSA128D, MSA128W, MSA128W>;
1286 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", int_mips_fadd_w, MSA128W>,
1288 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", int_mips_fadd_d, MSA128D>,
1291 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>,
1293 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>,
1296 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", int_mips_fceq_w, MSA128W>,
1298 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", int_mips_fceq_d, MSA128D>,
1301 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1303 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1306 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", int_mips_fcle_w, MSA128W>;
1307 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", int_mips_fcle_d, MSA128D>;
1309 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", int_mips_fclt_w, MSA128W>;
1310 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", int_mips_fclt_d, MSA128D>;
1312 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", int_mips_fcne_w, MSA128W>,
1314 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", int_mips_fcne_d, MSA128D>,
1317 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", int_mips_fcor_w, MSA128W>,
1319 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", int_mips_fcor_d, MSA128D>,
1322 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", int_mips_fcueq_w, MSA128W>,
1324 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", int_mips_fcueq_d, MSA128D>,
1327 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", int_mips_fcule_w, MSA128W>,
1329 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", int_mips_fcule_d, MSA128D>,
1332 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", int_mips_fcult_w, MSA128W>,
1334 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", int_mips_fcult_d, MSA128D>,
1337 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", int_mips_fcun_w, MSA128W>,
1339 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", int_mips_fcun_d, MSA128D>,
1342 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", int_mips_fcune_w, MSA128W>,
1344 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", int_mips_fcune_d, MSA128D>,
1347 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", int_mips_fdiv_w, MSA128W>;
1348 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", int_mips_fdiv_d, MSA128D>;
1350 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1351 MSA128H, MSA128W, MSA128W>;
1352 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1353 MSA128W, MSA128D, MSA128D>;
1355 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>;
1356 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>;
1358 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1360 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1363 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1365 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1368 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1370 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1373 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1375 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1378 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1380 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1383 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1385 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1388 class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", int_mips_fill_b,
1390 class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", int_mips_fill_h,
1392 class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", int_mips_fill_w,
1395 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", int_mips_flog2_w, MSA128W>;
1396 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", int_mips_flog2_d, MSA128D>;
1398 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1400 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1403 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>;
1404 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>;
1406 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1408 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1411 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>;
1412 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>;
1414 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1416 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1419 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1421 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1424 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", int_mips_fmul_w, MSA128W>;
1425 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", int_mips_fmul_d, MSA128D>;
1427 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", int_mips_frint_w, MSA128W>;
1428 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", int_mips_frint_d, MSA128D>;
1430 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>;
1431 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>;
1433 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1435 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1438 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>;
1439 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>;
1441 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>;
1442 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>;
1444 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>;
1445 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>;
1447 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>;
1448 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>;
1450 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>;
1451 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>;
1453 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>;
1454 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>;
1456 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", int_mips_fsqrt_w, MSA128W>;
1457 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", int_mips_fsqrt_d, MSA128D>;
1459 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", int_mips_fsub_w, MSA128W>;
1460 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", int_mips_fsub_d, MSA128D>;
1462 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>;
1463 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>;
1465 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>;
1466 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>;
1468 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>;
1469 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>;
1471 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>;
1472 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>;
1474 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>;
1475 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>;
1477 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1479 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1482 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1484 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1487 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1489 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1492 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1494 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1497 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1498 MSA128H, MSA128W, MSA128W>;
1499 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1500 MSA128W, MSA128D, MSA128D>;
1502 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H,
1504 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W,
1506 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D,
1509 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H,
1511 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W,
1513 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D,
1516 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H,
1518 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W,
1520 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D,
1523 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H,
1525 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W,
1527 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D,
1530 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>;
1531 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>;
1532 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>;
1533 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>;
1535 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>;
1536 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>;
1537 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>;
1538 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>;
1540 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>;
1541 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>;
1542 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>;
1543 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>;
1545 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>;
1546 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>;
1547 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>;
1548 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>;
1550 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", int_mips_insert_b,
1552 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h,
1554 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w,
1557 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1558 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1559 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1560 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1562 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1563 ValueType TyNode, RegisterClass RCWD,
1564 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1565 InstrItinClass itin = NoItinerary> {
1566 dag OutOperandList = (outs RCWD:$wd);
1567 dag InOperandList = (ins MemOpnd:$addr);
1568 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1569 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1570 InstrItinClass Itinerary = itin;
1573 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1574 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1575 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1576 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1578 class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", int_mips_ldi_b, MSA128B>;
1579 class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", int_mips_ldi_h, MSA128H>;
1580 class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", int_mips_ldi_w, MSA128W>;
1581 class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", int_mips_ldi_d, MSA128D>;
1583 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1584 ValueType TyNode, RegisterClass RCWD,
1585 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1586 InstrItinClass itin = NoItinerary> {
1587 dag OutOperandList = (outs RCWD:$wd);
1588 dag InOperandList = (ins MemOpnd:$addr);
1589 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1590 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1591 InstrItinClass Itinerary = itin;
1594 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1595 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1596 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1597 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1599 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
1601 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
1604 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
1606 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
1609 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>;
1610 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>;
1611 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>;
1612 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>;
1614 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>;
1615 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>;
1616 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>;
1617 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>;
1619 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>;
1620 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>;
1621 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>;
1622 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>;
1624 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>;
1625 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>;
1626 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>;
1627 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>;
1629 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b, MSA128B>;
1630 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h, MSA128H>;
1631 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w, MSA128W>;
1632 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d, MSA128D>;
1634 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b, MSA128B>;
1635 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h, MSA128H>;
1636 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w, MSA128W>;
1637 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d, MSA128D>;
1639 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>;
1640 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>;
1641 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>;
1642 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>;
1644 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>;
1645 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>;
1646 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>;
1647 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>;
1649 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>;
1650 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>;
1651 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>;
1652 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>;
1654 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", int_mips_mini_s_b, MSA128B>;
1655 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", int_mips_mini_s_h, MSA128H>;
1656 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", int_mips_mini_s_w, MSA128W>;
1657 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", int_mips_mini_s_d, MSA128D>;
1659 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", int_mips_mini_u_b, MSA128B>;
1660 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", int_mips_mini_u_h, MSA128H>;
1661 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", int_mips_mini_u_w, MSA128W>;
1662 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", int_mips_mini_u_d, MSA128D>;
1664 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>;
1665 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>;
1666 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>;
1667 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>;
1669 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>;
1670 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>;
1671 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>;
1672 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>;
1675 dag OutOperandList = (outs MSA128B:$wd);
1676 dag InOperandList = (ins MSA128B:$ws);
1677 string AsmString = "move.v\t$wd, $ws";
1678 list<dag> Pattern = [];
1679 InstrItinClass Itinerary = NoItinerary;
1682 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
1684 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
1687 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
1689 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
1692 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>;
1693 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>;
1694 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>;
1695 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>;
1697 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>;
1698 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>;
1700 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
1702 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
1705 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", int_mips_mulv_b, MSA128B>;
1706 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", int_mips_mulv_h, MSA128H>;
1707 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", int_mips_mulv_w, MSA128W>;
1708 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", int_mips_mulv_d, MSA128D>;
1710 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
1711 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
1712 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
1713 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
1715 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", int_mips_nlzc_b, MSA128B>;
1716 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", int_mips_nlzc_h, MSA128H>;
1717 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", int_mips_nlzc_w, MSA128W>;
1718 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", int_mips_nlzc_d, MSA128D>;
1720 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", int_mips_nor_v, MSA128B>;
1722 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>;
1724 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", int_mips_or_v, MSA128B>;
1726 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>;
1728 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>;
1729 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>;
1730 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>;
1731 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>;
1733 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>;
1734 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>;
1735 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>;
1736 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>;
1738 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", int_mips_pcnt_b, MSA128B>;
1739 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", int_mips_pcnt_h, MSA128H>;
1740 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", int_mips_pcnt_w, MSA128W>;
1741 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", int_mips_pcnt_d, MSA128D>;
1743 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
1744 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
1745 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
1746 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
1748 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
1749 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
1750 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
1751 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
1753 class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>;
1754 class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>;
1755 class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>;
1757 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>;
1758 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>;
1759 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>;
1760 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>;
1762 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
1763 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
1764 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
1765 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
1767 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", int_mips_sll_b, MSA128B>;
1768 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", int_mips_sll_h, MSA128H>;
1769 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", int_mips_sll_w, MSA128W>;
1770 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", int_mips_sll_d, MSA128D>;
1772 class SLLI_B_DESC : MSA_BIT_B_DESC_BASE<"slli.b", int_mips_slli_b, MSA128B>;
1773 class SLLI_H_DESC : MSA_BIT_H_DESC_BASE<"slli.h", int_mips_slli_h, MSA128H>;
1774 class SLLI_W_DESC : MSA_BIT_W_DESC_BASE<"slli.w", int_mips_slli_w, MSA128W>;
1775 class SLLI_D_DESC : MSA_BIT_D_DESC_BASE<"slli.d", int_mips_slli_d, MSA128D>;
1777 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B,
1779 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H,
1781 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W,
1783 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D,
1786 class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
1788 class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
1790 class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
1792 class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
1795 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", int_mips_sra_b, MSA128B>;
1796 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", int_mips_sra_h, MSA128H>;
1797 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", int_mips_sra_w, MSA128W>;
1798 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", int_mips_sra_d, MSA128D>;
1800 class SRAI_B_DESC : MSA_BIT_B_DESC_BASE<"srai.b", int_mips_srai_b, MSA128B>;
1801 class SRAI_H_DESC : MSA_BIT_H_DESC_BASE<"srai.h", int_mips_srai_h, MSA128H>;
1802 class SRAI_W_DESC : MSA_BIT_W_DESC_BASE<"srai.w", int_mips_srai_w, MSA128W>;
1803 class SRAI_D_DESC : MSA_BIT_D_DESC_BASE<"srai.d", int_mips_srai_d, MSA128D>;
1805 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>;
1806 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>;
1807 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>;
1808 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>;
1810 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
1811 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
1812 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
1813 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
1815 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", int_mips_srl_b, MSA128B>;
1816 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", int_mips_srl_h, MSA128H>;
1817 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", int_mips_srl_w, MSA128W>;
1818 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", int_mips_srl_d, MSA128D>;
1820 class SRLI_B_DESC : MSA_BIT_B_DESC_BASE<"srli.b", int_mips_srli_b, MSA128B>;
1821 class SRLI_H_DESC : MSA_BIT_H_DESC_BASE<"srli.h", int_mips_srli_h, MSA128H>;
1822 class SRLI_W_DESC : MSA_BIT_W_DESC_BASE<"srli.w", int_mips_srli_w, MSA128W>;
1823 class SRLI_D_DESC : MSA_BIT_D_DESC_BASE<"srli.d", int_mips_srli_d, MSA128D>;
1825 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>;
1826 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>;
1827 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>;
1828 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>;
1830 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
1831 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
1832 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
1833 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
1835 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1836 ValueType TyNode, RegisterClass RCWD,
1837 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1838 InstrItinClass itin = NoItinerary> {
1839 dag OutOperandList = (outs);
1840 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
1841 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1842 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
1843 InstrItinClass Itinerary = itin;
1846 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
1847 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
1848 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
1849 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
1851 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1852 ValueType TyNode, RegisterClass RCWD,
1853 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1854 InstrItinClass itin = NoItinerary> {
1855 dag OutOperandList = (outs);
1856 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
1857 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1858 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
1859 InstrItinClass Itinerary = itin;
1862 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
1863 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
1864 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
1865 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
1867 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>;
1868 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>;
1869 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>;
1870 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>;
1872 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>;
1873 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>;
1874 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>;
1875 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>;
1877 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
1879 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
1881 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
1883 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
1886 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
1888 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
1890 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
1892 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
1895 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", int_mips_subv_b, MSA128B>;
1896 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", int_mips_subv_h, MSA128H>;
1897 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", int_mips_subv_w, MSA128W>;
1898 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", int_mips_subv_d, MSA128D>;
1900 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", int_mips_subvi_b, MSA128B>;
1901 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", int_mips_subvi_h, MSA128H>;
1902 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", int_mips_subvi_w, MSA128W>;
1903 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", int_mips_subvi_d, MSA128D>;
1905 class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>;
1906 class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>;
1907 class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>;
1908 class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>;
1910 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", int_mips_xor_v, MSA128B>;
1912 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>;
1914 // Instruction defs.
1915 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
1916 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
1917 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
1918 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
1920 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
1921 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
1922 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
1923 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
1925 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
1926 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
1927 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
1928 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
1930 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
1931 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
1932 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
1933 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
1935 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
1936 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
1937 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
1938 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
1940 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
1941 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
1942 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
1943 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
1945 def AND_V : AND_V_ENC, AND_V_DESC;
1947 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
1949 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
1950 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
1951 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
1952 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
1954 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
1955 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
1956 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
1957 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
1959 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
1960 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
1961 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
1962 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
1964 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
1965 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
1966 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
1967 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
1969 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
1970 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
1971 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
1972 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
1974 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
1975 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
1976 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
1977 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
1979 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
1980 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
1981 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
1982 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
1984 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
1985 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
1986 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
1987 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
1989 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
1990 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
1991 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
1992 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
1994 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
1995 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
1996 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
1997 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
1999 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2000 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2001 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2002 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2004 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2005 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2006 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2007 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2009 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2011 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2013 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2015 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2017 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2018 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2019 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2020 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2022 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2023 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2024 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2025 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2027 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2028 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2029 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2030 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2032 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2034 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2036 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2038 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2039 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2040 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2041 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2043 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2044 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2045 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2046 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2048 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2049 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2050 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2051 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2053 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2055 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2056 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2057 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2058 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2060 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2061 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2062 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2063 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2065 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2067 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2068 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2069 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2070 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2072 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2073 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2074 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2075 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2077 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2078 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2079 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2080 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2082 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2083 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2084 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2085 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2087 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2088 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2089 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2090 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2092 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2093 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2094 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2095 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2097 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2098 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2099 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2100 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2102 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2103 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2104 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2105 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2107 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2108 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2109 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2111 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2112 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2113 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2115 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2117 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2118 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2119 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2120 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2122 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2123 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2124 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2125 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2127 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2128 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2129 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2131 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2132 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2133 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2135 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2136 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2137 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2139 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2140 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2141 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2143 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2144 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2145 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2147 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2148 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2149 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2151 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2152 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2154 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2155 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2157 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2158 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2160 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2161 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2163 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2164 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2166 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2167 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2169 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2170 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2172 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2173 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2175 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2176 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2178 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2179 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2181 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2182 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2184 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2185 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2187 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2188 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2190 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2191 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2193 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2194 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2196 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2197 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2199 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2200 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2202 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2203 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2205 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2206 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2208 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2209 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2211 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2212 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2214 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2215 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2217 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2218 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2219 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2221 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2222 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2224 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2225 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2227 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2228 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2230 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2231 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2233 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2234 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2236 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2237 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2239 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2240 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2242 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2243 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2245 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2246 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2248 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2249 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2251 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2252 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2254 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2255 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2257 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2258 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2260 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2261 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2263 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2264 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2266 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2267 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2269 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2270 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2272 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2273 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2275 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2276 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2278 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2279 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2281 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2282 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2284 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2285 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2287 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2288 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2290 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2291 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2293 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2294 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2296 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2297 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2299 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2300 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2302 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2303 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2305 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2306 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2308 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2309 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2310 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2312 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2313 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2314 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2316 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2317 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2318 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2320 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2321 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2322 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2324 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2325 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2326 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2327 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2329 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2330 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2331 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2332 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2334 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2335 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2336 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2337 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2339 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2340 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2341 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2342 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2344 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2345 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2346 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2348 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2349 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2350 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2351 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2353 def LD_B: LD_B_ENC, LD_B_DESC;
2354 def LD_H: LD_H_ENC, LD_H_DESC;
2355 def LD_W: LD_W_ENC, LD_W_DESC;
2356 def LD_D: LD_D_ENC, LD_D_DESC;
2358 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2359 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2360 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2362 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2363 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2364 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2365 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2367 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2368 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2370 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2371 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2373 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2374 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2375 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2376 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2378 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2379 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2380 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2381 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2383 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2384 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2385 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2386 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2388 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2389 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2390 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2391 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2393 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2394 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2395 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2396 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2398 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2399 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2400 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2401 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2403 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2404 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2405 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2406 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2408 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2409 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2410 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2411 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2413 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2414 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2415 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2416 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2418 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2419 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2420 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2421 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2423 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2424 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2425 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2426 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2428 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2429 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2430 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2431 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2433 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2434 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2435 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2436 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2438 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2440 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2441 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2443 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2444 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2446 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2447 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2448 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2449 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2451 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2452 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2454 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2455 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2457 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2458 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2459 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2460 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2462 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2463 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2464 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2465 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2467 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2468 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2469 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2470 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2472 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2474 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2476 def OR_V : OR_V_ENC, OR_V_DESC;
2478 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2480 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2481 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2482 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2483 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2485 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2486 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2487 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2488 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2490 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2491 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2492 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2493 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2495 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2496 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2497 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2498 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
2500 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
2501 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
2502 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
2503 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
2505 def SHF_B : SHF_B_ENC, SHF_B_DESC;
2506 def SHF_H : SHF_H_ENC, SHF_H_DESC;
2507 def SHF_W : SHF_W_ENC, SHF_W_DESC;
2509 def SLD_B : SLD_B_ENC, SLD_B_DESC;
2510 def SLD_H : SLD_H_ENC, SLD_H_DESC;
2511 def SLD_W : SLD_W_ENC, SLD_W_DESC;
2512 def SLD_D : SLD_D_ENC, SLD_D_DESC;
2514 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
2515 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
2516 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
2517 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
2519 def SLL_B : SLL_B_ENC, SLL_B_DESC;
2520 def SLL_H : SLL_H_ENC, SLL_H_DESC;
2521 def SLL_W : SLL_W_ENC, SLL_W_DESC;
2522 def SLL_D : SLL_D_ENC, SLL_D_DESC;
2524 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
2525 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
2526 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
2527 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
2529 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
2530 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
2531 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
2532 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
2534 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
2535 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
2536 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
2537 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
2539 def SRA_B : SRA_B_ENC, SRA_B_DESC;
2540 def SRA_H : SRA_H_ENC, SRA_H_DESC;
2541 def SRA_W : SRA_W_ENC, SRA_W_DESC;
2542 def SRA_D : SRA_D_ENC, SRA_D_DESC;
2544 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
2545 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
2546 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
2547 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
2549 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
2550 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
2551 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
2552 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
2554 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
2555 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
2556 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
2557 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
2559 def SRL_B : SRL_B_ENC, SRL_B_DESC;
2560 def SRL_H : SRL_H_ENC, SRL_H_DESC;
2561 def SRL_W : SRL_W_ENC, SRL_W_DESC;
2562 def SRL_D : SRL_D_ENC, SRL_D_DESC;
2564 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
2565 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
2566 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
2567 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
2569 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
2570 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
2571 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
2572 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
2574 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
2575 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
2576 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
2577 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
2579 def ST_B: ST_B_ENC, ST_B_DESC;
2580 def ST_H: ST_H_ENC, ST_H_DESC;
2581 def ST_W: ST_W_ENC, ST_W_DESC;
2582 def ST_D: ST_D_ENC, ST_D_DESC;
2584 def STX_B: STX_B_ENC, STX_B_DESC;
2585 def STX_H: STX_H_ENC, STX_H_DESC;
2586 def STX_W: STX_W_ENC, STX_W_DESC;
2587 def STX_D: STX_D_ENC, STX_D_DESC;
2589 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
2590 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
2591 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
2592 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
2594 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
2595 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
2596 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
2597 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
2599 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
2600 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
2601 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
2602 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
2604 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
2605 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
2606 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
2607 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
2609 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
2610 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
2611 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
2612 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
2614 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
2615 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
2616 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
2617 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
2619 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
2620 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
2621 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
2622 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
2624 def XOR_V : XOR_V_ENC, XOR_V_DESC;
2626 def XORI_B : XORI_B_ENC, XORI_B_DESC;
2629 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
2630 Pat<pattern, result>, Requires<pred>;
2632 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
2633 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
2634 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
2635 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
2636 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
2637 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
2638 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
2640 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
2641 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
2642 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
2644 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
2645 (ST_B MSA128B:$ws, addr:$addr)>;
2646 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
2647 (ST_H MSA128H:$ws, addr:$addr)>;
2648 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
2649 (ST_W MSA128W:$ws, addr:$addr)>;
2650 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
2651 (ST_D MSA128D:$ws, addr:$addr)>;
2652 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
2653 (ST_H MSA128H:$ws, addr:$addr)>;
2654 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
2655 (ST_W MSA128W:$ws, addr:$addr)>;
2656 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
2657 (ST_D MSA128D:$ws, addr:$addr)>;
2659 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
2660 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
2661 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
2662 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
2663 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
2664 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
2666 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
2667 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
2668 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2669 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
2671 // These are endian-independant because the element size doesnt change
2672 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
2673 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
2674 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
2675 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
2676 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
2677 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
2679 // Little endian bitcasts are always no-ops
2680 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
2681 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
2682 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
2683 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
2684 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
2685 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
2687 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
2688 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
2689 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
2690 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
2691 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
2693 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
2694 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
2695 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
2696 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
2697 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
2699 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
2700 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
2701 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
2702 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
2703 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
2705 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
2706 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
2707 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
2708 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
2709 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
2711 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
2712 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
2713 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
2714 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
2715 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
2717 // Big endian bitcasts expand to shuffle instructions.
2718 // This is because bitcast is defined to be a store/load sequence and the
2719 // vector store/load instructions are mixed-endian with respect to the vector
2720 // as a whole (little endian with respect to element order, but big endian
2723 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
2724 RegisterClass DstRC, MSAInst Insn,
2725 RegisterClass ViaRC> :
2726 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2727 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
2731 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
2732 RegisterClass DstRC, MSAInst Insn,
2733 RegisterClass ViaRC> :
2734 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2735 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
2739 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
2740 RegisterClass DstRC> :
2741 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2743 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
2744 RegisterClass DstRC> :
2745 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2747 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
2748 RegisterClass DstRC> :
2749 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2753 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
2758 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
2759 RegisterClass DstRC> :
2760 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
2762 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
2763 RegisterClass DstRC> :
2764 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
2766 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
2767 RegisterClass DstRC> :
2768 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
2770 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
2771 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
2772 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
2773 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
2774 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
2775 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
2777 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
2778 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
2779 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
2780 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
2781 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
2783 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
2784 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
2785 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
2786 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
2787 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
2789 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
2790 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
2791 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
2792 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
2793 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
2795 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
2796 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
2797 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
2798 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
2799 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
2801 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
2802 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
2803 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
2804 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
2805 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
2807 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
2808 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
2809 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
2810 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
2811 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
2813 // Pseudos used to implement BNZ.df, and BZ.df
2815 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
2817 InstrItinClass itin = NoItinerary> :
2818 MipsPseudo<(outs GPR32:$dst),
2820 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
2821 bit usesCustomInserter = 1;
2824 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
2825 MSA128B, NoItinerary>;
2826 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
2827 MSA128H, NoItinerary>;
2828 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
2829 MSA128W, NoItinerary>;
2830 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
2831 MSA128D, NoItinerary>;
2832 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
2833 MSA128B, NoItinerary>;
2835 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
2836 MSA128B, NoItinerary>;
2837 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
2838 MSA128H, NoItinerary>;
2839 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
2840 MSA128W, NoItinerary>;
2841 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
2842 MSA128D, NoItinerary>;
2843 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
2844 MSA128B, NoItinerary>;