1 //===-- MipsMachineFunctionInfo.cpp - Private data used for Mips ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/MipsBaseInfo.h"
11 #include "MipsInstrInfo.h"
12 #include "MipsMachineFunction.h"
13 #include "MipsSubtarget.h"
14 #include "MipsTargetMachine.h"
15 #include "llvm/CodeGen/MachineInstrBuilder.h"
16 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 #include "llvm/IR/Function.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/Support/raw_ostream.h"
24 FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true),
25 cl::desc("Always use $gp as the global base register."));
27 // class MipsCallEntry.
28 MipsCallEntry::MipsCallEntry(StringRef N) {
35 MipsCallEntry::MipsCallEntry(const GlobalValue *V) {
41 bool MipsCallEntry::isConstant(const MachineFrameInfo *) const {
45 bool MipsCallEntry::isAliased(const MachineFrameInfo *) const {
49 bool MipsCallEntry::mayAlias(const MachineFrameInfo *) const {
53 void MipsCallEntry::printCustom(raw_ostream &O) const {
54 O << "MipsCallEntry: ";
63 MipsFunctionInfo::~MipsFunctionInfo() {}
65 bool MipsFunctionInfo::globalBaseRegSet() const {
69 unsigned MipsFunctionInfo::getGlobalBaseReg() {
70 // Return if it has already been initialized.
74 MipsSubtarget const &STI =
75 static_cast<const MipsSubtarget &>(MF.getSubtarget());
77 const TargetRegisterClass *RC =
79 ? &Mips::CPU16RegsRegClass
80 : STI.inMicroMipsMode()
81 ? &Mips::GPRMM16RegClass
82 : static_cast<const MipsTargetMachine &>(MF.getTarget())
85 ? &Mips::GPR64RegClass
86 : &Mips::GPR32RegClass;
87 return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
90 bool MipsFunctionInfo::mips16SPAliasRegSet() const {
91 return Mips16SPAliasReg;
93 unsigned MipsFunctionInfo::getMips16SPAliasReg() {
94 // Return if it has already been initialized.
96 return Mips16SPAliasReg;
98 const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;
99 return Mips16SPAliasReg = MF.getRegInfo().createVirtualRegister(RC);
102 void MipsFunctionInfo::createEhDataRegsFI() {
103 for (int I = 0; I < 4; ++I) {
104 const TargetRegisterClass *RC =
105 static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI().IsN64()
106 ? &Mips::GPR64RegClass
107 : &Mips::GPR32RegClass;
109 EhDataRegFI[I] = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
110 RC->getAlignment(), false);
114 bool MipsFunctionInfo::isEhDataRegFI(int FI) const {
115 return CallsEhReturn && (FI == EhDataRegFI[0] || FI == EhDataRegFI[1]
116 || FI == EhDataRegFI[2] || FI == EhDataRegFI[3]);
119 MachinePointerInfo MipsFunctionInfo::callPtrInfo(StringRef Name) {
120 std::unique_ptr<const MipsCallEntry> &E = ExternalCallEntries[Name];
123 E = llvm::make_unique<MipsCallEntry>(Name);
125 return MachinePointerInfo(E.get());
128 MachinePointerInfo MipsFunctionInfo::callPtrInfo(const GlobalValue *Val) {
129 std::unique_ptr<const MipsCallEntry> &E = GlobalCallEntries[Val];
132 E = llvm::make_unique<MipsCallEntry>(Val);
134 return MachinePointerInfo(E.get());
137 int MipsFunctionInfo::getMoveF64ViaSpillFI(const TargetRegisterClass *RC) {
138 if (MoveF64ViaSpillFI == -1) {
139 MoveF64ViaSpillFI = MF.getFrameInfo()->CreateStackObject(
140 RC->getSize(), RC->getAlignment(), false);
142 return MoveF64ViaSpillFI;
145 void MipsFunctionInfo::anchor() { }