1 //===--------- MipsOptimizePICCall.cpp - Optimize PIC Calls ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates unnecessary instructions that set up $gp and replace
11 // instructions that load target function addresses with copy instructions.
13 //===----------------------------------------------------------------------===//
16 #include "MCTargetDesc/MipsBaseInfo.h"
17 #include "MipsMachineFunction.h"
18 #include "MipsTargetMachine.h"
19 #include "llvm/ADT/ScopedHashTable.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/Support/CommandLine.h"
26 #define DEBUG_TYPE "optimize-mips-pic-call"
28 static cl::opt<bool> LoadTargetFromGOT("mips-load-target-from-got",
30 cl::desc("Load target address from GOT"),
33 static cl::opt<bool> EraseGPOpnd("mips-erase-gp-opnd",
34 cl::init(true), cl::desc("Erase GP Operand"),
38 typedef PointerUnion<const Value *, const PseudoSourceValue *> ValueType;
40 typedef std::pair<unsigned, unsigned> CntRegP;
41 typedef RecyclingAllocator<BumpPtrAllocator,
42 ScopedHashTableVal<ValueType, CntRegP> >
44 typedef ScopedHashTable<ValueType, CntRegP, DenseMapInfo<ValueType>,
45 AllocatorTy> ScopedHTType;
49 MBBInfo(MachineDomTreeNode *N);
50 const MachineDomTreeNode *getNode() const;
51 bool isVisited() const;
52 void preVisit(ScopedHTType &ScopedHT);
56 MachineDomTreeNode *Node;
57 ScopedHTType::ScopeTy *HTScope;
60 class OptimizePICCall : public MachineFunctionPass {
62 OptimizePICCall(TargetMachine &tm) : MachineFunctionPass(ID) {}
64 const char *getPassName() const override { return "Mips OptimizePICCall"; }
66 bool runOnMachineFunction(MachineFunction &F) override;
68 void getAnalysisUsage(AnalysisUsage &AU) const override {
69 AU.addRequired<MachineDominatorTree>();
70 MachineFunctionPass::getAnalysisUsage(AU);
75 bool visitNode(MBBInfo &MBBI);
77 /// \brief Test if MI jumps to a function via a register.
79 /// Also, return the virtual register containing the target function's address
80 /// and the underlying object in Reg and Val respectively, if the function's
81 /// address can be resolved lazily.
82 bool isCallViaRegister(MachineInstr &MI, unsigned &Reg,
83 ValueType &Val) const;
85 /// \brief Return the number of instructions that dominate the current
86 /// instruction and load the function address from object Entry.
87 unsigned getCount(ValueType Entry);
89 /// \brief Return the destination virtual register of the last instruction
90 /// that loads from object Entry.
91 unsigned getReg(ValueType Entry);
93 /// \brief Update ScopedHT.
94 void incCntAndSetReg(ValueType Entry, unsigned Reg);
96 ScopedHTType ScopedHT;
100 char OptimizePICCall::ID = 0;
101 } // end of anonymous namespace
103 /// Return the first MachineOperand of MI if it is a used virtual register.
104 static MachineOperand *getCallTargetRegOpnd(MachineInstr &MI) {
105 if (MI.getNumOperands() == 0)
108 MachineOperand &MO = MI.getOperand(0);
110 if (!MO.isReg() || !MO.isUse() ||
111 !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
117 /// Return type of register Reg.
118 static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF) {
119 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(Reg);
120 assert(RC->vt_end() - RC->vt_begin() == 1);
121 return *RC->vt_begin();
124 /// Do the following transformation:
130 static void setCallTargetReg(MachineBasicBlock *MBB,
131 MachineBasicBlock::iterator I) {
132 MachineFunction &MF = *MBB->getParent();
133 const TargetInstrInfo &TII =
134 *MF.getTarget().getSubtargetImpl()->getInstrInfo();
135 unsigned SrcReg = I->getOperand(0).getReg();
136 unsigned DstReg = getRegTy(SrcReg, MF) == MVT::i32 ? Mips::T9 : Mips::T9_64;
137 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg)
139 I->getOperand(0).setReg(DstReg);
142 /// Search MI's operands for register GP and erase it.
143 static void eraseGPOpnd(MachineInstr &MI) {
147 MachineFunction &MF = *MI.getParent()->getParent();
148 MVT::SimpleValueType Ty = getRegTy(MI.getOperand(0).getReg(), MF);
149 unsigned Reg = Ty == MVT::i32 ? Mips::GP : Mips::GP_64;
151 for (unsigned I = 0; I < MI.getNumOperands(); ++I) {
152 MachineOperand &MO = MI.getOperand(I);
153 if (MO.isReg() && MO.getReg() == Reg) {
159 llvm_unreachable(nullptr);
162 MBBInfo::MBBInfo(MachineDomTreeNode *N) : Node(N), HTScope(nullptr) {}
164 const MachineDomTreeNode *MBBInfo::getNode() const { return Node; }
166 bool MBBInfo::isVisited() const { return HTScope; }
168 void MBBInfo::preVisit(ScopedHTType &ScopedHT) {
169 HTScope = new ScopedHTType::ScopeTy(ScopedHT);
172 void MBBInfo::postVisit() {
176 // OptimizePICCall methods.
177 bool OptimizePICCall::runOnMachineFunction(MachineFunction &F) {
178 if (F.getTarget().getSubtarget<MipsSubtarget>().inMips16Mode())
181 // Do a pre-order traversal of the dominator tree.
182 MachineDominatorTree *MDT = &getAnalysis<MachineDominatorTree>();
183 bool Changed = false;
185 SmallVector<MBBInfo, 8> WorkList(1, MBBInfo(MDT->getRootNode()));
187 while (!WorkList.empty()) {
188 MBBInfo &MBBI = WorkList.back();
190 // If this MBB has already been visited, destroy the scope for the MBB and
191 // pop it from the work list.
192 if (MBBI.isVisited()) {
198 // Visit the MBB and add its children to the work list.
199 MBBI.preVisit(ScopedHT);
200 Changed |= visitNode(MBBI);
201 const MachineDomTreeNode *Node = MBBI.getNode();
202 const std::vector<MachineDomTreeNode *> &Children = Node->getChildren();
203 WorkList.append(Children.begin(), Children.end());
209 bool OptimizePICCall::visitNode(MBBInfo &MBBI) {
210 bool Changed = false;
211 MachineBasicBlock *MBB = MBBI.getNode()->getBlock();
213 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
218 // Skip instructions that are not call instructions via registers.
219 if (!isCallViaRegister(*I, Reg, Entry))
223 unsigned N = getCount(Entry);
226 // If a function has been called more than twice, we do not have to emit a
227 // load instruction to get the function address from the GOT, but can
228 // instead reuse the address that has been loaded before.
229 if (N >= 2 && !LoadTargetFromGOT)
230 getCallTargetRegOpnd(*I)->setReg(getReg(Entry));
232 // Erase the $gp operand if this isn't the first time a function has
233 // been called. $gp needs to be set up only if the function call can go
234 // through a lazy binding stub.
239 incCntAndSetReg(Entry, Reg);
241 setCallTargetReg(MBB, I);
247 bool OptimizePICCall::isCallViaRegister(MachineInstr &MI, unsigned &Reg,
248 ValueType &Val) const {
252 MachineOperand *MO = getCallTargetRegOpnd(MI);
254 // Return if MI is not a function call via a register.
258 // Get the instruction that loads the function address from the GOT.
260 Val = (Value*)nullptr;
261 MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
262 MachineInstr *DefMI = MRI.getVRegDef(Reg);
266 // See if DefMI is an instruction that loads from a GOT entry that holds the
267 // address of a lazy binding stub.
268 if (!DefMI->mayLoad() || DefMI->getNumOperands() < 3)
271 unsigned Flags = DefMI->getOperand(2).getTargetFlags();
273 if (Flags != MipsII::MO_GOT_CALL && Flags != MipsII::MO_CALL_LO16)
276 // Return the underlying object for the GOT entry in Val.
277 assert(DefMI->hasOneMemOperand());
278 Val = (*DefMI->memoperands_begin())->getValue();
280 Val = (*DefMI->memoperands_begin())->getPseudoValue();
284 unsigned OptimizePICCall::getCount(ValueType Entry) {
285 return ScopedHT.lookup(Entry).first;
288 unsigned OptimizePICCall::getReg(ValueType Entry) {
289 unsigned Reg = ScopedHT.lookup(Entry).second;
294 void OptimizePICCall::incCntAndSetReg(ValueType Entry, unsigned Reg) {
295 CntRegP P = ScopedHT.lookup(Entry);
296 ScopedHT.insert(Entry, std::make_pair(P.first + 1, Reg));
299 /// Return an OptimizeCall object.
300 FunctionPass *llvm::createMipsOptimizePICCallPass(MipsTargetMachine &TM) {
301 return new OptimizePICCall(TM);