1 //===- MipsRegisterInfo.cpp - MIPS Register Information -== -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MIPS implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "mips-reg-info"
17 #include "MipsRegisterInfo.h"
18 #include "MipsMachineFunction.h"
19 #include "llvm/Constants.h"
20 #include "llvm/Type.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/ValueTypes.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineLocation.h"
27 #include "llvm/Target/TargetFrameInfo.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Target/TargetOptions.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Support/CommandLine.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/ADT/BitVector.h"
34 #include "llvm/ADT/STLExtras.h"
35 //#include "MipsSubtarget.h"
39 // TODO: add subtarget support
40 MipsRegisterInfo::MipsRegisterInfo(const TargetInstrInfo &tii)
41 : MipsGenRegisterInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
44 /// getRegisterNumbering - Given the enum value for some register, e.g.
45 /// Mips::RA, return the number that it corresponds to (e.g. 31).
46 unsigned MipsRegisterInfo::
47 getRegisterNumbering(unsigned RegEnum)
50 case Mips::ZERO : return 0;
51 case Mips::AT : return 1;
52 case Mips::V0 : return 2;
53 case Mips::V1 : return 3;
54 case Mips::A0 : return 4;
55 case Mips::A1 : return 5;
56 case Mips::A2 : return 6;
57 case Mips::A3 : return 7;
58 case Mips::T0 : return 8;
59 case Mips::T1 : return 9;
60 case Mips::T2 : return 10;
61 case Mips::T3 : return 11;
62 case Mips::T4 : return 12;
63 case Mips::T5 : return 13;
64 case Mips::T6 : return 14;
65 case Mips::T7 : return 15;
66 case Mips::T8 : return 16;
67 case Mips::T9 : return 17;
68 case Mips::S0 : return 18;
69 case Mips::S1 : return 19;
70 case Mips::S2 : return 20;
71 case Mips::S3 : return 21;
72 case Mips::S4 : return 22;
73 case Mips::S5 : return 23;
74 case Mips::S6 : return 24;
75 case Mips::S7 : return 25;
76 case Mips::K0 : return 26;
77 case Mips::K1 : return 27;
78 case Mips::GP : return 28;
79 case Mips::SP : return 29;
80 case Mips::FP : return 30;
81 case Mips::RA : return 31;
82 default: assert(0 && "Unknown register number!");
86 void MipsRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
87 MachineBasicBlock::iterator I,
89 const MachineInstr *Orig) const
91 MachineInstr *MI = Orig->clone();
92 MI->getOperand(0).setReg(DestReg);
96 //===----------------------------------------------------------------------===//
98 // Callee Saved Registers methods
100 //===----------------------------------------------------------------------===//
102 /// Mips Callee Saved Registers
103 const unsigned* MipsRegisterInfo::
104 getCalleeSavedRegs(const MachineFunction *MF) const
106 // Mips calle-save register range is $16-$26(s0-s7)
107 static const unsigned CalleeSavedRegs[] = {
108 Mips::S0, Mips::S1, Mips::S2, Mips::S3,
109 Mips::S4, Mips::S5, Mips::S6, Mips::S7, 0
111 return CalleeSavedRegs;
114 /// Mips Callee Saved Register Classes
115 const TargetRegisterClass* const*
116 MipsRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const
118 static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
119 &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
120 &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
121 &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
122 &Mips::CPURegsRegClass, &Mips::CPURegsRegClass, 0
124 return CalleeSavedRegClasses;
127 BitVector MipsRegisterInfo::
128 getReservedRegs(const MachineFunction &MF) const
130 BitVector Reserved(getNumRegs());
131 Reserved.set(Mips::ZERO);
132 Reserved.set(Mips::AT);
133 Reserved.set(Mips::K0);
134 Reserved.set(Mips::K1);
135 Reserved.set(Mips::GP);
136 Reserved.set(Mips::SP);
137 Reserved.set(Mips::FP);
138 Reserved.set(Mips::RA);
142 //===----------------------------------------------------------------------===//
144 // Stack Frame Processing methods
145 // +----------------------------+
147 // The stack is allocated decrementing the stack pointer on
148 // the first instruction of a function prologue. Once decremented,
149 // all stack referencesare are done thought a positive offset
150 // from the stack/frame pointer, so the stack is considering
151 // to grow up! Otherwise terrible hacks would have to be made
152 // to get this stack ABI compliant :)
154 // The stack frame required by the ABI:
159 // . saved $GP (used in PIC - not supported yet)
161 // . saved "Callee Saved" Registers
164 // StackSize -----------
166 // Offset - offset from sp after stack allocation on function prologue
168 // The sp is the stack pointer subtracted/added from the stack size
169 // at the Prologue/Epilogue
171 // References to the previous stack (to obtain arguments) are done
172 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
175 // - reference to the actual stack frame
176 // for any local area var there is smt like : FI >= 0, StackOffset: 4
179 // - reference to previous stack frame
180 // suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
181 // The emitted instruction will be something like:
182 // lw REGX, 16+StackSize(SP)
184 // Since the total stack size is unknown on LowerFORMAL_ARGUMENTS, all
185 // stack references (ObjectOffset) created to reference the function
186 // arguments, are negative numbers. This way, on eliminateFrameIndex it's
187 // possible to detect those references and the offsets are adjusted to
188 // their real location.
192 //===----------------------------------------------------------------------===//
194 // hasFP - Return true if the specified function should have a dedicated frame
195 // pointer register. This is true if the function has variable sized allocas or
196 // if frame pointer elimination is disabled.
197 bool MipsRegisterInfo::
198 hasFP(const MachineFunction &MF) const {
199 return (NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects());
202 // This function eliminate ADJCALLSTACKDOWN,
203 // ADJCALLSTACKUP pseudo instructions
204 void MipsRegisterInfo::
205 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
206 MachineBasicBlock::iterator I) const {
207 // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
211 // FrameIndex represent objects inside a abstract stack.
212 // We must replace FrameIndex with an stack/frame pointer
214 void MipsRegisterInfo::
215 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
216 RegScavenger *RS) const
218 MachineInstr &MI = *II;
219 MachineFunction &MF = *MI.getParent()->getParent();
222 while (!MI.getOperand(i).isFrameIndex()) {
224 assert(i < MI.getNumOperands() &&
225 "Instr doesn't have FrameIndex operand!");
228 int FrameIndex = MI.getOperand(i).getIndex();
229 int stackSize = MF.getFrameInfo()->getStackSize();
230 int spOffset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
233 DOUT << "\nFunction : " << MF.getFunction()->getName() << "\n";
234 DOUT << "<--------->\n";
236 DOUT << "FrameIndex : " << FrameIndex << "\n";
237 DOUT << "spOffset : " << spOffset << "\n";
238 DOUT << "stackSize : " << stackSize << "\n";
241 // as explained on LowerFORMAL_ARGUMENTS, detect negative offsets
242 // and adjust SPOffsets considering the final stack size.
243 int Offset = ((spOffset < 0) ? (stackSize + (-(spOffset+4))) : (spOffset));
244 Offset += MI.getOperand(i-1).getImm();
247 DOUT << "Offset : " << Offset << "\n";
248 DOUT << "<--------->\n";
251 MI.getOperand(i-1).ChangeToImmediate(Offset);
252 MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false);
255 void MipsRegisterInfo::
256 emitPrologue(MachineFunction &MF) const
258 MachineBasicBlock &MBB = MF.front();
259 MachineFrameInfo *MFI = MF.getFrameInfo();
260 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
261 MachineBasicBlock::iterator MBBI = MBB.begin();
262 bool isPIC = (MF.getTarget().getRelocationModel() == Reloc::PIC_);
264 // Replace the dummy '0' SPOffset by the negative
265 // offsets, as explained on LowerFORMAL_ARGUMENTS
266 MipsFI->adjustLoadArgsFI(MFI);
267 MipsFI->adjustStoreVarArgsFI(MFI);
269 // Get the number of bytes to allocate from the FrameInfo.
270 int NumBytes = (int) MFI->getStackSize();
273 DOUT << "\n<--- EMIT PROLOGUE --->\n";
274 DOUT << "Actual Stack size :" << NumBytes << "\n";
277 // No need to allocate space on the stack.
278 if (NumBytes == 0) return;
280 int FPOffset, RAOffset;
282 // Allocate space for saved RA and FP when needed
283 if ((hasFP(MF)) && (MFI->hasCalls())) {
285 RAOffset = (NumBytes+4);
287 } else if ((!hasFP(MF)) && (MFI->hasCalls())) {
291 } else if ((hasFP(MF)) && (!MFI->hasCalls())) {
296 // No calls and no fp.
297 RAOffset = FPOffset = 0;
300 MFI->setObjectOffset(MFI->CreateStackObject(4,4), FPOffset);
301 MFI->setObjectOffset(MFI->CreateStackObject(4,4), RAOffset);
302 MipsFI->setFPStackOffset(FPOffset);
303 MipsFI->setRAStackOffset(RAOffset);
306 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
307 NumBytes = ((NumBytes+Align-1)/Align*Align);
310 DOUT << "FPOffset :" << FPOffset << "\n";
311 DOUT << "RAOffset :" << RAOffset << "\n";
312 DOUT << "New stack size :" << NumBytes << "\n\n";
316 MFI->setStackSize(NumBytes);
318 // PIC speficic function prologue
320 BuildMI(MBB, MBBI, TII.get(Mips::CPLOAD)).addReg(Mips::T9);
322 // Adjust stack : addi sp, sp, (-imm)
323 BuildMI(MBB, MBBI, TII.get(Mips::ADDiu), Mips::SP)
324 .addReg(Mips::SP).addImm(-NumBytes);
326 // Save the return address only if the function isnt a leaf one.
327 // sw $ra, stack_loc($sp)
328 if (MFI->hasCalls()) {
329 BuildMI(MBB, MBBI, TII.get(Mips::SW))
330 .addReg(Mips::RA).addImm(RAOffset).addReg(Mips::SP);
333 // if framepointer enabled, save it and set it
334 // to point to the stack pointer
336 // sw $fp,stack_loc($sp)
337 BuildMI(MBB, MBBI, TII.get(Mips::SW))
338 .addReg(Mips::FP).addImm(FPOffset).addReg(Mips::SP);
341 BuildMI(MBB, MBBI, TII.get(Mips::ADDu), Mips::FP)
342 .addReg(Mips::SP).addReg(Mips::ZERO);
345 // PIC speficic function prologue
346 if ((isPIC) && (MFI->hasCalls()))
347 BuildMI(MBB, MBBI, TII.get(Mips::CPRESTORE))
348 .addImm(MipsFI->getGPStackOffset());
351 void MipsRegisterInfo::
352 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
354 MachineBasicBlock::iterator MBBI = prior(MBB.end());
355 MachineFrameInfo *MFI = MF.getFrameInfo();
356 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
358 // Get the number of bytes from FrameInfo
359 int NumBytes = (int) MFI->getStackSize();
361 // Get the FI's where RA and FP are saved.
362 int FPOffset = MipsFI->getFPStackOffset();
363 int RAOffset = MipsFI->getRAStackOffset();
365 // if framepointer enabled, restore it and restore the
369 BuildMI(MBB, MBBI, TII.get(Mips::ADDu), Mips::SP)
370 .addReg(Mips::FP).addReg(Mips::ZERO);
372 // lw $fp,stack_loc($sp)
373 BuildMI(MBB, MBBI, TII.get(Mips::LW))
374 .addReg(Mips::FP).addImm(FPOffset).addReg(Mips::SP);
377 // Restore the return address only if the function isnt a leaf one.
378 // lw $ra, stack_loc($sp)
379 if (MFI->hasCalls()) {
380 BuildMI(MBB, MBBI, TII.get(Mips::LW))
381 .addReg(Mips::RA).addImm(RAOffset).addReg(Mips::SP);
384 // adjust stack : insert addi sp, sp, (imm)
386 BuildMI(MBB, MBBI, TII.get(Mips::ADDiu), Mips::SP)
387 .addReg(Mips::SP).addImm(NumBytes);
391 void MipsRegisterInfo::
392 processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
393 // Set the SPOffset on the FI where GP must be saved/loaded.
394 MachineFrameInfo *MFI = MF.getFrameInfo();
395 if (MFI->hasCalls()) {
396 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
398 DOUT << "processFunctionBeforeFrameFinalized\n";
399 DOUT << "GPOffset :" << MipsFI->getGPStackOffset() << "\n";
400 DOUT << "FI :" << MipsFI->getGPFI() << "\n";
402 MFI->setObjectOffset(MipsFI->getGPFI(), MipsFI->getGPStackOffset());
406 unsigned MipsRegisterInfo::
407 getRARegister() const {
411 unsigned MipsRegisterInfo::
412 getFrameRegister(MachineFunction &MF) const {
413 return hasFP(MF) ? Mips::FP : Mips::SP;
416 unsigned MipsRegisterInfo::
417 getEHExceptionRegister() const {
418 assert(0 && "What is the exception register");
422 unsigned MipsRegisterInfo::
423 getEHHandlerRegister() const {
424 assert(0 && "What is the exception handler register");
428 int MipsRegisterInfo::
429 getDwarfRegNum(unsigned RegNum, bool isEH) const {
430 assert(0 && "What is the dwarf register number");
434 #include "MipsGenRegisterInfo.inc"