1 //===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Bruno Cardoso Lopes and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSREGISTERINFO_H
15 #define MIPSREGISTERINFO_H
17 #include "llvm/Target/MRegisterInfo.h"
18 #include "MipsGenRegisterInfo.h.inc"
22 class TargetInstrInfo;
25 struct MipsRegisterInfo : public MipsGenRegisterInfo {
26 const TargetInstrInfo &TII;
28 MipsRegisterInfo(const TargetInstrInfo &tii);
30 /// getRegisterNumbering - Given the enum value for some register, e.g.
31 /// Mips::RA, return the number that it corresponds to (e.g. 31).
32 static unsigned getRegisterNumbering(unsigned RegEnum);
34 /// Code Generation virtual methods...
35 void storeRegToStackSlot(MachineBasicBlock &MBB,
36 MachineBasicBlock::iterator MBBI,
37 unsigned SrcReg, int FrameIndex,
38 const TargetRegisterClass *RC) const;
40 void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
41 SmallVectorImpl<MachineOperand> &Addr,
42 const TargetRegisterClass *RC,
43 SmallVectorImpl<MachineInstr*> &NewMIs) const;
45 void loadRegFromStackSlot(MachineBasicBlock &MBB,
46 MachineBasicBlock::iterator MBBI,
47 unsigned DestReg, int FrameIndex,
48 const TargetRegisterClass *RC) const;
50 void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
51 SmallVectorImpl<MachineOperand> &Addr,
52 const TargetRegisterClass *RC,
53 SmallVectorImpl<MachineInstr*> &NewMIs) const;
55 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
56 unsigned DestReg, const MachineInstr *Orig) const;
58 MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
59 int FrameIndex) const;
61 MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
62 MachineInstr* LoadMI) const {
66 void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
67 unsigned DestReg, unsigned SrcReg,
68 const TargetRegisterClass *DestRC,
69 const TargetRegisterClass *SrcRC) const;
72 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
74 const TargetRegisterClass* const*
75 getCalleeSavedRegClasses(const MachineFunction* MF = 0) const;
77 BitVector getReservedRegs(const MachineFunction &MF) const;
79 bool hasFP(const MachineFunction &MF) const;
81 void eliminateCallFramePseudoInstr(MachineFunction &MF,
82 MachineBasicBlock &MBB,
83 MachineBasicBlock::iterator I) const;
85 /// Stack Frame Processing Methods
86 void eliminateFrameIndex(MachineBasicBlock::iterator II,
87 int SPAdj, RegScavenger *RS = NULL) const;
89 void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
91 void emitPrologue(MachineFunction &MF) const;
92 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
94 /// Debug information queries.
95 unsigned getRARegister() const;
96 unsigned getFrameRegister(MachineFunction &MF) const;
98 /// Exception handling queries.
99 unsigned getEHExceptionRegister() const;
100 unsigned getEHHandlerRegister() const;
103 } // end namespace llvm