1 //===-- MipsSEInstrInfo.h - Mips32/64 Instruction Information ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips32/64 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSSEINSTRUCTIONINFO_H
15 #define MIPSSEINSTRUCTIONINFO_H
17 #include "MipsInstrInfo.h"
18 #include "MipsAnalyzeImmediate.h"
19 #include "MipsSERegisterInfo.h"
23 class MipsSEInstrInfo : public MipsInstrInfo {
24 const MipsSERegisterInfo RI;
28 explicit MipsSEInstrInfo(MipsTargetMachine &TM);
30 virtual const MipsRegisterInfo &getRegisterInfo() const;
32 /// isLoadFromStackSlot - If the specified machine instruction is a direct
33 /// load from a stack slot, return the virtual or physical register number of
34 /// the destination along with the FrameIndex of the loaded stack slot. If
35 /// not, return 0. This predicate must return 0 if the instruction has
36 /// any side effects other than loading from the stack slot.
37 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
38 int &FrameIndex) const;
40 /// isStoreToStackSlot - If the specified machine instruction is a direct
41 /// store to a stack slot, return the virtual or physical register number of
42 /// the source reg along with the FrameIndex of the loaded stack slot. If
43 /// not, return 0. This predicate must return 0 if the instruction has
44 /// any side effects other than storing to the stack slot.
45 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
46 int &FrameIndex) const;
48 virtual void copyPhysReg(MachineBasicBlock &MBB,
49 MachineBasicBlock::iterator MI, DebugLoc DL,
50 unsigned DestReg, unsigned SrcReg,
53 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
54 MachineBasicBlock::iterator MBBI,
55 unsigned SrcReg, bool isKill, int FrameIndex,
56 const TargetRegisterClass *RC,
57 const TargetRegisterInfo *TRI) const;
59 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator MBBI,
61 unsigned DestReg, int FrameIndex,
62 const TargetRegisterClass *RC,
63 const TargetRegisterInfo *TRI) const;
65 virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const;
67 virtual unsigned GetOppositeBranchOpc(unsigned Opc) const;
69 /// Adjust SP by Amount bytes.
70 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
71 MachineBasicBlock::iterator I) const;
74 virtual unsigned GetAnalyzableBrOpc(unsigned Opc) const;
76 void ExpandRetRA(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
78 void ExpandExtractElementF64(MachineBasicBlock &MBB,
79 MachineBasicBlock::iterator I) const;
80 void ExpandBuildPairF64(MachineBasicBlock &MBB,
81 MachineBasicBlock::iterator I) const;