1 //===-- MipsSchedule.td - Mips Scheduling Definitions ------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Functional units across Mips chips sets. Based on GCC/Mips backend files.
12 //===----------------------------------------------------------------------===//
14 def IMULDIV : FuncUnit;
16 //===----------------------------------------------------------------------===//
17 // Instruction Itinerary classes used for Mips
18 //===----------------------------------------------------------------------===//
19 def IIAlu : InstrItinClass;
20 def IIBranch : InstrItinClass;
21 def IIPseudo : InstrItinClass;
23 def II_ABS : InstrItinClass;
24 def II_ADDI : InstrItinClass;
25 def II_ADDIU : InstrItinClass;
26 def II_ADDU : InstrItinClass;
27 def II_ADD_D : InstrItinClass;
28 def II_ADD_S : InstrItinClass;
29 def II_AND : InstrItinClass;
30 def II_ANDI : InstrItinClass;
31 def II_BADDU : InstrItinClass;
32 def II_CEIL : InstrItinClass;
33 def II_CFC1 : InstrItinClass;
34 def II_CLO : InstrItinClass;
35 def II_CLZ : InstrItinClass;
36 def II_CTC1 : InstrItinClass;
37 def II_CVT : InstrItinClass;
38 def II_C_CC_D : InstrItinClass; // Any c.<cc>.d instruction
39 def II_C_CC_S : InstrItinClass; // Any c.<cc>.s instruction
40 def II_DADDIU : InstrItinClass;
41 def II_DADDU : InstrItinClass;
42 def II_DADD : InstrItinClass;
43 def II_DDIV : InstrItinClass;
44 def II_DDIVU : InstrItinClass;
45 def II_DIV : InstrItinClass;
46 def II_DIVU : InstrItinClass;
47 def II_DIV_D : InstrItinClass;
48 def II_DIV_S : InstrItinClass;
49 def II_DMFC1 : InstrItinClass;
50 def II_DMTC1 : InstrItinClass;
51 def II_DMUL : InstrItinClass;
52 def II_DMULT : InstrItinClass;
53 def II_DMULTU : InstrItinClass;
54 def II_DROTR : InstrItinClass;
55 def II_DROTR32 : InstrItinClass;
56 def II_DROTRV : InstrItinClass;
57 def II_DSLL : InstrItinClass;
58 def II_DSLL32 : InstrItinClass;
59 def II_DSLLV : InstrItinClass;
60 def II_DSRA : InstrItinClass;
61 def II_DSRA32 : InstrItinClass;
62 def II_DSRAV : InstrItinClass;
63 def II_DSRL : InstrItinClass;
64 def II_DSRL32 : InstrItinClass;
65 def II_DSRLV : InstrItinClass;
66 def II_DSUBU : InstrItinClass;
67 def II_DSUB : InstrItinClass;
68 def II_FLOOR : InstrItinClass;
69 def II_LB : InstrItinClass;
70 def II_LBU : InstrItinClass;
71 def II_LD : InstrItinClass;
72 def II_LDC1 : InstrItinClass;
73 def II_LDL : InstrItinClass;
74 def II_LDR : InstrItinClass;
75 def II_LDXC1 : InstrItinClass;
76 def II_LH : InstrItinClass;
77 def II_LHU : InstrItinClass;
78 def II_LUI : InstrItinClass;
79 def II_LUXC1 : InstrItinClass;
80 def II_LW : InstrItinClass;
81 def II_LWC1 : InstrItinClass;
82 def II_LWL : InstrItinClass;
83 def II_LWR : InstrItinClass;
84 def II_LWU : InstrItinClass;
85 def II_LWXC1 : InstrItinClass;
86 def II_MADD : InstrItinClass;
87 def II_MADDU : InstrItinClass;
88 def II_MADD_D : InstrItinClass;
89 def II_MADD_S : InstrItinClass;
90 def II_MFC1 : InstrItinClass;
91 def II_MFHC1 : InstrItinClass;
92 def II_MFHI_MFLO : InstrItinClass; // mfhi and mflo
93 def II_MOVF : InstrItinClass;
94 def II_MOVF_D : InstrItinClass;
95 def II_MOVF_S : InstrItinClass;
96 def II_MOVN : InstrItinClass;
97 def II_MOVN_D : InstrItinClass;
98 def II_MOVN_S : InstrItinClass;
99 def II_MOVT : InstrItinClass;
100 def II_MOVT_D : InstrItinClass;
101 def II_MOVT_S : InstrItinClass;
102 def II_MOVZ : InstrItinClass;
103 def II_MOVZ_D : InstrItinClass;
104 def II_MOVZ_S : InstrItinClass;
105 def II_MOV_D : InstrItinClass;
106 def II_MOV_S : InstrItinClass;
107 def II_MSUB : InstrItinClass;
108 def II_MSUBU : InstrItinClass;
109 def II_MSUB_D : InstrItinClass;
110 def II_MSUB_S : InstrItinClass;
111 def II_MTC1 : InstrItinClass;
112 def II_MTHC1 : InstrItinClass;
113 def II_MTHI_MTLO : InstrItinClass; // mthi and mtlo
114 def II_MUL : InstrItinClass;
115 def II_MULT : InstrItinClass;
116 def II_MULTU : InstrItinClass;
117 def II_MUL_D : InstrItinClass;
118 def II_MUL_S : InstrItinClass;
119 def II_NEG : InstrItinClass;
120 def II_NMADD_D : InstrItinClass;
121 def II_NMADD_S : InstrItinClass;
122 def II_NMSUB_D : InstrItinClass;
123 def II_NMSUB_S : InstrItinClass;
124 def II_NOR : InstrItinClass;
125 def II_OR : InstrItinClass;
126 def II_ORI : InstrItinClass;
127 def II_POP : InstrItinClass;
128 def II_RDHWR : InstrItinClass;
129 def II_RESTORE : InstrItinClass;
130 def II_ROTR : InstrItinClass;
131 def II_ROTRV : InstrItinClass;
132 def II_ROUND : InstrItinClass;
133 def II_SAVE : InstrItinClass;
134 def II_SB : InstrItinClass;
135 def II_SD : InstrItinClass;
136 def II_SDC1 : InstrItinClass;
137 def II_SDL : InstrItinClass;
138 def II_SDR : InstrItinClass;
139 def II_SDXC1 : InstrItinClass;
140 def II_SEB : InstrItinClass;
141 def II_SEH : InstrItinClass;
142 def II_SEQ_SNE : InstrItinClass; // seq and sne
143 def II_SEQI_SNEI : InstrItinClass; // seqi and snei
144 def II_SH : InstrItinClass;
145 def II_SLL : InstrItinClass;
146 def II_SLLV : InstrItinClass;
147 def II_SLTI_SLTIU : InstrItinClass; // slti and sltiu
148 def II_SLT_SLTU : InstrItinClass; // slt and sltu
149 def II_SQRT_D : InstrItinClass;
150 def II_SQRT_S : InstrItinClass;
151 def II_SRA : InstrItinClass;
152 def II_SRAV : InstrItinClass;
153 def II_SRL : InstrItinClass;
154 def II_SRLV : InstrItinClass;
155 def II_SUBU : InstrItinClass;
156 def II_SUB_D : InstrItinClass;
157 def II_SUB_S : InstrItinClass;
158 def II_SUXC1 : InstrItinClass;
159 def II_SW : InstrItinClass;
160 def II_SWC1 : InstrItinClass;
161 def II_SWL : InstrItinClass;
162 def II_SWR : InstrItinClass;
163 def II_SWXC1 : InstrItinClass;
164 def II_TRUNC : InstrItinClass;
165 def II_XOR : InstrItinClass;
166 def II_XORI : InstrItinClass;
168 //===----------------------------------------------------------------------===//
169 // Mips Generic instruction itineraries.
170 //===----------------------------------------------------------------------===//
171 def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [
172 InstrItinData<IIAlu , [InstrStage<1, [ALU]>]>,
173 InstrItinData<II_ADDI , [InstrStage<1, [ALU]>]>,
174 InstrItinData<II_ADDIU , [InstrStage<1, [ALU]>]>,
175 InstrItinData<II_ADDU , [InstrStage<1, [ALU]>]>,
176 InstrItinData<II_AND , [InstrStage<1, [ALU]>]>,
177 InstrItinData<II_BADDU , [InstrStage<1, [ALU]>]>,
178 InstrItinData<II_SLL , [InstrStage<1, [ALU]>]>,
179 InstrItinData<II_SRA , [InstrStage<1, [ALU]>]>,
180 InstrItinData<II_SRL , [InstrStage<1, [ALU]>]>,
181 InstrItinData<II_ROTR , [InstrStage<1, [ALU]>]>,
182 InstrItinData<II_SLLV , [InstrStage<1, [ALU]>]>,
183 InstrItinData<II_SRAV , [InstrStage<1, [ALU]>]>,
184 InstrItinData<II_SRLV , [InstrStage<1, [ALU]>]>,
185 InstrItinData<II_ROTRV , [InstrStage<1, [ALU]>]>,
186 InstrItinData<II_CLO , [InstrStage<1, [ALU]>]>,
187 InstrItinData<II_CLZ , [InstrStage<1, [ALU]>]>,
188 InstrItinData<II_DADDIU , [InstrStage<1, [ALU]>]>,
189 InstrItinData<II_DADDU , [InstrStage<1, [ALU]>]>,
190 InstrItinData<II_DADD , [InstrStage<1, [ALU]>]>,
191 InstrItinData<II_DSLL , [InstrStage<1, [ALU]>]>,
192 InstrItinData<II_DSRL , [InstrStage<1, [ALU]>]>,
193 InstrItinData<II_DSRA , [InstrStage<1, [ALU]>]>,
194 InstrItinData<II_DSLLV , [InstrStage<1, [ALU]>]>,
195 InstrItinData<II_DSRLV , [InstrStage<1, [ALU]>]>,
196 InstrItinData<II_DSRAV , [InstrStage<1, [ALU]>]>,
197 InstrItinData<II_DSUBU , [InstrStage<1, [ALU]>]>,
198 InstrItinData<II_DSUB , [InstrStage<1, [ALU]>]>,
199 InstrItinData<II_DROTR , [InstrStage<1, [ALU]>]>,
200 InstrItinData<II_DROTRV , [InstrStage<1, [ALU]>]>,
201 InstrItinData<II_LUI , [InstrStage<1, [ALU]>]>,
202 InstrItinData<II_MOVF , [InstrStage<1, [ALU]>]>,
203 InstrItinData<II_MOVN , [InstrStage<1, [ALU]>]>,
204 InstrItinData<II_MOVN_S , [InstrStage<1, [ALU]>]>,
205 InstrItinData<II_MOVN_D , [InstrStage<1, [ALU]>]>,
206 InstrItinData<II_MOVT , [InstrStage<1, [ALU]>]>,
207 InstrItinData<II_MOVZ , [InstrStage<1, [ALU]>]>,
208 InstrItinData<II_NOR , [InstrStage<1, [ALU]>]>,
209 InstrItinData<II_OR , [InstrStage<1, [ALU]>]>,
210 InstrItinData<II_POP , [InstrStage<1, [ALU]>]>,
211 InstrItinData<II_RDHWR , [InstrStage<1, [ALU]>]>,
212 InstrItinData<II_SUBU , [InstrStage<1, [ALU]>]>,
213 InstrItinData<II_XOR , [InstrStage<1, [ALU]>]>,
214 InstrItinData<II_ANDI , [InstrStage<1, [ALU]>]>,
215 InstrItinData<II_ORI , [InstrStage<1, [ALU]>]>,
216 InstrItinData<II_XORI , [InstrStage<1, [ALU]>]>,
217 InstrItinData<II_LB , [InstrStage<3, [ALU]>]>,
218 InstrItinData<II_LBU , [InstrStage<3, [ALU]>]>,
219 InstrItinData<II_LH , [InstrStage<3, [ALU]>]>,
220 InstrItinData<II_LHU , [InstrStage<3, [ALU]>]>,
221 InstrItinData<II_LW , [InstrStage<3, [ALU]>]>,
222 InstrItinData<II_LWL , [InstrStage<3, [ALU]>]>,
223 InstrItinData<II_LWR , [InstrStage<3, [ALU]>]>,
224 InstrItinData<II_LD , [InstrStage<3, [ALU]>]>,
225 InstrItinData<II_LDL , [InstrStage<3, [ALU]>]>,
226 InstrItinData<II_LDR , [InstrStage<3, [ALU]>]>,
227 InstrItinData<II_RESTORE , [InstrStage<3, [ALU]>]>,
228 InstrItinData<II_SB , [InstrStage<1, [ALU]>]>,
229 InstrItinData<II_SH , [InstrStage<1, [ALU]>]>,
230 InstrItinData<II_SW , [InstrStage<1, [ALU]>]>,
231 InstrItinData<II_SWL , [InstrStage<1, [ALU]>]>,
232 InstrItinData<II_SWR , [InstrStage<1, [ALU]>]>,
233 InstrItinData<II_SDL , [InstrStage<1, [ALU]>]>,
234 InstrItinData<II_SDR , [InstrStage<1, [ALU]>]>,
235 InstrItinData<II_SD , [InstrStage<1, [ALU]>]>,
236 InstrItinData<II_SAVE , [InstrStage<1, [ALU]>]>,
237 InstrItinData<II_SEQ_SNE , [InstrStage<1, [ALU]>]>,
238 InstrItinData<II_SEQI_SNEI , [InstrStage<1, [ALU]>]>,
239 InstrItinData<IIBranch , [InstrStage<1, [ALU]>]>,
240 InstrItinData<II_DMUL , [InstrStage<17, [IMULDIV]>]>,
241 InstrItinData<II_DMULT , [InstrStage<17, [IMULDIV]>]>,
242 InstrItinData<II_DMULTU , [InstrStage<17, [IMULDIV]>]>,
243 InstrItinData<II_MADD , [InstrStage<17, [IMULDIV]>]>,
244 InstrItinData<II_MADDU , [InstrStage<17, [IMULDIV]>]>,
245 InstrItinData<II_MFHI_MFLO , [InstrStage<1, [IMULDIV]>]>,
246 InstrItinData<II_MSUB , [InstrStage<17, [IMULDIV]>]>,
247 InstrItinData<II_MSUBU , [InstrStage<17, [IMULDIV]>]>,
248 InstrItinData<II_MTHI_MTLO , [InstrStage<1, [IMULDIV]>]>,
249 InstrItinData<II_MUL , [InstrStage<17, [IMULDIV]>]>,
250 InstrItinData<II_MULT , [InstrStage<17, [IMULDIV]>]>,
251 InstrItinData<II_MULTU , [InstrStage<17, [IMULDIV]>]>,
252 InstrItinData<II_MSUB , [InstrStage<17, [IMULDIV]>]>,
253 InstrItinData<II_MSUBU , [InstrStage<17, [IMULDIV]>]>,
254 InstrItinData<II_DIV , [InstrStage<38, [IMULDIV]>]>,
255 InstrItinData<II_DIVU , [InstrStage<38, [IMULDIV]>]>,
256 InstrItinData<II_DDIV , [InstrStage<38, [IMULDIV]>]>,
257 InstrItinData<II_DDIVU , [InstrStage<38, [IMULDIV]>]>,
258 InstrItinData<II_CEIL , [InstrStage<1, [ALU]>]>,
259 InstrItinData<II_CVT , [InstrStage<1, [ALU]>]>,
260 InstrItinData<II_ABS , [InstrStage<1, [ALU]>]>,
261 InstrItinData<II_FLOOR , [InstrStage<1, [ALU]>]>,
262 InstrItinData<II_NEG , [InstrStage<1, [ALU]>]>,
263 InstrItinData<II_ROUND , [InstrStage<1, [ALU]>]>,
264 InstrItinData<II_TRUNC , [InstrStage<1, [ALU]>]>,
265 InstrItinData<II_MOV_D , [InstrStage<2, [ALU]>]>,
266 InstrItinData<II_MOV_S , [InstrStage<2, [ALU]>]>,
267 InstrItinData<II_CFC1 , [InstrStage<2, [ALU]>]>,
268 InstrItinData<II_CTC1 , [InstrStage<2, [ALU]>]>,
269 InstrItinData<II_MOVF_D , [InstrStage<2, [ALU]>]>,
270 InstrItinData<II_MOVF_S , [InstrStage<2, [ALU]>]>,
271 InstrItinData<II_MOVT_D , [InstrStage<2, [ALU]>]>,
272 InstrItinData<II_MOVT_S , [InstrStage<2, [ALU]>]>,
273 InstrItinData<II_MOVZ_D , [InstrStage<2, [ALU]>]>,
274 InstrItinData<II_MOVZ_S , [InstrStage<2, [ALU]>]>,
275 InstrItinData<II_C_CC_S , [InstrStage<3, [ALU]>]>,
276 InstrItinData<II_C_CC_D , [InstrStage<3, [ALU]>]>,
277 InstrItinData<II_ADD_D , [InstrStage<4, [ALU]>]>,
278 InstrItinData<II_ADD_S , [InstrStage<4, [ALU]>]>,
279 InstrItinData<II_SUB_D , [InstrStage<4, [ALU]>]>,
280 InstrItinData<II_SUB_S , [InstrStage<4, [ALU]>]>,
281 InstrItinData<II_MUL_S , [InstrStage<7, [ALU]>]>,
282 InstrItinData<II_MADD_S , [InstrStage<7, [ALU]>]>,
283 InstrItinData<II_MSUB_S , [InstrStage<7, [ALU]>]>,
284 InstrItinData<II_NMADD_S , [InstrStage<7, [ALU]>]>,
285 InstrItinData<II_NMSUB_S , [InstrStage<7, [ALU]>]>,
286 InstrItinData<II_MUL_D , [InstrStage<8, [ALU]>]>,
287 InstrItinData<II_MADD_D , [InstrStage<8, [ALU]>]>,
288 InstrItinData<II_MSUB_D , [InstrStage<8, [ALU]>]>,
289 InstrItinData<II_NMADD_D , [InstrStage<8, [ALU]>]>,
290 InstrItinData<II_NMSUB_D , [InstrStage<8, [ALU]>]>,
291 InstrItinData<II_DIV_S , [InstrStage<23, [ALU]>]>,
292 InstrItinData<II_DIV_D , [InstrStage<36, [ALU]>]>,
293 InstrItinData<II_SQRT_S , [InstrStage<54, [ALU]>]>,
294 InstrItinData<II_SQRT_D , [InstrStage<12, [ALU]>]>,
295 InstrItinData<II_LDC1 , [InstrStage<3, [ALU]>]>,
296 InstrItinData<II_LWC1 , [InstrStage<3, [ALU]>]>,
297 InstrItinData<II_LDXC1 , [InstrStage<3, [ALU]>]>,
298 InstrItinData<II_LWXC1 , [InstrStage<3, [ALU]>]>,
299 InstrItinData<II_LUXC1 , [InstrStage<3, [ALU]>]>,
300 InstrItinData<II_SDC1 , [InstrStage<1, [ALU]>]>,
301 InstrItinData<II_SWC1 , [InstrStage<1, [ALU]>]>,
302 InstrItinData<II_SDXC1 , [InstrStage<1, [ALU]>]>,
303 InstrItinData<II_SWXC1 , [InstrStage<1, [ALU]>]>,
304 InstrItinData<II_SUXC1 , [InstrStage<1, [ALU]>]>,
305 InstrItinData<II_DMFC1 , [InstrStage<2, [ALU]>]>,
306 InstrItinData<II_DMTC1 , [InstrStage<2, [ALU]>]>,
307 InstrItinData<II_MFC1 , [InstrStage<2, [ALU]>]>,
308 InstrItinData<II_MTC1 , [InstrStage<2, [ALU]>]>,
309 InstrItinData<II_MFHC1 , [InstrStage<2, [ALU]>]>,
310 InstrItinData<II_MTHC1 , [InstrStage<2, [ALU]>]>