1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the Mips specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #include "MipsSubtarget.h"
16 #include "MipsRegisterInfo.h"
17 #include "llvm/Support/TargetRegistry.h"
19 #define GET_SUBTARGETINFO_TARGET_DESC
20 #define GET_SUBTARGETINFO_CTOR
21 #include "MipsGenSubtargetInfo.inc"
25 void MipsSubtarget::anchor() { }
27 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
28 const std::string &FS, bool little,
30 MipsGenSubtargetInfo(TT, CPU, FS),
31 MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
32 IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
33 IsLinux(true), HasSEInReg(false), HasCondMov(false), HasSwap(false),
34 HasBitCount(false), HasFPIdx(false),
35 InMips16Mode(false), InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
38 std::string CPUName = CPU;
42 // Parse features string.
43 ParseSubtargetFeatures(CPUName, FS);
45 // Initialize scheduling itinerary for the specified CPU.
46 InstrItins = getInstrItineraryForCPU(CPUName);
48 // Set MipsABI if it hasn't been set yet.
49 if (MipsABI == UnknownABI)
50 MipsABI = hasMips64() ? N64 : O32;
52 // Check if Architecture and ABI are compatible.
53 assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) ||
54 (hasMips64() && (isABI_N32() || isABI_N64()))) &&
55 "Invalid Arch & ABI pair.");
57 // Is the target system Linux ?
58 if (TT.find("linux") == std::string::npos)
61 // Set UseSmallSection.
62 UseSmallSection = !IsLinux && (RM == Reloc::Static);
66 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
67 TargetSubtargetInfo::AntiDepBreakMode &Mode,
68 RegClassVector &CriticalPathRCs) const {
69 Mode = TargetSubtargetInfo::ANTIDEP_NONE;
70 CriticalPathRCs.clear();
71 CriticalPathRCs.push_back(hasMips64() ?
72 &Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass);
73 return OptLevel >= CodeGenOpt::Aggressive;