1 //=====-- MipsSubtarget.h - Define Subtarget for the Mips -----*- C++ -*--====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSSUBTARGET_H
15 #define MIPSSUBTARGET_H
17 #include "llvm/Target/TargetSubtarget.h"
18 #include "llvm/MC/MCInstrItineraries.h"
21 #define GET_SUBTARGETINFO_HEADER
22 #include "MipsGenSubtarget.inc"
26 class MipsSubtarget : public MipsGenSubtargetInfo {
30 O32, O64, N32, N64, EABI
36 Mips1, Mips2, Mips3, Mips4, Mips32, Mips32r2
39 // Mips architecture version
40 MipsArchEnum MipsArchVersion;
42 // Mips supported ABIs
45 // IsLittle - The target is Little Endian
48 // IsSingleFloat - The target only supports single precision float
49 // point operations. This enable the target to use all 32 32-bit
50 // floating point registers instead of only using even ones.
53 // IsFP64bit - The target processor has 64-bit floating point registers.
56 // IsFP64bit - General-purpose registers are 64 bits wide
59 // HasVFPU - Processor has a vector floating point unit.
62 // isLinux - Target system is Linux. Is false we consider ELFOS for now.
65 /// Features related to the presence of specific instructions.
67 // HasSEInReg - SEB and SEH (signext in register) instructions.
70 // HasCondMov - Conditional mov (MOVZ, MOVN) instructions.
73 // HasMulDivAdd - Multiply add and sub (MADD, MADDu, MSUB, MSUBu)
77 // HasMinMax - MIN and MAX instructions.
80 // HasSwap - Byte and half swap instructions.
83 // HasBitCount - Count leading '1' and '0' bits.
86 InstrItineraryData InstrItins;
90 /// Only O32 and EABI supported right now.
91 bool isABI_EABI() const { return MipsABI == EABI; }
92 bool isABI_O32() const { return MipsABI == O32; }
93 unsigned getTargetABI() const { return MipsABI; }
95 /// This constructor initializes the data members to match that
96 /// of the specified triple.
97 MipsSubtarget(const std::string &TT, const std::string &CPU,
98 const std::string &FS, bool little);
100 /// ParseSubtargetFeatures - Parses features string setting specified
101 /// subtarget options. Definition of function is auto generated by tblgen.
102 void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
104 bool isMips1() const { return MipsArchVersion == Mips1; }
105 bool isMips32() const { return MipsArchVersion >= Mips32; }
106 bool isMips32r2() const { return MipsArchVersion == Mips32r2; }
108 bool isLittle() const { return IsLittle; }
109 bool isFP64bit() const { return IsFP64bit; }
110 bool isGP64bit() const { return IsGP64bit; }
111 bool isGP32bit() const { return !IsGP64bit; }
112 bool isSingleFloat() const { return IsSingleFloat; }
113 bool isNotSingleFloat() const { return !IsSingleFloat; }
114 bool hasVFPU() const { return HasVFPU; }
115 bool isLinux() const { return IsLinux; }
117 /// Features related to the presence of specific instructions.
118 bool hasSEInReg() const { return HasSEInReg; }
119 bool hasCondMov() const { return HasCondMov; }
120 bool hasMulDivAdd() const { return HasMulDivAdd; }
121 bool hasMinMax() const { return HasMinMax; }
122 bool hasSwap() const { return HasSwap; }
123 bool hasBitCount() const { return HasBitCount; }
125 } // End llvm namespace