1 //=====-- MipsSubtarget.h - Define Subtarget for the Mips -----*- C++ -*--====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSSUBTARGET_H
15 #define MIPSSUBTARGET_H
17 #include "llvm/Target/TargetSubtargetInfo.h"
18 #include "llvm/MC/MCInstrItineraries.h"
21 #define GET_SUBTARGETINFO_HEADER
22 #include "MipsGenSubtargetInfo.inc"
27 class MipsSubtarget : public MipsGenSubtargetInfo {
30 // NOTE: O64 will not be supported.
32 UnknownABI, O32, N32, N64, EABI
38 Mips32, Mips32r2, Mips64, Mips64r2
41 // Mips architecture version
42 MipsArchEnum MipsArchVersion;
44 // Mips supported ABIs
47 // IsLittle - The target is Little Endian
50 // IsSingleFloat - The target only supports single precision float
51 // point operations. This enable the target to use all 32 32-bit
52 // floating point registers instead of only using even ones.
55 // IsFP64bit - The target processor has 64-bit floating point registers.
58 // IsFP64bit - General-purpose registers are 64 bits wide
61 // HasVFPU - Processor has a vector floating point unit.
64 // isLinux - Target system is Linux. Is false we consider ELFOS for now.
67 /// Features related to the presence of specific instructions.
69 // HasSEInReg - SEB and SEH (signext in register) instructions.
72 // HasCondMov - Conditional mov (MOVZ, MOVN) instructions.
75 // HasMulDivAdd - Multiply add and sub (MADD, MADDu, MSUB, MSUBu)
79 // HasMinMax - MIN and MAX instructions.
82 // HasSwap - Byte and half swap instructions.
85 // HasBitCount - Count leading '1' and '0' bits.
88 InstrItineraryData InstrItins;
92 /// Only O32 and EABI supported right now.
93 bool isABI_EABI() const { return MipsABI == EABI; }
94 bool isABI_N64() const { return MipsABI == N64; }
95 bool isABI_N32() const { return MipsABI == N32; }
96 bool isABI_O32() const { return MipsABI == O32; }
97 unsigned getTargetABI() const { return MipsABI; }
99 /// This constructor initializes the data members to match that
100 /// of the specified triple.
101 MipsSubtarget(const std::string &TT, const std::string &CPU,
102 const std::string &FS, bool little);
104 /// ParseSubtargetFeatures - Parses features string setting specified
105 /// subtarget options. Definition of function is auto generated by tblgen.
106 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
108 bool hasMips32() const { return MipsArchVersion >= Mips32; }
109 bool hasMips32r2() const { return MipsArchVersion == Mips32r2 ||
110 MipsArchVersion == Mips64r2; }
111 bool hasMips64() const { return MipsArchVersion >= Mips64; }
112 bool hasMips64r2() const { return MipsArchVersion == Mips64r2; }
114 bool isLittle() const { return IsLittle; }
115 bool isFP64bit() const { return IsFP64bit; }
116 bool isGP64bit() const { return IsGP64bit; }
117 bool isGP32bit() const { return !IsGP64bit; }
118 bool isSingleFloat() const { return IsSingleFloat; }
119 bool isNotSingleFloat() const { return !IsSingleFloat; }
120 bool hasVFPU() const { return HasVFPU; }
121 bool isLinux() const { return IsLinux; }
123 /// Features related to the presence of specific instructions.
124 bool hasSEInReg() const { return HasSEInReg; }
125 bool hasCondMov() const { return HasCondMov; }
126 bool hasMulDivAdd() const { return HasMulDivAdd; }
127 bool hasMinMax() const { return HasMinMax; }
128 bool hasSwap() const { return HasSwap; }
129 bool hasBitCount() const { return HasBitCount; }
131 } // End llvm namespace