1 //=====-- MipsSubtarget.h - Define Subtarget for the Mips -----*- C++ -*--====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSSUBTARGET_H
15 #define MIPSSUBTARGET_H
17 #include "llvm/Target/TargetSubtargetInfo.h"
18 #include "llvm/MC/MCInstrItineraries.h"
21 #define GET_SUBTARGETINFO_HEADER
22 #include "MipsGenSubtargetInfo.inc"
27 class MipsSubtarget : public MipsGenSubtargetInfo {
31 O32, O64, N32, N64, EABI
40 // Mips architecture version
41 MipsArchEnum MipsArchVersion;
43 // Mips supported ABIs
46 // IsLittle - The target is Little Endian
49 // IsSingleFloat - The target only supports single precision float
50 // point operations. This enable the target to use all 32 32-bit
51 // floating point registers instead of only using even ones.
54 // IsFP64bit - The target processor has 64-bit floating point registers.
57 // IsFP64bit - General-purpose registers are 64 bits wide
60 // HasVFPU - Processor has a vector floating point unit.
63 // isLinux - Target system is Linux. Is false we consider ELFOS for now.
66 /// Features related to the presence of specific instructions.
68 // HasSEInReg - SEB and SEH (signext in register) instructions.
71 // HasCondMov - Conditional mov (MOVZ, MOVN) instructions.
74 // HasMulDivAdd - Multiply add and sub (MADD, MADDu, MSUB, MSUBu)
78 // HasMinMax - MIN and MAX instructions.
81 // HasSwap - Byte and half swap instructions.
84 // HasBitCount - Count leading '1' and '0' bits.
87 InstrItineraryData InstrItins;
91 /// Only O32 and EABI supported right now.
92 bool isABI_EABI() const { return MipsABI == EABI; }
93 bool isABI_O32() const { return MipsABI == O32; }
94 unsigned getTargetABI() const { return MipsABI; }
96 /// This constructor initializes the data members to match that
97 /// of the specified triple.
98 MipsSubtarget(const std::string &TT, const std::string &CPU,
99 const std::string &FS, bool little);
101 /// ParseSubtargetFeatures - Parses features string setting specified
102 /// subtarget options. Definition of function is auto generated by tblgen.
103 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
105 bool isMips32() const { return MipsArchVersion >= Mips32; }
106 bool isMips32r2() const { return MipsArchVersion == Mips32r2; }
108 bool isLittle() const { return IsLittle; }
109 bool isFP64bit() const { return IsFP64bit; }
110 bool isGP64bit() const { return IsGP64bit; }
111 bool isGP32bit() const { return !IsGP64bit; }
112 bool isSingleFloat() const { return IsSingleFloat; }
113 bool isNotSingleFloat() const { return !IsSingleFloat; }
114 bool hasVFPU() const { return HasVFPU; }
115 bool isLinux() const { return IsLinux; }
117 /// Features related to the presence of specific instructions.
118 bool hasSEInReg() const { return HasSEInReg; }
119 bool hasCondMov() const { return HasCondMov; }
120 bool hasMulDivAdd() const { return HasMulDivAdd; }
121 bool hasMinMax() const { return HasMinMax; }
122 bool hasSwap() const { return HasSwap; }
123 bool hasBitCount() const { return HasBitCount; }
125 } // End llvm namespace