1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -00--*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSTARGETMACHINE_H
15 #define MIPSTARGETMACHINE_H
17 #include "MipsSubtarget.h"
18 #include "MipsInstrInfo.h"
19 #include "MipsISelLowering.h"
20 #include "MipsFrameLowering.h"
21 #include "MipsSelectionDAGInfo.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Target/TargetData.h"
24 #include "llvm/Target/TargetFrameLowering.h"
25 #include "MipsJITInfo.h"
28 class formatted_raw_ostream;
30 class MipsTargetMachine : public LLVMTargetMachine {
31 MipsSubtarget Subtarget;
32 const TargetData DataLayout; // Calculates type size & alignment
33 MipsInstrInfo InstrInfo;
34 MipsFrameLowering FrameLowering;
35 MipsTargetLowering TLInfo;
36 MipsSelectionDAGInfo TSInfo;
40 MipsTargetMachine(const Target &T, StringRef TT,
41 StringRef CPU, StringRef FS, const TargetOptions &Options,
42 Reloc::Model RM, CodeModel::Model CM,
46 virtual const MipsInstrInfo *getInstrInfo() const
47 { return &InstrInfo; }
48 virtual const TargetFrameLowering *getFrameLowering() const
49 { return &FrameLowering; }
50 virtual const MipsSubtarget *getSubtargetImpl() const
51 { return &Subtarget; }
52 virtual const TargetData *getTargetData() const
53 { return &DataLayout;}
54 virtual MipsJITInfo *getJITInfo()
58 virtual const MipsRegisterInfo *getRegisterInfo() const {
59 return &InstrInfo.getRegisterInfo();
62 virtual const MipsTargetLowering *getTargetLowering() const {
66 virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const {
70 // Pass Pipeline Configuration
71 virtual bool addInstSelector(PassManagerBase &PM);
72 virtual bool addPreEmitPass(PassManagerBase &PM);
73 virtual bool addPreRegAlloc(PassManagerBase &PM);
74 virtual bool addPostRegAlloc(PassManagerBase &);
75 virtual bool addCodeEmitter(PassManagerBase &PM,
80 /// MipsebTargetMachine - Mips32 big endian target machine.
82 class MipsebTargetMachine : public MipsTargetMachine {
83 virtual void anchor();
85 MipsebTargetMachine(const Target &T, StringRef TT,
86 StringRef CPU, StringRef FS, const TargetOptions &Options,
87 Reloc::Model RM, CodeModel::Model CM,
88 CodeGenOpt::Level OL);
91 /// MipselTargetMachine - Mips32 little endian target machine.
93 class MipselTargetMachine : public MipsTargetMachine {
94 virtual void anchor();
96 MipselTargetMachine(const Target &T, StringRef TT,
97 StringRef CPU, StringRef FS, const TargetOptions &Options,
98 Reloc::Model RM, CodeModel::Model CM,
99 CodeGenOpt::Level OL);
102 /// Mips64ebTargetMachine - Mips64 big endian target machine.
104 class Mips64ebTargetMachine : public MipsTargetMachine {
105 virtual void anchor();
107 Mips64ebTargetMachine(const Target &T, StringRef TT,
108 StringRef CPU, StringRef FS,
109 const TargetOptions &Options,
110 Reloc::Model RM, CodeModel::Model CM,
111 CodeGenOpt::Level OL);
114 /// Mips64elTargetMachine - Mips64 little endian target machine.
116 class Mips64elTargetMachine : public MipsTargetMachine {
117 virtual void anchor();
119 Mips64elTargetMachine(const Target &T, StringRef TT,
120 StringRef CPU, StringRef FS,
121 const TargetOptions &Options,
122 Reloc::Model RM, CodeModel::Model CM,
123 CodeGenOpt::Level OL);
125 } // End llvm namespace