1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSTARGETMACHINE_H
15 #define MIPSTARGETMACHINE_H
17 #include "MipsFrameLowering.h"
18 #include "MipsISelLowering.h"
19 #include "MipsInstrInfo.h"
20 #include "MipsJITInfo.h"
21 #include "MipsSelectionDAGInfo.h"
22 #include "MipsSubtarget.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/CodeGen/SelectionDAGISel.h"
26 #include "llvm/IR/DataLayout.h"
27 #include "llvm/Target/TargetFrameLowering.h"
28 #include "llvm/Target/TargetMachine.h"
31 class formatted_raw_ostream;
32 class MipsRegisterInfo;
34 class MipsTargetMachine : public LLVMTargetMachine {
35 MipsSubtarget Subtarget;
36 const DataLayout DL; // Calculates type size & alignment
37 OwningPtr<const MipsInstrInfo> InstrInfo;
38 OwningPtr<const MipsFrameLowering> FrameLowering;
39 OwningPtr<const MipsTargetLowering> TLInfo;
40 OwningPtr<const MipsInstrInfo> InstrInfo16;
41 OwningPtr<const MipsFrameLowering> FrameLowering16;
42 OwningPtr<const MipsTargetLowering> TLInfo16;
43 OwningPtr<const MipsInstrInfo> InstrInfoSE;
44 OwningPtr<const MipsFrameLowering> FrameLoweringSE;
45 OwningPtr<const MipsTargetLowering> TLInfoSE;
46 MipsSelectionDAGInfo TSInfo;
50 MipsTargetMachine(const Target &T, StringRef TT,
51 StringRef CPU, StringRef FS, const TargetOptions &Options,
52 Reloc::Model RM, CodeModel::Model CM,
56 virtual ~MipsTargetMachine() {}
58 virtual void addAnalysisPasses(PassManagerBase &PM);
60 virtual const MipsInstrInfo *getInstrInfo() const
61 { return InstrInfo.get(); }
62 virtual const TargetFrameLowering *getFrameLowering() const
63 { return FrameLowering.get(); }
64 virtual const MipsSubtarget *getSubtargetImpl() const
65 { return &Subtarget; }
66 virtual const DataLayout *getDataLayout() const
68 virtual MipsJITInfo *getJITInfo()
71 virtual const MipsRegisterInfo *getRegisterInfo() const {
72 return &InstrInfo->getRegisterInfo();
75 virtual const MipsTargetLowering *getTargetLowering() const {
79 virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const {
83 // Pass Pipeline Configuration
84 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
85 virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE);
88 void setHelperClassesMips16();
90 void setHelperClassesMipsSE();
95 /// MipsebTargetMachine - Mips32/64 big endian target machine.
97 class MipsebTargetMachine : public MipsTargetMachine {
98 virtual void anchor();
100 MipsebTargetMachine(const Target &T, StringRef TT,
101 StringRef CPU, StringRef FS, const TargetOptions &Options,
102 Reloc::Model RM, CodeModel::Model CM,
103 CodeGenOpt::Level OL);
106 /// MipselTargetMachine - Mips32/64 little endian target machine.
108 class MipselTargetMachine : public MipsTargetMachine {
109 virtual void anchor();
111 MipselTargetMachine(const Target &T, StringRef TT,
112 StringRef CPU, StringRef FS, const TargetOptions &Options,
113 Reloc::Model RM, CodeModel::Model CM,
114 CodeGenOpt::Level OL);
117 } // End llvm namespace