1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSTARGETMACHINE_H
15 #define MIPSTARGETMACHINE_H
17 #include "MipsSubtarget.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/CodeGen/SelectionDAGISel.h"
20 #include "llvm/Target/TargetFrameLowering.h"
21 #include "llvm/Target/TargetMachine.h"
24 class formatted_raw_ostream;
25 class MipsRegisterInfo;
27 class MipsTargetMachine : public LLVMTargetMachine {
28 MipsSubtarget *Subtarget;
29 MipsSubtarget DefaultSubtarget;
30 MipsSubtarget NoMips16Subtarget;
31 MipsSubtarget Mips16Subtarget;
34 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
35 const TargetOptions &Options, Reloc::Model RM,
36 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
38 virtual ~MipsTargetMachine() {}
40 void addAnalysisPasses(PassManagerBase &PM) override;
42 const MipsSubtarget *getSubtargetImpl() const override {
45 return &DefaultSubtarget;
47 MipsSubtarget *getSubtargetImpl() {
48 return static_cast<MipsSubtarget *>(TargetMachine::getSubtargetImpl());
51 /// \brief Reset the subtarget for the Mips target.
52 void resetSubtarget(MachineFunction *MF);
54 // Pass Pipeline Configuration
55 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
56 bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
59 /// MipsebTargetMachine - Mips32/64 big endian target machine.
61 class MipsebTargetMachine : public MipsTargetMachine {
62 virtual void anchor();
64 MipsebTargetMachine(const Target &T, StringRef TT,
65 StringRef CPU, StringRef FS, const TargetOptions &Options,
66 Reloc::Model RM, CodeModel::Model CM,
67 CodeGenOpt::Level OL);
70 /// MipselTargetMachine - Mips32/64 little endian target machine.
72 class MipselTargetMachine : public MipsTargetMachine {
73 virtual void anchor();
75 MipselTargetMachine(const Target &T, StringRef TT,
76 StringRef CPU, StringRef FS, const TargetOptions &Options,
77 Reloc::Model RM, CodeModel::Model CM,
78 CodeGenOpt::Level OL);
81 } // End llvm namespace