1 //===-- NVPTXAsmPrinter.cpp - NVPTX LLVM assembly writer ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to NVPTX assembly language.
13 //===----------------------------------------------------------------------===//
15 #include "NVPTXAsmPrinter.h"
16 #include "InstPrinter/NVPTXInstPrinter.h"
17 #include "MCTargetDesc/NVPTXMCAsmInfo.h"
19 #include "NVPTXInstrInfo.h"
20 #include "NVPTXMachineFunctionInfo.h"
21 #include "NVPTXMCExpr.h"
22 #include "NVPTXRegisterInfo.h"
23 #include "NVPTXTargetMachine.h"
24 #include "NVPTXUtilities.h"
25 #include "cl_common_defines.h"
26 #include "llvm/ADT/StringExtras.h"
27 #include "llvm/Analysis/ConstantFolding.h"
28 #include "llvm/CodeGen/Analysis.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/MachineRegisterInfo.h"
32 #include "llvm/IR/DebugInfo.h"
33 #include "llvm/IR/DerivedTypes.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/GlobalVariable.h"
36 #include "llvm/IR/Mangler.h"
37 #include "llvm/IR/Module.h"
38 #include "llvm/IR/Operator.h"
39 #include "llvm/MC/MCStreamer.h"
40 #include "llvm/MC/MCSymbol.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/FormattedStream.h"
44 #include "llvm/Support/Path.h"
45 #include "llvm/Support/TargetRegistry.h"
46 #include "llvm/Support/TimeValue.h"
47 #include "llvm/Target/TargetLoweringObjectFile.h"
51 #define DEPOTNAME "__local_depot"
54 EmitLineNumbers("nvptx-emit-line-numbers", cl::Hidden,
55 cl::desc("NVPTX Specific: Emit Line numbers even without -G"),
59 InterleaveSrc("nvptx-emit-src", cl::ZeroOrMore, cl::Hidden,
60 cl::desc("NVPTX Specific: Emit source line in ptx file"),
64 /// DiscoverDependentGlobals - Return a set of GlobalVariables on which \p V
66 void DiscoverDependentGlobals(const Value *V,
67 DenseSet<const GlobalVariable *> &Globals) {
68 if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(V))
71 if (const User *U = dyn_cast<User>(V)) {
72 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) {
73 DiscoverDependentGlobals(U->getOperand(i), Globals);
79 /// VisitGlobalVariableForEmission - Add \p GV to the list of GlobalVariable
80 /// instances to be emitted, but only after any dependents have been added
82 void VisitGlobalVariableForEmission(
83 const GlobalVariable *GV, SmallVectorImpl<const GlobalVariable *> &Order,
84 DenseSet<const GlobalVariable *> &Visited,
85 DenseSet<const GlobalVariable *> &Visiting) {
86 // Have we already visited this one?
87 if (Visited.count(GV))
90 // Do we have a circular dependency?
91 if (Visiting.count(GV))
92 report_fatal_error("Circular dependency found in global variable set");
94 // Start visiting this global
97 // Make sure we visit all dependents first
98 DenseSet<const GlobalVariable *> Others;
99 for (unsigned i = 0, e = GV->getNumOperands(); i != e; ++i)
100 DiscoverDependentGlobals(GV->getOperand(i), Others);
102 for (DenseSet<const GlobalVariable *>::iterator I = Others.begin(),
105 VisitGlobalVariableForEmission(*I, Order, Visited, Visiting);
107 // Now we can visit ourself
114 // @TODO: This is a copy from AsmPrinter.cpp. The function is static, so we
115 // cannot just link to the existing version.
116 /// LowerConstant - Lower the specified LLVM Constant to an MCExpr.
118 using namespace nvptx;
119 const MCExpr *nvptx::LowerConstant(const Constant *CV, AsmPrinter &AP) {
120 MCContext &Ctx = AP.OutContext;
122 if (CV->isNullValue() || isa<UndefValue>(CV))
123 return MCConstantExpr::Create(0, Ctx);
125 if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV))
126 return MCConstantExpr::Create(CI->getZExtValue(), Ctx);
128 if (const GlobalValue *GV = dyn_cast<GlobalValue>(CV))
129 return MCSymbolRefExpr::Create(AP.getSymbol(GV), Ctx);
131 if (const BlockAddress *BA = dyn_cast<BlockAddress>(CV))
132 return MCSymbolRefExpr::Create(AP.GetBlockAddressSymbol(BA), Ctx);
134 const ConstantExpr *CE = dyn_cast<ConstantExpr>(CV);
136 llvm_unreachable("Unknown constant value to lower!");
138 switch (CE->getOpcode()) {
140 // If the code isn't optimized, there may be outstanding folding
141 // opportunities. Attempt to fold the expression using DataLayout as a
142 // last resort before giving up.
143 if (Constant *C = ConstantFoldConstantExpression(CE, AP.TM.getDataLayout()))
145 return LowerConstant(C, AP);
147 // Otherwise report the problem to the user.
150 raw_string_ostream OS(S);
151 OS << "Unsupported expression in static initializer: ";
152 CE->printAsOperand(OS, /*PrintType=*/ false,
153 !AP.MF ? nullptr : AP.MF->getFunction()->getParent());
154 report_fatal_error(OS.str());
156 case Instruction::AddrSpaceCast: {
157 // Strip any addrspace(1)->addrspace(0) addrspace casts. These will be
158 // handled by the generic() logic in the MCExpr printer
159 PointerType *DstTy = cast<PointerType>(CE->getType());
160 PointerType *SrcTy = cast<PointerType>(CE->getOperand(0)->getType());
161 if (SrcTy->getAddressSpace() == 1 && DstTy->getAddressSpace() == 0) {
162 return LowerConstant(cast<const Constant>(CE->getOperand(0)), AP);
165 raw_string_ostream OS(S);
166 OS << "Unsupported expression in static initializer: ";
167 CE->printAsOperand(OS, /*PrintType=*/ false,
168 !AP.MF ? nullptr : AP.MF->getFunction()->getParent());
169 report_fatal_error(OS.str());
171 case Instruction::GetElementPtr: {
172 const DataLayout &TD = *AP.TM.getDataLayout();
173 // Generate a symbolic expression for the byte address
174 APInt OffsetAI(TD.getPointerSizeInBits(), 0);
175 cast<GEPOperator>(CE)->accumulateConstantOffset(TD, OffsetAI);
177 const MCExpr *Base = LowerConstant(CE->getOperand(0), AP);
181 int64_t Offset = OffsetAI.getSExtValue();
182 return MCBinaryExpr::CreateAdd(Base, MCConstantExpr::Create(Offset, Ctx),
186 case Instruction::Trunc:
187 // We emit the value and depend on the assembler to truncate the generated
188 // expression properly. This is important for differences between
189 // blockaddress labels. Since the two labels are in the same function, it
190 // is reasonable to treat their delta as a 32-bit value.
192 case Instruction::BitCast:
193 return LowerConstant(CE->getOperand(0), AP);
195 case Instruction::IntToPtr: {
196 const DataLayout &TD = *AP.TM.getDataLayout();
197 // Handle casts to pointers by changing them into casts to the appropriate
198 // integer type. This promotes constant folding and simplifies this code.
199 Constant *Op = CE->getOperand(0);
200 Op = ConstantExpr::getIntegerCast(Op, TD.getIntPtrType(CV->getContext()),
202 return LowerConstant(Op, AP);
205 case Instruction::PtrToInt: {
206 const DataLayout &TD = *AP.TM.getDataLayout();
207 // Support only foldable casts to/from pointers that can be eliminated by
208 // changing the pointer to the appropriately sized integer type.
209 Constant *Op = CE->getOperand(0);
210 Type *Ty = CE->getType();
212 const MCExpr *OpExpr = LowerConstant(Op, AP);
214 // We can emit the pointer value into this slot if the slot is an
215 // integer slot equal to the size of the pointer.
216 if (TD.getTypeAllocSize(Ty) == TD.getTypeAllocSize(Op->getType()))
219 // Otherwise the pointer is smaller than the resultant integer, mask off
220 // the high bits so we are sure to get a proper truncation if the input is
222 unsigned InBits = TD.getTypeAllocSizeInBits(Op->getType());
223 const MCExpr *MaskExpr =
224 MCConstantExpr::Create(~0ULL >> (64 - InBits), Ctx);
225 return MCBinaryExpr::CreateAnd(OpExpr, MaskExpr, Ctx);
228 // The MC library also has a right-shift operator, but it isn't consistently
229 // signed or unsigned between different targets.
230 case Instruction::Add:
231 case Instruction::Sub:
232 case Instruction::Mul:
233 case Instruction::SDiv:
234 case Instruction::SRem:
235 case Instruction::Shl:
236 case Instruction::And:
237 case Instruction::Or:
238 case Instruction::Xor: {
239 const MCExpr *LHS = LowerConstant(CE->getOperand(0), AP);
240 const MCExpr *RHS = LowerConstant(CE->getOperand(1), AP);
241 switch (CE->getOpcode()) {
243 llvm_unreachable("Unknown binary operator constant cast expr");
244 case Instruction::Add:
245 return MCBinaryExpr::CreateAdd(LHS, RHS, Ctx);
246 case Instruction::Sub:
247 return MCBinaryExpr::CreateSub(LHS, RHS, Ctx);
248 case Instruction::Mul:
249 return MCBinaryExpr::CreateMul(LHS, RHS, Ctx);
250 case Instruction::SDiv:
251 return MCBinaryExpr::CreateDiv(LHS, RHS, Ctx);
252 case Instruction::SRem:
253 return MCBinaryExpr::CreateMod(LHS, RHS, Ctx);
254 case Instruction::Shl:
255 return MCBinaryExpr::CreateShl(LHS, RHS, Ctx);
256 case Instruction::And:
257 return MCBinaryExpr::CreateAnd(LHS, RHS, Ctx);
258 case Instruction::Or:
259 return MCBinaryExpr::CreateOr(LHS, RHS, Ctx);
260 case Instruction::Xor:
261 return MCBinaryExpr::CreateXor(LHS, RHS, Ctx);
267 void NVPTXAsmPrinter::emitLineNumberAsDotLoc(const MachineInstr &MI) {
268 if (!EmitLineNumbers)
273 DebugLoc curLoc = MI.getDebugLoc();
275 if (prevDebugLoc.isUnknown() && curLoc.isUnknown())
278 if (prevDebugLoc == curLoc)
281 prevDebugLoc = curLoc;
283 if (curLoc.isUnknown())
286 const MachineFunction *MF = MI.getParent()->getParent();
287 //const TargetMachine &TM = MF->getTarget();
289 const LLVMContext &ctx = MF->getFunction()->getContext();
290 DIScope Scope(curLoc.getScope(ctx));
292 assert((!Scope || Scope.isScope()) &&
293 "Scope of a DebugLoc should be null or a DIScope.");
297 StringRef fileName(Scope.getFilename());
298 StringRef dirName(Scope.getDirectory());
299 SmallString<128> FullPathName = dirName;
300 if (!dirName.empty() && !sys::path::is_absolute(fileName)) {
301 sys::path::append(FullPathName, fileName);
302 fileName = FullPathName.str();
305 if (filenameMap.find(fileName.str()) == filenameMap.end())
308 // Emit the line from the source file.
310 this->emitSrcInText(fileName.str(), curLoc.getLine());
312 std::stringstream temp;
313 temp << "\t.loc " << filenameMap[fileName.str()] << " " << curLoc.getLine()
314 << " " << curLoc.getCol();
315 OutStreamer.EmitRawText(Twine(temp.str().c_str()));
318 void NVPTXAsmPrinter::EmitInstruction(const MachineInstr *MI) {
319 SmallString<128> Str;
320 raw_svector_ostream OS(Str);
321 if (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA)
322 emitLineNumberAsDotLoc(*MI);
325 lowerToMCInst(MI, Inst);
326 EmitToStreamer(OutStreamer, Inst);
329 // Handle symbol backtracking for targets that do not support image handles
330 bool NVPTXAsmPrinter::lowerImageHandleOperand(const MachineInstr *MI,
331 unsigned OpNo, MCOperand &MCOp) {
332 const MachineOperand &MO = MI->getOperand(OpNo);
334 switch (MI->getOpcode()) {
335 default: return false;
336 case NVPTX::TEX_1D_F32_I32:
337 case NVPTX::TEX_1D_F32_F32:
338 case NVPTX::TEX_1D_F32_F32_LEVEL:
339 case NVPTX::TEX_1D_F32_F32_GRAD:
340 case NVPTX::TEX_1D_I32_I32:
341 case NVPTX::TEX_1D_I32_F32:
342 case NVPTX::TEX_1D_I32_F32_LEVEL:
343 case NVPTX::TEX_1D_I32_F32_GRAD:
344 case NVPTX::TEX_1D_ARRAY_F32_I32:
345 case NVPTX::TEX_1D_ARRAY_F32_F32:
346 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL:
347 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD:
348 case NVPTX::TEX_1D_ARRAY_I32_I32:
349 case NVPTX::TEX_1D_ARRAY_I32_F32:
350 case NVPTX::TEX_1D_ARRAY_I32_F32_LEVEL:
351 case NVPTX::TEX_1D_ARRAY_I32_F32_GRAD:
352 case NVPTX::TEX_2D_F32_I32:
353 case NVPTX::TEX_2D_F32_F32:
354 case NVPTX::TEX_2D_F32_F32_LEVEL:
355 case NVPTX::TEX_2D_F32_F32_GRAD:
356 case NVPTX::TEX_2D_I32_I32:
357 case NVPTX::TEX_2D_I32_F32:
358 case NVPTX::TEX_2D_I32_F32_LEVEL:
359 case NVPTX::TEX_2D_I32_F32_GRAD:
360 case NVPTX::TEX_2D_ARRAY_F32_I32:
361 case NVPTX::TEX_2D_ARRAY_F32_F32:
362 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL:
363 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD:
364 case NVPTX::TEX_2D_ARRAY_I32_I32:
365 case NVPTX::TEX_2D_ARRAY_I32_F32:
366 case NVPTX::TEX_2D_ARRAY_I32_F32_LEVEL:
367 case NVPTX::TEX_2D_ARRAY_I32_F32_GRAD:
368 case NVPTX::TEX_3D_F32_I32:
369 case NVPTX::TEX_3D_F32_F32:
370 case NVPTX::TEX_3D_F32_F32_LEVEL:
371 case NVPTX::TEX_3D_F32_F32_GRAD:
372 case NVPTX::TEX_3D_I32_I32:
373 case NVPTX::TEX_3D_I32_F32:
374 case NVPTX::TEX_3D_I32_F32_LEVEL:
375 case NVPTX::TEX_3D_I32_F32_GRAD:
377 // This is a texture fetch, so operand 4 is a texref and operand 5 is
380 lowerImageHandleSymbol(MO.getImm(), MCOp);
384 lowerImageHandleSymbol(MO.getImm(), MCOp);
390 case NVPTX::SULD_1D_I8_TRAP:
391 case NVPTX::SULD_1D_I16_TRAP:
392 case NVPTX::SULD_1D_I32_TRAP:
393 case NVPTX::SULD_1D_ARRAY_I8_TRAP:
394 case NVPTX::SULD_1D_ARRAY_I16_TRAP:
395 case NVPTX::SULD_1D_ARRAY_I32_TRAP:
396 case NVPTX::SULD_2D_I8_TRAP:
397 case NVPTX::SULD_2D_I16_TRAP:
398 case NVPTX::SULD_2D_I32_TRAP:
399 case NVPTX::SULD_2D_ARRAY_I8_TRAP:
400 case NVPTX::SULD_2D_ARRAY_I16_TRAP:
401 case NVPTX::SULD_2D_ARRAY_I32_TRAP:
402 case NVPTX::SULD_3D_I8_TRAP:
403 case NVPTX::SULD_3D_I16_TRAP:
404 case NVPTX::SULD_3D_I32_TRAP: {
405 // This is a V1 surface load, so operand 1 is a surfref
407 lowerImageHandleSymbol(MO.getImm(), MCOp);
413 case NVPTX::SULD_1D_V2I8_TRAP:
414 case NVPTX::SULD_1D_V2I16_TRAP:
415 case NVPTX::SULD_1D_V2I32_TRAP:
416 case NVPTX::SULD_1D_ARRAY_V2I8_TRAP:
417 case NVPTX::SULD_1D_ARRAY_V2I16_TRAP:
418 case NVPTX::SULD_1D_ARRAY_V2I32_TRAP:
419 case NVPTX::SULD_2D_V2I8_TRAP:
420 case NVPTX::SULD_2D_V2I16_TRAP:
421 case NVPTX::SULD_2D_V2I32_TRAP:
422 case NVPTX::SULD_2D_ARRAY_V2I8_TRAP:
423 case NVPTX::SULD_2D_ARRAY_V2I16_TRAP:
424 case NVPTX::SULD_2D_ARRAY_V2I32_TRAP:
425 case NVPTX::SULD_3D_V2I8_TRAP:
426 case NVPTX::SULD_3D_V2I16_TRAP:
427 case NVPTX::SULD_3D_V2I32_TRAP: {
428 // This is a V2 surface load, so operand 2 is a surfref
430 lowerImageHandleSymbol(MO.getImm(), MCOp);
436 case NVPTX::SULD_1D_V4I8_TRAP:
437 case NVPTX::SULD_1D_V4I16_TRAP:
438 case NVPTX::SULD_1D_V4I32_TRAP:
439 case NVPTX::SULD_1D_ARRAY_V4I8_TRAP:
440 case NVPTX::SULD_1D_ARRAY_V4I16_TRAP:
441 case NVPTX::SULD_1D_ARRAY_V4I32_TRAP:
442 case NVPTX::SULD_2D_V4I8_TRAP:
443 case NVPTX::SULD_2D_V4I16_TRAP:
444 case NVPTX::SULD_2D_V4I32_TRAP:
445 case NVPTX::SULD_2D_ARRAY_V4I8_TRAP:
446 case NVPTX::SULD_2D_ARRAY_V4I16_TRAP:
447 case NVPTX::SULD_2D_ARRAY_V4I32_TRAP:
448 case NVPTX::SULD_3D_V4I8_TRAP:
449 case NVPTX::SULD_3D_V4I16_TRAP:
450 case NVPTX::SULD_3D_V4I32_TRAP: {
451 // This is a V4 surface load, so operand 4 is a surfref
453 lowerImageHandleSymbol(MO.getImm(), MCOp);
459 case NVPTX::SUST_B_1D_B8_TRAP:
460 case NVPTX::SUST_B_1D_B16_TRAP:
461 case NVPTX::SUST_B_1D_B32_TRAP:
462 case NVPTX::SUST_B_1D_V2B8_TRAP:
463 case NVPTX::SUST_B_1D_V2B16_TRAP:
464 case NVPTX::SUST_B_1D_V2B32_TRAP:
465 case NVPTX::SUST_B_1D_V4B8_TRAP:
466 case NVPTX::SUST_B_1D_V4B16_TRAP:
467 case NVPTX::SUST_B_1D_V4B32_TRAP:
468 case NVPTX::SUST_B_1D_ARRAY_B8_TRAP:
469 case NVPTX::SUST_B_1D_ARRAY_B16_TRAP:
470 case NVPTX::SUST_B_1D_ARRAY_B32_TRAP:
471 case NVPTX::SUST_B_1D_ARRAY_V2B8_TRAP:
472 case NVPTX::SUST_B_1D_ARRAY_V2B16_TRAP:
473 case NVPTX::SUST_B_1D_ARRAY_V2B32_TRAP:
474 case NVPTX::SUST_B_1D_ARRAY_V4B8_TRAP:
475 case NVPTX::SUST_B_1D_ARRAY_V4B16_TRAP:
476 case NVPTX::SUST_B_1D_ARRAY_V4B32_TRAP:
477 case NVPTX::SUST_B_2D_B8_TRAP:
478 case NVPTX::SUST_B_2D_B16_TRAP:
479 case NVPTX::SUST_B_2D_B32_TRAP:
480 case NVPTX::SUST_B_2D_V2B8_TRAP:
481 case NVPTX::SUST_B_2D_V2B16_TRAP:
482 case NVPTX::SUST_B_2D_V2B32_TRAP:
483 case NVPTX::SUST_B_2D_V4B8_TRAP:
484 case NVPTX::SUST_B_2D_V4B16_TRAP:
485 case NVPTX::SUST_B_2D_V4B32_TRAP:
486 case NVPTX::SUST_B_2D_ARRAY_B8_TRAP:
487 case NVPTX::SUST_B_2D_ARRAY_B16_TRAP:
488 case NVPTX::SUST_B_2D_ARRAY_B32_TRAP:
489 case NVPTX::SUST_B_2D_ARRAY_V2B8_TRAP:
490 case NVPTX::SUST_B_2D_ARRAY_V2B16_TRAP:
491 case NVPTX::SUST_B_2D_ARRAY_V2B32_TRAP:
492 case NVPTX::SUST_B_2D_ARRAY_V4B8_TRAP:
493 case NVPTX::SUST_B_2D_ARRAY_V4B16_TRAP:
494 case NVPTX::SUST_B_2D_ARRAY_V4B32_TRAP:
495 case NVPTX::SUST_B_3D_B8_TRAP:
496 case NVPTX::SUST_B_3D_B16_TRAP:
497 case NVPTX::SUST_B_3D_B32_TRAP:
498 case NVPTX::SUST_B_3D_V2B8_TRAP:
499 case NVPTX::SUST_B_3D_V2B16_TRAP:
500 case NVPTX::SUST_B_3D_V2B32_TRAP:
501 case NVPTX::SUST_B_3D_V4B8_TRAP:
502 case NVPTX::SUST_B_3D_V4B16_TRAP:
503 case NVPTX::SUST_B_3D_V4B32_TRAP:
504 case NVPTX::SUST_P_1D_B8_TRAP:
505 case NVPTX::SUST_P_1D_B16_TRAP:
506 case NVPTX::SUST_P_1D_B32_TRAP:
507 case NVPTX::SUST_P_1D_V2B8_TRAP:
508 case NVPTX::SUST_P_1D_V2B16_TRAP:
509 case NVPTX::SUST_P_1D_V2B32_TRAP:
510 case NVPTX::SUST_P_1D_V4B8_TRAP:
511 case NVPTX::SUST_P_1D_V4B16_TRAP:
512 case NVPTX::SUST_P_1D_V4B32_TRAP:
513 case NVPTX::SUST_P_1D_ARRAY_B8_TRAP:
514 case NVPTX::SUST_P_1D_ARRAY_B16_TRAP:
515 case NVPTX::SUST_P_1D_ARRAY_B32_TRAP:
516 case NVPTX::SUST_P_1D_ARRAY_V2B8_TRAP:
517 case NVPTX::SUST_P_1D_ARRAY_V2B16_TRAP:
518 case NVPTX::SUST_P_1D_ARRAY_V2B32_TRAP:
519 case NVPTX::SUST_P_1D_ARRAY_V4B8_TRAP:
520 case NVPTX::SUST_P_1D_ARRAY_V4B16_TRAP:
521 case NVPTX::SUST_P_1D_ARRAY_V4B32_TRAP:
522 case NVPTX::SUST_P_2D_B8_TRAP:
523 case NVPTX::SUST_P_2D_B16_TRAP:
524 case NVPTX::SUST_P_2D_B32_TRAP:
525 case NVPTX::SUST_P_2D_V2B8_TRAP:
526 case NVPTX::SUST_P_2D_V2B16_TRAP:
527 case NVPTX::SUST_P_2D_V2B32_TRAP:
528 case NVPTX::SUST_P_2D_V4B8_TRAP:
529 case NVPTX::SUST_P_2D_V4B16_TRAP:
530 case NVPTX::SUST_P_2D_V4B32_TRAP:
531 case NVPTX::SUST_P_2D_ARRAY_B8_TRAP:
532 case NVPTX::SUST_P_2D_ARRAY_B16_TRAP:
533 case NVPTX::SUST_P_2D_ARRAY_B32_TRAP:
534 case NVPTX::SUST_P_2D_ARRAY_V2B8_TRAP:
535 case NVPTX::SUST_P_2D_ARRAY_V2B16_TRAP:
536 case NVPTX::SUST_P_2D_ARRAY_V2B32_TRAP:
537 case NVPTX::SUST_P_2D_ARRAY_V4B8_TRAP:
538 case NVPTX::SUST_P_2D_ARRAY_V4B16_TRAP:
539 case NVPTX::SUST_P_2D_ARRAY_V4B32_TRAP:
540 case NVPTX::SUST_P_3D_B8_TRAP:
541 case NVPTX::SUST_P_3D_B16_TRAP:
542 case NVPTX::SUST_P_3D_B32_TRAP:
543 case NVPTX::SUST_P_3D_V2B8_TRAP:
544 case NVPTX::SUST_P_3D_V2B16_TRAP:
545 case NVPTX::SUST_P_3D_V2B32_TRAP:
546 case NVPTX::SUST_P_3D_V4B8_TRAP:
547 case NVPTX::SUST_P_3D_V4B16_TRAP:
548 case NVPTX::SUST_P_3D_V4B32_TRAP: {
549 // This is a surface store, so operand 0 is a surfref
551 lowerImageHandleSymbol(MO.getImm(), MCOp);
557 case NVPTX::TXQ_CHANNEL_ORDER:
558 case NVPTX::TXQ_CHANNEL_DATA_TYPE:
559 case NVPTX::TXQ_WIDTH:
560 case NVPTX::TXQ_HEIGHT:
561 case NVPTX::TXQ_DEPTH:
562 case NVPTX::TXQ_ARRAY_SIZE:
563 case NVPTX::TXQ_NUM_SAMPLES:
564 case NVPTX::TXQ_NUM_MIPMAP_LEVELS:
565 case NVPTX::SUQ_CHANNEL_ORDER:
566 case NVPTX::SUQ_CHANNEL_DATA_TYPE:
567 case NVPTX::SUQ_WIDTH:
568 case NVPTX::SUQ_HEIGHT:
569 case NVPTX::SUQ_DEPTH:
570 case NVPTX::SUQ_ARRAY_SIZE: {
571 // This is a query, so operand 1 is a surfref/texref
573 lowerImageHandleSymbol(MO.getImm(), MCOp);
582 void NVPTXAsmPrinter::lowerImageHandleSymbol(unsigned Index, MCOperand &MCOp) {
584 TargetMachine &TM = const_cast<TargetMachine&>(MF->getTarget());
585 NVPTXTargetMachine &nvTM = static_cast<NVPTXTargetMachine&>(TM);
586 const NVPTXMachineFunctionInfo *MFI = MF->getInfo<NVPTXMachineFunctionInfo>();
587 const char *Sym = MFI->getImageHandleSymbol(Index);
588 std::string *SymNamePtr =
589 nvTM.getManagedStrPool()->getManagedString(Sym);
590 MCOp = GetSymbolRef(OutContext.GetOrCreateSymbol(
591 StringRef(SymNamePtr->c_str())));
594 void NVPTXAsmPrinter::lowerToMCInst(const MachineInstr *MI, MCInst &OutMI) {
595 OutMI.setOpcode(MI->getOpcode());
596 const NVPTXSubtarget &ST = TM.getSubtarget<NVPTXSubtarget>();
598 // Special: Do not mangle symbol operand of CALL_PROTOTYPE
599 if (MI->getOpcode() == NVPTX::CALL_PROTOTYPE) {
600 const MachineOperand &MO = MI->getOperand(0);
601 OutMI.addOperand(GetSymbolRef(
602 OutContext.GetOrCreateSymbol(Twine(MO.getSymbolName()))));
606 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
607 const MachineOperand &MO = MI->getOperand(i);
610 if (!ST.hasImageHandles()) {
611 if (lowerImageHandleOperand(MI, i, MCOp)) {
612 OutMI.addOperand(MCOp);
617 if (lowerOperand(MO, MCOp))
618 OutMI.addOperand(MCOp);
622 bool NVPTXAsmPrinter::lowerOperand(const MachineOperand &MO,
624 switch (MO.getType()) {
625 default: llvm_unreachable("unknown operand type");
626 case MachineOperand::MO_Register:
627 MCOp = MCOperand::CreateReg(encodeVirtualRegister(MO.getReg()));
629 case MachineOperand::MO_Immediate:
630 MCOp = MCOperand::CreateImm(MO.getImm());
632 case MachineOperand::MO_MachineBasicBlock:
633 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
634 MO.getMBB()->getSymbol(), OutContext));
636 case MachineOperand::MO_ExternalSymbol:
637 MCOp = GetSymbolRef(GetExternalSymbolSymbol(MO.getSymbolName()));
639 case MachineOperand::MO_GlobalAddress:
640 MCOp = GetSymbolRef(getSymbol(MO.getGlobal()));
642 case MachineOperand::MO_FPImmediate: {
643 const ConstantFP *Cnt = MO.getFPImm();
644 APFloat Val = Cnt->getValueAPF();
646 switch (Cnt->getType()->getTypeID()) {
647 default: report_fatal_error("Unsupported FP type"); break;
648 case Type::FloatTyID:
649 MCOp = MCOperand::CreateExpr(
650 NVPTXFloatMCExpr::CreateConstantFPSingle(Val, OutContext));
652 case Type::DoubleTyID:
653 MCOp = MCOperand::CreateExpr(
654 NVPTXFloatMCExpr::CreateConstantFPDouble(Val, OutContext));
663 unsigned NVPTXAsmPrinter::encodeVirtualRegister(unsigned Reg) {
664 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
665 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
667 DenseMap<unsigned, unsigned> &RegMap = VRegMapping[RC];
668 unsigned RegNum = RegMap[Reg];
670 // Encode the register class in the upper 4 bits
671 // Must be kept in sync with NVPTXInstPrinter::printRegName
673 if (RC == &NVPTX::Int1RegsRegClass) {
675 } else if (RC == &NVPTX::Int16RegsRegClass) {
677 } else if (RC == &NVPTX::Int32RegsRegClass) {
679 } else if (RC == &NVPTX::Int64RegsRegClass) {
681 } else if (RC == &NVPTX::Float32RegsRegClass) {
683 } else if (RC == &NVPTX::Float64RegsRegClass) {
686 report_fatal_error("Bad register class");
689 // Insert the vreg number
690 Ret |= (RegNum & 0x0FFFFFFF);
693 // Some special-use registers are actually physical registers.
694 // Encode this as the register class ID of 0 and the real register ID.
695 return Reg & 0x0FFFFFFF;
699 MCOperand NVPTXAsmPrinter::GetSymbolRef(const MCSymbol *Symbol) {
701 Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
703 return MCOperand::CreateExpr(Expr);
706 void NVPTXAsmPrinter::printReturnValStr(const Function *F, raw_ostream &O) {
707 const DataLayout *TD = TM.getDataLayout();
708 const TargetLowering *TLI = TM.getTargetLowering();
710 Type *Ty = F->getReturnType();
712 bool isABI = (nvptxSubtarget.getSmVersion() >= 20);
714 if (Ty->getTypeID() == Type::VoidTyID)
720 if (Ty->isFloatingPointTy() || Ty->isIntegerTy()) {
722 if (const IntegerType *ITy = dyn_cast<IntegerType>(Ty)) {
723 size = ITy->getBitWidth();
727 assert(Ty->isFloatingPointTy() && "Floating point type expected here");
728 size = Ty->getPrimitiveSizeInBits();
731 O << ".param .b" << size << " func_retval0";
732 } else if (isa<PointerType>(Ty)) {
733 O << ".param .b" << TLI->getPointerTy().getSizeInBits()
736 if ((Ty->getTypeID() == Type::StructTyID) || isa<VectorType>(Ty)) {
737 SmallVector<EVT, 16> vtparts;
738 ComputeValueVTs(*TLI, Ty, vtparts);
739 unsigned totalsz = 0;
740 for (unsigned i = 0, e = vtparts.size(); i != e; ++i) {
742 EVT elemtype = vtparts[i];
743 if (vtparts[i].isVector()) {
744 elems = vtparts[i].getVectorNumElements();
745 elemtype = vtparts[i].getVectorElementType();
747 for (unsigned j = 0, je = elems; j != je; ++j) {
748 unsigned sz = elemtype.getSizeInBits();
749 if (elemtype.isInteger() && (sz < 8))
754 unsigned retAlignment = 0;
755 if (!llvm::getAlign(*F, 0, retAlignment))
756 retAlignment = TD->getABITypeAlignment(Ty);
757 O << ".param .align " << retAlignment << " .b8 func_retval0[" << totalsz
760 assert(false && "Unknown return type");
763 SmallVector<EVT, 16> vtparts;
764 ComputeValueVTs(*TLI, Ty, vtparts);
766 for (unsigned i = 0, e = vtparts.size(); i != e; ++i) {
768 EVT elemtype = vtparts[i];
769 if (vtparts[i].isVector()) {
770 elems = vtparts[i].getVectorNumElements();
771 elemtype = vtparts[i].getVectorElementType();
774 for (unsigned j = 0, je = elems; j != je; ++j) {
775 unsigned sz = elemtype.getSizeInBits();
776 if (elemtype.isInteger() && (sz < 32))
778 O << ".reg .b" << sz << " func_retval" << idx;
791 void NVPTXAsmPrinter::printReturnValStr(const MachineFunction &MF,
793 const Function *F = MF.getFunction();
794 printReturnValStr(F, O);
797 void NVPTXAsmPrinter::EmitFunctionEntryLabel() {
798 SmallString<128> Str;
799 raw_svector_ostream O(Str);
801 if (!GlobalsEmitted) {
802 emitGlobals(*MF->getFunction()->getParent());
803 GlobalsEmitted = true;
807 MRI = &MF->getRegInfo();
808 F = MF->getFunction();
809 emitLinkageDirective(F, O);
810 if (llvm::isKernelFunction(*F))
814 printReturnValStr(*MF, O);
819 emitFunctionParamList(*MF, O);
821 if (llvm::isKernelFunction(*F))
822 emitKernelFunctionDirectives(*F, O);
824 OutStreamer.EmitRawText(O.str());
826 prevDebugLoc = DebugLoc();
829 void NVPTXAsmPrinter::EmitFunctionBodyStart() {
831 OutStreamer.EmitRawText(StringRef("{\n"));
832 setAndEmitFunctionVirtualRegisters(*MF);
834 SmallString<128> Str;
835 raw_svector_ostream O(Str);
836 emitDemotedVars(MF->getFunction(), O);
837 OutStreamer.EmitRawText(O.str());
840 void NVPTXAsmPrinter::EmitFunctionBodyEnd() {
841 OutStreamer.EmitRawText(StringRef("}\n"));
845 void NVPTXAsmPrinter::emitImplicitDef(const MachineInstr *MI) const {
846 unsigned RegNo = MI->getOperand(0).getReg();
847 const TargetRegisterInfo *TRI = TM.getRegisterInfo();
848 if (TRI->isVirtualRegister(RegNo)) {
849 OutStreamer.AddComment(Twine("implicit-def: ") +
850 getVirtualRegisterName(RegNo));
852 OutStreamer.AddComment(Twine("implicit-def: ") +
853 TM.getRegisterInfo()->getName(RegNo));
855 OutStreamer.AddBlankLine();
858 void NVPTXAsmPrinter::emitKernelFunctionDirectives(const Function &F,
859 raw_ostream &O) const {
860 // If the NVVM IR has some of reqntid* specified, then output
861 // the reqntid directive, and set the unspecified ones to 1.
862 // If none of reqntid* is specified, don't output reqntid directive.
863 unsigned reqntidx, reqntidy, reqntidz;
864 bool specified = false;
865 if (llvm::getReqNTIDx(F, reqntidx) == false)
869 if (llvm::getReqNTIDy(F, reqntidy) == false)
873 if (llvm::getReqNTIDz(F, reqntidz) == false)
879 O << ".reqntid " << reqntidx << ", " << reqntidy << ", " << reqntidz
882 // If the NVVM IR has some of maxntid* specified, then output
883 // the maxntid directive, and set the unspecified ones to 1.
884 // If none of maxntid* is specified, don't output maxntid directive.
885 unsigned maxntidx, maxntidy, maxntidz;
887 if (llvm::getMaxNTIDx(F, maxntidx) == false)
891 if (llvm::getMaxNTIDy(F, maxntidy) == false)
895 if (llvm::getMaxNTIDz(F, maxntidz) == false)
901 O << ".maxntid " << maxntidx << ", " << maxntidy << ", " << maxntidz
905 if (llvm::getMinCTASm(F, mincta))
906 O << ".minnctapersm " << mincta << "\n";
910 NVPTXAsmPrinter::getVirtualRegisterName(unsigned Reg) const {
911 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
914 raw_string_ostream NameStr(Name);
916 VRegRCMap::const_iterator I = VRegMapping.find(RC);
917 assert(I != VRegMapping.end() && "Bad register class");
918 const DenseMap<unsigned, unsigned> &RegMap = I->second;
920 VRegMap::const_iterator VI = RegMap.find(Reg);
921 assert(VI != RegMap.end() && "Bad virtual register");
922 unsigned MappedVR = VI->second;
924 NameStr << getNVPTXRegClassStr(RC) << MappedVR;
930 void NVPTXAsmPrinter::emitVirtualRegister(unsigned int vr,
932 O << getVirtualRegisterName(vr);
935 void NVPTXAsmPrinter::printVecModifiedImmediate(
936 const MachineOperand &MO, const char *Modifier, raw_ostream &O) {
937 static const char vecelem[] = { '0', '1', '2', '3', '0', '1', '2', '3' };
938 int Imm = (int) MO.getImm();
939 if (0 == strcmp(Modifier, "vecelem"))
940 O << "_" << vecelem[Imm];
941 else if (0 == strcmp(Modifier, "vecv4comm1")) {
942 if ((Imm < 0) || (Imm > 3))
944 } else if (0 == strcmp(Modifier, "vecv4comm2")) {
945 if ((Imm < 4) || (Imm > 7))
947 } else if (0 == strcmp(Modifier, "vecv4pos")) {
950 O << "_" << vecelem[Imm % 4];
951 } else if (0 == strcmp(Modifier, "vecv2comm1")) {
952 if ((Imm < 0) || (Imm > 1))
954 } else if (0 == strcmp(Modifier, "vecv2comm2")) {
955 if ((Imm < 2) || (Imm > 3))
957 } else if (0 == strcmp(Modifier, "vecv2pos")) {
960 O << "_" << vecelem[Imm % 2];
962 llvm_unreachable("Unknown Modifier on immediate operand");
967 void NVPTXAsmPrinter::emitDeclaration(const Function *F, raw_ostream &O) {
969 emitLinkageDirective(F, O);
970 if (llvm::isKernelFunction(*F))
974 printReturnValStr(F, O);
975 O << *getSymbol(F) << "\n";
976 emitFunctionParamList(F, O);
980 static bool usedInGlobalVarDef(const Constant *C) {
984 if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(C)) {
985 if (GV->getName().str() == "llvm.used")
990 for (const User *U : C->users())
991 if (const Constant *C = dyn_cast<Constant>(U))
992 if (usedInGlobalVarDef(C))
998 static bool usedInOneFunc(const User *U, Function const *&oneFunc) {
999 if (const GlobalVariable *othergv = dyn_cast<GlobalVariable>(U)) {
1000 if (othergv->getName().str() == "llvm.used")
1004 if (const Instruction *instr = dyn_cast<Instruction>(U)) {
1005 if (instr->getParent() && instr->getParent()->getParent()) {
1006 const Function *curFunc = instr->getParent()->getParent();
1007 if (oneFunc && (curFunc != oneFunc))
1015 if (const MDNode *md = dyn_cast<MDNode>(U))
1016 if (md->hasName() && ((md->getName().str() == "llvm.dbg.gv") ||
1017 (md->getName().str() == "llvm.dbg.sp")))
1020 for (const User *UU : U->users())
1021 if (usedInOneFunc(UU, oneFunc) == false)
1027 /* Find out if a global variable can be demoted to local scope.
1028 * Currently, this is valid for CUDA shared variables, which have local
1029 * scope and global lifetime. So the conditions to check are :
1030 * 1. Is the global variable in shared address space?
1031 * 2. Does it have internal linkage?
1032 * 3. Is the global variable referenced only in one function?
1034 static bool canDemoteGlobalVar(const GlobalVariable *gv, Function const *&f) {
1035 if (gv->hasInternalLinkage() == false)
1037 const PointerType *Pty = gv->getType();
1038 if (Pty->getAddressSpace() != llvm::ADDRESS_SPACE_SHARED)
1041 const Function *oneFunc = nullptr;
1043 bool flag = usedInOneFunc(gv, oneFunc);
1052 static bool useFuncSeen(const Constant *C,
1053 llvm::DenseMap<const Function *, bool> &seenMap) {
1054 for (const User *U : C->users()) {
1055 if (const Constant *cu = dyn_cast<Constant>(U)) {
1056 if (useFuncSeen(cu, seenMap))
1058 } else if (const Instruction *I = dyn_cast<Instruction>(U)) {
1059 const BasicBlock *bb = I->getParent();
1062 const Function *caller = bb->getParent();
1065 if (seenMap.find(caller) != seenMap.end())
1072 void NVPTXAsmPrinter::emitDeclarations(const Module &M, raw_ostream &O) {
1073 llvm::DenseMap<const Function *, bool> seenMap;
1074 for (Module::const_iterator FI = M.begin(), FE = M.end(); FI != FE; ++FI) {
1075 const Function *F = FI;
1077 if (F->isDeclaration()) {
1080 if (F->getIntrinsicID())
1082 emitDeclaration(F, O);
1085 for (const User *U : F->users()) {
1086 if (const Constant *C = dyn_cast<Constant>(U)) {
1087 if (usedInGlobalVarDef(C)) {
1088 // The use is in the initialization of a global variable
1089 // that is a function pointer, so print a declaration
1090 // for the original function
1091 emitDeclaration(F, O);
1094 // Emit a declaration of this function if the function that
1095 // uses this constant expr has already been seen.
1096 if (useFuncSeen(C, seenMap)) {
1097 emitDeclaration(F, O);
1102 if (!isa<Instruction>(U))
1104 const Instruction *instr = cast<Instruction>(U);
1105 const BasicBlock *bb = instr->getParent();
1108 const Function *caller = bb->getParent();
1112 // If a caller has already been seen, then the caller is
1113 // appearing in the module before the callee. so print out
1114 // a declaration for the callee.
1115 if (seenMap.find(caller) != seenMap.end()) {
1116 emitDeclaration(F, O);
1124 void NVPTXAsmPrinter::recordAndEmitFilenames(Module &M) {
1125 DebugInfoFinder DbgFinder;
1126 DbgFinder.processModule(M);
1129 for (DICompileUnit DIUnit : DbgFinder.compile_units()) {
1130 StringRef Filename(DIUnit.getFilename());
1131 StringRef Dirname(DIUnit.getDirectory());
1132 SmallString<128> FullPathName = Dirname;
1133 if (!Dirname.empty() && !sys::path::is_absolute(Filename)) {
1134 sys::path::append(FullPathName, Filename);
1135 Filename = FullPathName.str();
1137 if (filenameMap.find(Filename.str()) != filenameMap.end())
1139 filenameMap[Filename.str()] = i;
1140 OutStreamer.EmitDwarfFileDirective(i, "", Filename.str());
1144 for (DISubprogram SP : DbgFinder.subprograms()) {
1145 StringRef Filename(SP.getFilename());
1146 StringRef Dirname(SP.getDirectory());
1147 SmallString<128> FullPathName = Dirname;
1148 if (!Dirname.empty() && !sys::path::is_absolute(Filename)) {
1149 sys::path::append(FullPathName, Filename);
1150 Filename = FullPathName.str();
1152 if (filenameMap.find(Filename.str()) != filenameMap.end())
1154 filenameMap[Filename.str()] = i;
1159 bool NVPTXAsmPrinter::doInitialization(Module &M) {
1161 SmallString<128> Str1;
1162 raw_svector_ostream OS1(Str1);
1164 MMI = getAnalysisIfAvailable<MachineModuleInfo>();
1165 MMI->AnalyzeModule(M);
1167 // We need to call the parent's one explicitly.
1168 //bool Result = AsmPrinter::doInitialization(M);
1170 // Initialize TargetLoweringObjectFile.
1171 const_cast<TargetLoweringObjectFile &>(getObjFileLowering())
1172 .Initialize(OutContext, TM);
1174 Mang = new Mangler(TM.getDataLayout());
1176 // Emit header before any dwarf directives are emitted below.
1178 OutStreamer.EmitRawText(OS1.str());
1180 // Already commented out
1181 //bool Result = AsmPrinter::doInitialization(M);
1183 // Emit module-level inline asm if it exists.
1184 if (!M.getModuleInlineAsm().empty()) {
1185 OutStreamer.AddComment("Start of file scope inline assembly");
1186 OutStreamer.AddBlankLine();
1187 OutStreamer.EmitRawText(StringRef(M.getModuleInlineAsm()));
1188 OutStreamer.AddBlankLine();
1189 OutStreamer.AddComment("End of file scope inline assembly");
1190 OutStreamer.AddBlankLine();
1193 if (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA)
1194 recordAndEmitFilenames(M);
1196 GlobalsEmitted = false;
1198 return false; // success
1201 void NVPTXAsmPrinter::emitGlobals(const Module &M) {
1202 SmallString<128> Str2;
1203 raw_svector_ostream OS2(Str2);
1205 emitDeclarations(M, OS2);
1207 // As ptxas does not support forward references of globals, we need to first
1208 // sort the list of module-level globals in def-use order. We visit each
1209 // global variable in order, and ensure that we emit it *after* its dependent
1210 // globals. We use a little extra memory maintaining both a set and a list to
1211 // have fast searches while maintaining a strict ordering.
1212 SmallVector<const GlobalVariable *, 8> Globals;
1213 DenseSet<const GlobalVariable *> GVVisited;
1214 DenseSet<const GlobalVariable *> GVVisiting;
1216 // Visit each global variable, in order
1217 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
1219 VisitGlobalVariableForEmission(I, Globals, GVVisited, GVVisiting);
1221 assert(GVVisited.size() == M.getGlobalList().size() &&
1222 "Missed a global variable");
1223 assert(GVVisiting.size() == 0 && "Did not fully process a global variable");
1225 // Print out module-level global variables in proper order
1226 for (unsigned i = 0, e = Globals.size(); i != e; ++i)
1227 printModuleLevelGV(Globals[i], OS2);
1231 OutStreamer.EmitRawText(OS2.str());
1234 void NVPTXAsmPrinter::emitHeader(Module &M, raw_ostream &O) {
1236 O << "// Generated by LLVM NVPTX Back-End\n";
1240 unsigned PTXVersion = nvptxSubtarget.getPTXVersion();
1241 O << ".version " << (PTXVersion / 10) << "." << (PTXVersion % 10) << "\n";
1244 O << nvptxSubtarget.getTargetName();
1246 if (nvptxSubtarget.getDrvInterface() == NVPTX::NVCL)
1247 O << ", texmode_independent";
1248 if (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA) {
1249 if (!nvptxSubtarget.hasDouble())
1250 O << ", map_f64_to_f32";
1253 if (MAI->doesSupportDebugInformation())
1258 O << ".address_size ";
1259 if (nvptxSubtarget.is64Bit())
1268 bool NVPTXAsmPrinter::doFinalization(Module &M) {
1270 // If we did not emit any functions, then the global declarations have not
1271 // yet been emitted.
1272 if (!GlobalsEmitted) {
1274 GlobalsEmitted = true;
1277 // XXX Temproarily remove global variables so that doFinalization() will not
1278 // emit them again (global variables are emitted at beginning).
1280 Module::GlobalListType &global_list = M.getGlobalList();
1281 int i, n = global_list.size();
1282 GlobalVariable **gv_array = new GlobalVariable *[n];
1284 // first, back-up GlobalVariable in gv_array
1286 for (Module::global_iterator I = global_list.begin(), E = global_list.end();
1288 gv_array[i++] = &*I;
1290 // second, empty global_list
1291 while (!global_list.empty())
1292 global_list.remove(global_list.begin());
1294 // call doFinalization
1295 bool ret = AsmPrinter::doFinalization(M);
1297 // now we restore global variables
1298 for (i = 0; i < n; i++)
1299 global_list.insert(global_list.end(), gv_array[i]);
1301 clearAnnotationCache(&M);
1306 //bool Result = AsmPrinter::doFinalization(M);
1307 // Instead of calling the parents doFinalization, we may
1308 // clone parents doFinalization and customize here.
1309 // Currently, we if NVISA out the EmitGlobals() in
1310 // parent's doFinalization, which is too intrusive.
1312 // Same for the doInitialization.
1316 // This function emits appropriate linkage directives for
1317 // functions and global variables.
1319 // extern function declaration -> .extern
1320 // extern function definition -> .visible
1321 // external global variable with init -> .visible
1322 // external without init -> .extern
1323 // appending -> not allowed, assert.
1325 void NVPTXAsmPrinter::emitLinkageDirective(const GlobalValue *V,
1327 if (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA) {
1328 if (V->hasExternalLinkage()) {
1329 if (isa<GlobalVariable>(V)) {
1330 const GlobalVariable *GVar = cast<GlobalVariable>(V);
1332 if (GVar->hasInitializer())
1337 } else if (V->isDeclaration())
1341 } else if (V->hasAppendingLinkage()) {
1343 msg.append("Error: ");
1344 msg.append("Symbol ");
1346 msg.append(V->getName().str());
1347 msg.append("has unsupported appending linkage type");
1348 llvm_unreachable(msg.c_str());
1353 void NVPTXAsmPrinter::printModuleLevelGV(const GlobalVariable *GVar,
1355 bool processDemoted) {
1358 if (GVar->hasSection()) {
1359 if (GVar->getSection() == "llvm.metadata")
1363 const DataLayout *TD = TM.getDataLayout();
1365 // GlobalVariables are always constant pointers themselves.
1366 const PointerType *PTy = GVar->getType();
1367 Type *ETy = PTy->getElementType();
1369 if (GVar->hasExternalLinkage()) {
1370 if (GVar->hasInitializer())
1376 if (llvm::isTexture(*GVar)) {
1377 O << ".global .texref " << llvm::getTextureName(*GVar) << ";\n";
1381 if (llvm::isSurface(*GVar)) {
1382 O << ".global .surfref " << llvm::getSurfaceName(*GVar) << ";\n";
1386 if (GVar->isDeclaration()) {
1387 // (extern) declarations, no definition or initializer
1388 // Currently the only known declaration is for an automatic __local
1389 // (.shared) promoted to global.
1390 emitPTXGlobalVariable(GVar, O);
1395 if (llvm::isSampler(*GVar)) {
1396 O << ".global .samplerref " << llvm::getSamplerName(*GVar);
1398 const Constant *Initializer = nullptr;
1399 if (GVar->hasInitializer())
1400 Initializer = GVar->getInitializer();
1401 const ConstantInt *CI = nullptr;
1403 CI = dyn_cast<ConstantInt>(Initializer);
1405 unsigned sample = CI->getZExtValue();
1410 addr = ((sample & __CLK_ADDRESS_MASK) >> __CLK_ADDRESS_BASE);
1412 O << "addr_mode_" << i << " = ";
1418 O << "clamp_to_border";
1421 O << "clamp_to_edge";
1432 O << "filter_mode = ";
1433 switch ((sample & __CLK_FILTER_MASK) >> __CLK_FILTER_BASE) {
1441 assert(0 && "Anisotropic filtering is not supported");
1446 if (!((sample & __CLK_NORMALIZED_MASK) >> __CLK_NORMALIZED_BASE)) {
1447 O << ", force_unnormalized_coords = 1";
1456 if (GVar->hasPrivateLinkage()) {
1458 if (!strncmp(GVar->getName().data(), "unrollpragma", 12))
1461 // FIXME - need better way (e.g. Metadata) to avoid generating this global
1462 if (!strncmp(GVar->getName().data(), "filename", 8))
1464 if (GVar->use_empty())
1468 const Function *demotedFunc = nullptr;
1469 if (!processDemoted && canDemoteGlobalVar(GVar, demotedFunc)) {
1470 O << "// " << GVar->getName().str() << " has been demoted\n";
1471 if (localDecls.find(demotedFunc) != localDecls.end())
1472 localDecls[demotedFunc].push_back(GVar);
1474 std::vector<const GlobalVariable *> temp;
1475 temp.push_back(GVar);
1476 localDecls[demotedFunc] = temp;
1482 emitPTXAddressSpace(PTy->getAddressSpace(), O);
1483 if (GVar->getAlignment() == 0)
1484 O << " .align " << (int) TD->getPrefTypeAlignment(ETy);
1486 O << " .align " << GVar->getAlignment();
1488 if (ETy->isSingleValueType()) {
1490 // Special case: ABI requires that we use .u8 for predicates
1491 if (ETy->isIntegerTy(1))
1494 O << getPTXFundamentalTypeStr(ETy, false);
1496 O << *getSymbol(GVar);
1498 // Ptx allows variable initilization only for constant and global state
1500 if (((PTy->getAddressSpace() == llvm::ADDRESS_SPACE_GLOBAL) ||
1501 (PTy->getAddressSpace() == llvm::ADDRESS_SPACE_CONST)) &&
1502 GVar->hasInitializer()) {
1503 const Constant *Initializer = GVar->getInitializer();
1504 if (!Initializer->isNullValue()) {
1506 printScalarConstant(Initializer, O);
1510 unsigned int ElementSize = 0;
1512 // Although PTX has direct support for struct type and array type and
1513 // LLVM IR is very similar to PTX, the LLVM CodeGen does not support for
1514 // targets that support these high level field accesses. Structs, arrays
1515 // and vectors are lowered into arrays of bytes.
1516 switch (ETy->getTypeID()) {
1517 case Type::StructTyID:
1518 case Type::ArrayTyID:
1519 case Type::VectorTyID:
1520 ElementSize = TD->getTypeStoreSize(ETy);
1521 // Ptx allows variable initilization only for constant and
1522 // global state spaces.
1523 if (((PTy->getAddressSpace() == llvm::ADDRESS_SPACE_GLOBAL) ||
1524 (PTy->getAddressSpace() == llvm::ADDRESS_SPACE_CONST)) &&
1525 GVar->hasInitializer()) {
1526 const Constant *Initializer = GVar->getInitializer();
1527 if (!isa<UndefValue>(Initializer) && !Initializer->isNullValue()) {
1528 AggBuffer aggBuffer(ElementSize, O, *this);
1529 bufferAggregateConstant(Initializer, &aggBuffer);
1530 if (aggBuffer.numSymbols) {
1531 if (nvptxSubtarget.is64Bit()) {
1532 O << " .u64 " << *getSymbol(GVar) << "[";
1533 O << ElementSize / 8;
1535 O << " .u32 " << *getSymbol(GVar) << "[";
1536 O << ElementSize / 4;
1540 O << " .b8 " << *getSymbol(GVar) << "[";
1548 O << " .b8 " << *getSymbol(GVar);
1556 O << " .b8 " << *getSymbol(GVar);
1565 assert(0 && "type not supported yet");
1572 void NVPTXAsmPrinter::emitDemotedVars(const Function *f, raw_ostream &O) {
1573 if (localDecls.find(f) == localDecls.end())
1576 std::vector<const GlobalVariable *> &gvars = localDecls[f];
1578 for (unsigned i = 0, e = gvars.size(); i != e; ++i) {
1579 O << "\t// demoted variable\n\t";
1580 printModuleLevelGV(gvars[i], O, true);
1584 void NVPTXAsmPrinter::emitPTXAddressSpace(unsigned int AddressSpace,
1585 raw_ostream &O) const {
1586 switch (AddressSpace) {
1587 case llvm::ADDRESS_SPACE_LOCAL:
1590 case llvm::ADDRESS_SPACE_GLOBAL:
1593 case llvm::ADDRESS_SPACE_CONST:
1596 case llvm::ADDRESS_SPACE_SHARED:
1600 report_fatal_error("Bad address space found while emitting PTX");
1606 NVPTXAsmPrinter::getPTXFundamentalTypeStr(const Type *Ty, bool useB4PTR) const {
1607 switch (Ty->getTypeID()) {
1609 llvm_unreachable("unexpected type");
1611 case Type::IntegerTyID: {
1612 unsigned NumBits = cast<IntegerType>(Ty)->getBitWidth();
1615 else if (NumBits <= 64) {
1616 std::string name = "u";
1617 return name + utostr(NumBits);
1619 llvm_unreachable("Integer too large");
1624 case Type::FloatTyID:
1626 case Type::DoubleTyID:
1628 case Type::PointerTyID:
1629 if (nvptxSubtarget.is64Bit())
1639 llvm_unreachable("unexpected type");
1643 void NVPTXAsmPrinter::emitPTXGlobalVariable(const GlobalVariable *GVar,
1646 const DataLayout *TD = TM.getDataLayout();
1648 // GlobalVariables are always constant pointers themselves.
1649 const PointerType *PTy = GVar->getType();
1650 Type *ETy = PTy->getElementType();
1653 emitPTXAddressSpace(PTy->getAddressSpace(), O);
1654 if (GVar->getAlignment() == 0)
1655 O << " .align " << (int) TD->getPrefTypeAlignment(ETy);
1657 O << " .align " << GVar->getAlignment();
1659 if (ETy->isSingleValueType()) {
1661 O << getPTXFundamentalTypeStr(ETy);
1663 O << *getSymbol(GVar);
1667 int64_t ElementSize = 0;
1669 // Although PTX has direct support for struct type and array type and LLVM IR
1670 // is very similar to PTX, the LLVM CodeGen does not support for targets that
1671 // support these high level field accesses. Structs and arrays are lowered
1672 // into arrays of bytes.
1673 switch (ETy->getTypeID()) {
1674 case Type::StructTyID:
1675 case Type::ArrayTyID:
1676 case Type::VectorTyID:
1677 ElementSize = TD->getTypeStoreSize(ETy);
1678 O << " .b8 " << *getSymbol(GVar) << "[";
1680 O << itostr(ElementSize);
1685 assert(0 && "type not supported yet");
1690 static unsigned int getOpenCLAlignment(const DataLayout *TD, Type *Ty) {
1691 if (Ty->isSingleValueType())
1692 return TD->getPrefTypeAlignment(Ty);
1694 const ArrayType *ATy = dyn_cast<ArrayType>(Ty);
1696 return getOpenCLAlignment(TD, ATy->getElementType());
1698 const VectorType *VTy = dyn_cast<VectorType>(Ty);
1700 Type *ETy = VTy->getElementType();
1701 unsigned int numE = VTy->getNumElements();
1702 unsigned int alignE = TD->getPrefTypeAlignment(ETy);
1706 return numE * alignE;
1709 const StructType *STy = dyn_cast<StructType>(Ty);
1711 unsigned int alignStruct = 1;
1712 // Go through each element of the struct and find the
1713 // largest alignment.
1714 for (unsigned i = 0, e = STy->getNumElements(); i != e; i++) {
1715 Type *ETy = STy->getElementType(i);
1716 unsigned int align = getOpenCLAlignment(TD, ETy);
1717 if (align > alignStruct)
1718 alignStruct = align;
1723 const FunctionType *FTy = dyn_cast<FunctionType>(Ty);
1725 return TD->getPointerPrefAlignment();
1726 return TD->getPrefTypeAlignment(Ty);
1729 void NVPTXAsmPrinter::printParamName(Function::const_arg_iterator I,
1730 int paramIndex, raw_ostream &O) {
1731 if ((nvptxSubtarget.getDrvInterface() == NVPTX::NVCL) ||
1732 (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA))
1733 O << *getSymbol(I->getParent()) << "_param_" << paramIndex;
1735 std::string argName = I->getName();
1736 const char *p = argName.c_str();
1747 void NVPTXAsmPrinter::printParamName(int paramIndex, raw_ostream &O) {
1748 Function::const_arg_iterator I, E;
1751 if ((nvptxSubtarget.getDrvInterface() == NVPTX::NVCL) ||
1752 (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA)) {
1753 O << *CurrentFnSym << "_param_" << paramIndex;
1757 for (I = F->arg_begin(), E = F->arg_end(); I != E; ++I, i++) {
1758 if (i == paramIndex) {
1759 printParamName(I, paramIndex, O);
1763 llvm_unreachable("paramIndex out of bound");
1766 void NVPTXAsmPrinter::emitFunctionParamList(const Function *F, raw_ostream &O) {
1767 const DataLayout *TD = TM.getDataLayout();
1768 const AttributeSet &PAL = F->getAttributes();
1769 const TargetLowering *TLI = TM.getTargetLowering();
1770 Function::const_arg_iterator I, E;
1771 unsigned paramIndex = 0;
1773 bool isKernelFunc = llvm::isKernelFunction(*F);
1774 bool isABI = (nvptxSubtarget.getSmVersion() >= 20);
1775 MVT thePointerTy = TLI->getPointerTy();
1779 for (I = F->arg_begin(), E = F->arg_end(); I != E; ++I, paramIndex++) {
1780 Type *Ty = I->getType();
1787 // Handle image/sampler parameters
1788 if (isKernelFunction(*F)) {
1789 if (isSampler(*I) || isImage(*I)) {
1791 std::string sname = I->getName();
1792 if (isImageWriteOnly(*I) || isImageReadWrite(*I)) {
1793 if (nvptxSubtarget.hasImageHandles())
1794 O << "\t.param .u64 .ptr .surfref ";
1796 O << "\t.param .surfref ";
1797 O << *CurrentFnSym << "_param_" << paramIndex;
1799 else { // Default image is read_only
1800 if (nvptxSubtarget.hasImageHandles())
1801 O << "\t.param .u64 .ptr .texref ";
1803 O << "\t.param .texref ";
1804 O << *CurrentFnSym << "_param_" << paramIndex;
1807 if (nvptxSubtarget.hasImageHandles())
1808 O << "\t.param .u64 .ptr .samplerref ";
1810 O << "\t.param .samplerref ";
1811 O << *CurrentFnSym << "_param_" << paramIndex;
1817 if (PAL.hasAttribute(paramIndex + 1, Attribute::ByVal) == false) {
1818 if (Ty->isAggregateType() || Ty->isVectorTy()) {
1819 // Just print .param .align <a> .b8 .param[size];
1820 // <a> = PAL.getparamalignment
1821 // size = typeallocsize of element type
1822 unsigned align = PAL.getParamAlignment(paramIndex + 1);
1824 align = TD->getABITypeAlignment(Ty);
1826 unsigned sz = TD->getTypeAllocSize(Ty);
1827 O << "\t.param .align " << align << " .b8 ";
1828 printParamName(I, paramIndex, O);
1829 O << "[" << sz << "]";
1834 const PointerType *PTy = dyn_cast<PointerType>(Ty);
1837 // Special handling for pointer arguments to kernel
1838 O << "\t.param .u" << thePointerTy.getSizeInBits() << " ";
1840 if (nvptxSubtarget.getDrvInterface() != NVPTX::CUDA) {
1841 Type *ETy = PTy->getElementType();
1842 int addrSpace = PTy->getAddressSpace();
1843 switch (addrSpace) {
1847 case llvm::ADDRESS_SPACE_CONST:
1848 O << ".ptr .const ";
1850 case llvm::ADDRESS_SPACE_SHARED:
1851 O << ".ptr .shared ";
1853 case llvm::ADDRESS_SPACE_GLOBAL:
1854 O << ".ptr .global ";
1857 O << ".align " << (int) getOpenCLAlignment(TD, ETy) << " ";
1859 printParamName(I, paramIndex, O);
1863 // non-pointer scalar to kernel func
1865 // Special case: predicate operands become .u8 types
1866 if (Ty->isIntegerTy(1))
1869 O << getPTXFundamentalTypeStr(Ty);
1871 printParamName(I, paramIndex, O);
1874 // Non-kernel function, just print .param .b<size> for ABI
1875 // and .reg .b<size> for non-ABI
1877 if (isa<IntegerType>(Ty)) {
1878 sz = cast<IntegerType>(Ty)->getBitWidth();
1881 } else if (isa<PointerType>(Ty))
1882 sz = thePointerTy.getSizeInBits();
1884 sz = Ty->getPrimitiveSizeInBits();
1886 O << "\t.param .b" << sz << " ";
1888 O << "\t.reg .b" << sz << " ";
1889 printParamName(I, paramIndex, O);
1893 // param has byVal attribute. So should be a pointer
1894 const PointerType *PTy = dyn_cast<PointerType>(Ty);
1895 assert(PTy && "Param with byval attribute should be a pointer type");
1896 Type *ETy = PTy->getElementType();
1898 if (isABI || isKernelFunc) {
1899 // Just print .param .align <a> .b8 .param[size];
1900 // <a> = PAL.getparamalignment
1901 // size = typeallocsize of element type
1902 unsigned align = PAL.getParamAlignment(paramIndex + 1);
1904 align = TD->getABITypeAlignment(ETy);
1906 unsigned sz = TD->getTypeAllocSize(ETy);
1907 O << "\t.param .align " << align << " .b8 ";
1908 printParamName(I, paramIndex, O);
1909 O << "[" << sz << "]";
1912 // Split the ETy into constituent parts and
1913 // print .param .b<size> <name> for each part.
1914 // Further, if a part is vector, print the above for
1915 // each vector element.
1916 SmallVector<EVT, 16> vtparts;
1917 ComputeValueVTs(*TLI, ETy, vtparts);
1918 for (unsigned i = 0, e = vtparts.size(); i != e; ++i) {
1920 EVT elemtype = vtparts[i];
1921 if (vtparts[i].isVector()) {
1922 elems = vtparts[i].getVectorNumElements();
1923 elemtype = vtparts[i].getVectorElementType();
1926 for (unsigned j = 0, je = elems; j != je; ++j) {
1927 unsigned sz = elemtype.getSizeInBits();
1928 if (elemtype.isInteger() && (sz < 32))
1930 O << "\t.reg .b" << sz << " ";
1931 printParamName(I, paramIndex, O);
1947 void NVPTXAsmPrinter::emitFunctionParamList(const MachineFunction &MF,
1949 const Function *F = MF.getFunction();
1950 emitFunctionParamList(F, O);
1953 void NVPTXAsmPrinter::setAndEmitFunctionVirtualRegisters(
1954 const MachineFunction &MF) {
1955 SmallString<128> Str;
1956 raw_svector_ostream O(Str);
1958 // Map the global virtual register number to a register class specific
1959 // virtual register number starting from 1 with that class.
1960 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
1961 //unsigned numRegClasses = TRI->getNumRegClasses();
1963 // Emit the Fake Stack Object
1964 const MachineFrameInfo *MFI = MF.getFrameInfo();
1965 int NumBytes = (int) MFI->getStackSize();
1967 O << "\t.local .align " << MFI->getMaxAlignment() << " .b8 \t" << DEPOTNAME
1968 << getFunctionNumber() << "[" << NumBytes << "];\n";
1969 if (nvptxSubtarget.is64Bit()) {
1970 O << "\t.reg .b64 \t%SP;\n";
1971 O << "\t.reg .b64 \t%SPL;\n";
1973 O << "\t.reg .b32 \t%SP;\n";
1974 O << "\t.reg .b32 \t%SPL;\n";
1978 // Go through all virtual registers to establish the mapping between the
1980 // register number and the per class virtual register number.
1981 // We use the per class virtual register number in the ptx output.
1982 unsigned int numVRs = MRI->getNumVirtRegs();
1983 for (unsigned i = 0; i < numVRs; i++) {
1984 unsigned int vr = TRI->index2VirtReg(i);
1985 const TargetRegisterClass *RC = MRI->getRegClass(vr);
1986 DenseMap<unsigned, unsigned> ®map = VRegMapping[RC];
1987 int n = regmap.size();
1988 regmap.insert(std::make_pair(vr, n + 1));
1991 // Emit register declarations
1992 // @TODO: Extract out the real register usage
1993 // O << "\t.reg .pred %p<" << NVPTXNumRegisters << ">;\n";
1994 // O << "\t.reg .s16 %rc<" << NVPTXNumRegisters << ">;\n";
1995 // O << "\t.reg .s16 %rs<" << NVPTXNumRegisters << ">;\n";
1996 // O << "\t.reg .s32 %r<" << NVPTXNumRegisters << ">;\n";
1997 // O << "\t.reg .s64 %rl<" << NVPTXNumRegisters << ">;\n";
1998 // O << "\t.reg .f32 %f<" << NVPTXNumRegisters << ">;\n";
1999 // O << "\t.reg .f64 %fl<" << NVPTXNumRegisters << ">;\n";
2001 // Emit declaration of the virtual registers or 'physical' registers for
2002 // each register class
2003 for (unsigned i=0; i< TRI->getNumRegClasses(); i++) {
2004 const TargetRegisterClass *RC = TRI->getRegClass(i);
2005 DenseMap<unsigned, unsigned> ®map = VRegMapping[RC];
2006 std::string rcname = getNVPTXRegClassName(RC);
2007 std::string rcStr = getNVPTXRegClassStr(RC);
2008 int n = regmap.size();
2010 // Only declare those registers that may be used.
2012 O << "\t.reg " << rcname << " \t" << rcStr << "<" << (n+1)
2017 OutStreamer.EmitRawText(O.str());
2020 void NVPTXAsmPrinter::printFPConstant(const ConstantFP *Fp, raw_ostream &O) {
2021 APFloat APF = APFloat(Fp->getValueAPF()); // make a copy
2023 unsigned int numHex;
2026 if (Fp->getType()->getTypeID() == Type::FloatTyID) {
2029 APF.convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToEven, &ignored);
2030 } else if (Fp->getType()->getTypeID() == Type::DoubleTyID) {
2033 APF.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven, &ignored);
2035 llvm_unreachable("unsupported fp type");
2037 APInt API = APF.bitcastToAPInt();
2038 std::string hexstr(utohexstr(API.getZExtValue()));
2040 if (hexstr.length() < numHex)
2041 O << std::string(numHex - hexstr.length(), '0');
2042 O << utohexstr(API.getZExtValue());
2045 void NVPTXAsmPrinter::printScalarConstant(const Constant *CPV, raw_ostream &O) {
2046 if (const ConstantInt *CI = dyn_cast<ConstantInt>(CPV)) {
2047 O << CI->getValue();
2050 if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CPV)) {
2051 printFPConstant(CFP, O);
2054 if (isa<ConstantPointerNull>(CPV)) {
2058 if (const GlobalValue *GVar = dyn_cast<GlobalValue>(CPV)) {
2059 PointerType *PTy = dyn_cast<PointerType>(GVar->getType());
2060 bool IsNonGenericPointer = false;
2061 if (PTy && PTy->getAddressSpace() != 0) {
2062 IsNonGenericPointer = true;
2064 if (EmitGeneric && !isa<Function>(CPV) && !IsNonGenericPointer) {
2066 O << *getSymbol(GVar);
2069 O << *getSymbol(GVar);
2073 if (const ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
2074 const Value *v = Cexpr->stripPointerCasts();
2075 PointerType *PTy = dyn_cast<PointerType>(Cexpr->getType());
2076 bool IsNonGenericPointer = false;
2077 if (PTy && PTy->getAddressSpace() != 0) {
2078 IsNonGenericPointer = true;
2080 if (const GlobalValue *GVar = dyn_cast<GlobalValue>(v)) {
2081 if (EmitGeneric && !isa<Function>(v) && !IsNonGenericPointer) {
2083 O << *getSymbol(GVar);
2086 O << *getSymbol(GVar);
2090 O << *LowerConstant(CPV, *this);
2094 llvm_unreachable("Not scalar type found in printScalarConstant()");
2097 void NVPTXAsmPrinter::bufferLEByte(const Constant *CPV, int Bytes,
2098 AggBuffer *aggBuffer) {
2100 const DataLayout *TD = TM.getDataLayout();
2102 if (isa<UndefValue>(CPV) || CPV->isNullValue()) {
2103 int s = TD->getTypeAllocSize(CPV->getType());
2106 aggBuffer->addZeros(s);
2111 switch (CPV->getType()->getTypeID()) {
2113 case Type::IntegerTyID: {
2114 const Type *ETy = CPV->getType();
2115 if (ETy == Type::getInt8Ty(CPV->getContext())) {
2117 (unsigned char)(dyn_cast<ConstantInt>(CPV))->getZExtValue();
2119 aggBuffer->addBytes(ptr, 1, Bytes);
2120 } else if (ETy == Type::getInt16Ty(CPV->getContext())) {
2121 short int16 = (short)(dyn_cast<ConstantInt>(CPV))->getZExtValue();
2122 ptr = (unsigned char *)&int16;
2123 aggBuffer->addBytes(ptr, 2, Bytes);
2124 } else if (ETy == Type::getInt32Ty(CPV->getContext())) {
2125 if (const ConstantInt *constInt = dyn_cast<ConstantInt>(CPV)) {
2126 int int32 = (int)(constInt->getZExtValue());
2127 ptr = (unsigned char *)&int32;
2128 aggBuffer->addBytes(ptr, 4, Bytes);
2130 } else if (const ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
2131 if (const ConstantInt *constInt = dyn_cast<ConstantInt>(
2132 ConstantFoldConstantExpression(Cexpr, TD))) {
2133 int int32 = (int)(constInt->getZExtValue());
2134 ptr = (unsigned char *)&int32;
2135 aggBuffer->addBytes(ptr, 4, Bytes);
2138 if (Cexpr->getOpcode() == Instruction::PtrToInt) {
2139 Value *v = Cexpr->getOperand(0)->stripPointerCasts();
2140 aggBuffer->addSymbol(v);
2141 aggBuffer->addZeros(4);
2145 llvm_unreachable("unsupported integer const type");
2146 } else if (ETy == Type::getInt64Ty(CPV->getContext())) {
2147 if (const ConstantInt *constInt = dyn_cast<ConstantInt>(CPV)) {
2148 long long int64 = (long long)(constInt->getZExtValue());
2149 ptr = (unsigned char *)&int64;
2150 aggBuffer->addBytes(ptr, 8, Bytes);
2152 } else if (const ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
2153 if (const ConstantInt *constInt = dyn_cast<ConstantInt>(
2154 ConstantFoldConstantExpression(Cexpr, TD))) {
2155 long long int64 = (long long)(constInt->getZExtValue());
2156 ptr = (unsigned char *)&int64;
2157 aggBuffer->addBytes(ptr, 8, Bytes);
2160 if (Cexpr->getOpcode() == Instruction::PtrToInt) {
2161 Value *v = Cexpr->getOperand(0)->stripPointerCasts();
2162 aggBuffer->addSymbol(v);
2163 aggBuffer->addZeros(8);
2167 llvm_unreachable("unsupported integer const type");
2169 llvm_unreachable("unsupported integer const type");
2172 case Type::FloatTyID:
2173 case Type::DoubleTyID: {
2174 const ConstantFP *CFP = dyn_cast<ConstantFP>(CPV);
2175 const Type *Ty = CFP->getType();
2176 if (Ty == Type::getFloatTy(CPV->getContext())) {
2177 float float32 = (float) CFP->getValueAPF().convertToFloat();
2178 ptr = (unsigned char *)&float32;
2179 aggBuffer->addBytes(ptr, 4, Bytes);
2180 } else if (Ty == Type::getDoubleTy(CPV->getContext())) {
2181 double float64 = CFP->getValueAPF().convertToDouble();
2182 ptr = (unsigned char *)&float64;
2183 aggBuffer->addBytes(ptr, 8, Bytes);
2185 llvm_unreachable("unsupported fp const type");
2189 case Type::PointerTyID: {
2190 if (const GlobalValue *GVar = dyn_cast<GlobalValue>(CPV)) {
2191 aggBuffer->addSymbol(GVar);
2192 } else if (const ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
2193 const Value *v = Cexpr->stripPointerCasts();
2194 aggBuffer->addSymbol(v);
2196 unsigned int s = TD->getTypeAllocSize(CPV->getType());
2197 aggBuffer->addZeros(s);
2201 case Type::ArrayTyID:
2202 case Type::VectorTyID:
2203 case Type::StructTyID: {
2204 if (isa<ConstantArray>(CPV) || isa<ConstantVector>(CPV) ||
2205 isa<ConstantStruct>(CPV) || isa<ConstantDataSequential>(CPV)) {
2206 int ElementSize = TD->getTypeAllocSize(CPV->getType());
2207 bufferAggregateConstant(CPV, aggBuffer);
2208 if (Bytes > ElementSize)
2209 aggBuffer->addZeros(Bytes - ElementSize);
2210 } else if (isa<ConstantAggregateZero>(CPV))
2211 aggBuffer->addZeros(Bytes);
2213 llvm_unreachable("Unexpected Constant type");
2218 llvm_unreachable("unsupported type");
2222 void NVPTXAsmPrinter::bufferAggregateConstant(const Constant *CPV,
2223 AggBuffer *aggBuffer) {
2224 const DataLayout *TD = TM.getDataLayout();
2228 if (isa<ConstantArray>(CPV) || isa<ConstantVector>(CPV)) {
2229 if (CPV->getNumOperands())
2230 for (unsigned i = 0, e = CPV->getNumOperands(); i != e; ++i)
2231 bufferLEByte(cast<Constant>(CPV->getOperand(i)), 0, aggBuffer);
2235 if (const ConstantDataSequential *CDS =
2236 dyn_cast<ConstantDataSequential>(CPV)) {
2237 if (CDS->getNumElements())
2238 for (unsigned i = 0; i < CDS->getNumElements(); ++i)
2239 bufferLEByte(cast<Constant>(CDS->getElementAsConstant(i)), 0,
2244 if (isa<ConstantStruct>(CPV)) {
2245 if (CPV->getNumOperands()) {
2246 StructType *ST = cast<StructType>(CPV->getType());
2247 for (unsigned i = 0, e = CPV->getNumOperands(); i != e; ++i) {
2249 Bytes = TD->getStructLayout(ST)->getElementOffset(0) +
2250 TD->getTypeAllocSize(ST) -
2251 TD->getStructLayout(ST)->getElementOffset(i);
2253 Bytes = TD->getStructLayout(ST)->getElementOffset(i + 1) -
2254 TD->getStructLayout(ST)->getElementOffset(i);
2255 bufferLEByte(cast<Constant>(CPV->getOperand(i)), Bytes, aggBuffer);
2260 llvm_unreachable("unsupported constant type in printAggregateConstant()");
2263 // buildTypeNameMap - Run through symbol table looking for type names.
2266 bool NVPTXAsmPrinter::isImageType(const Type *Ty) {
2268 std::map<const Type *, std::string>::iterator PI = TypeNameMap.find(Ty);
2270 if (PI != TypeNameMap.end() && (!PI->second.compare("struct._image1d_t") ||
2271 !PI->second.compare("struct._image2d_t") ||
2272 !PI->second.compare("struct._image3d_t")))
2279 bool NVPTXAsmPrinter::ignoreLoc(const MachineInstr &MI) {
2280 switch (MI.getOpcode()) {
2283 case NVPTX::CallArgBeginInst:
2284 case NVPTX::CallArgEndInst0:
2285 case NVPTX::CallArgEndInst1:
2286 case NVPTX::CallArgF32:
2287 case NVPTX::CallArgF64:
2288 case NVPTX::CallArgI16:
2289 case NVPTX::CallArgI32:
2290 case NVPTX::CallArgI32imm:
2291 case NVPTX::CallArgI64:
2292 case NVPTX::CallArgParam:
2293 case NVPTX::CallVoidInst:
2294 case NVPTX::CallVoidInstReg:
2295 case NVPTX::Callseq_End:
2296 case NVPTX::CallVoidInstReg64:
2297 case NVPTX::DeclareParamInst:
2298 case NVPTX::DeclareRetMemInst:
2299 case NVPTX::DeclareRetRegInst:
2300 case NVPTX::DeclareRetScalarInst:
2301 case NVPTX::DeclareScalarParamInst:
2302 case NVPTX::DeclareScalarRegInst:
2303 case NVPTX::StoreParamF32:
2304 case NVPTX::StoreParamF64:
2305 case NVPTX::StoreParamI16:
2306 case NVPTX::StoreParamI32:
2307 case NVPTX::StoreParamI64:
2308 case NVPTX::StoreParamI8:
2309 case NVPTX::StoreRetvalF32:
2310 case NVPTX::StoreRetvalF64:
2311 case NVPTX::StoreRetvalI16:
2312 case NVPTX::StoreRetvalI32:
2313 case NVPTX::StoreRetvalI64:
2314 case NVPTX::StoreRetvalI8:
2315 case NVPTX::LastCallArgF32:
2316 case NVPTX::LastCallArgF64:
2317 case NVPTX::LastCallArgI16:
2318 case NVPTX::LastCallArgI32:
2319 case NVPTX::LastCallArgI32imm:
2320 case NVPTX::LastCallArgI64:
2321 case NVPTX::LastCallArgParam:
2322 case NVPTX::LoadParamMemF32:
2323 case NVPTX::LoadParamMemF64:
2324 case NVPTX::LoadParamMemI16:
2325 case NVPTX::LoadParamMemI32:
2326 case NVPTX::LoadParamMemI64:
2327 case NVPTX::LoadParamMemI8:
2328 case NVPTX::PrototypeInst:
2329 case NVPTX::DBG_VALUE:
2335 /// PrintAsmOperand - Print out an operand for an inline asm expression.
2337 bool NVPTXAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
2338 unsigned AsmVariant,
2339 const char *ExtraCode, raw_ostream &O) {
2340 if (ExtraCode && ExtraCode[0]) {
2341 if (ExtraCode[1] != 0)
2342 return true; // Unknown modifier.
2344 switch (ExtraCode[0]) {
2346 // See if this is a generic print operand
2347 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O);
2353 printOperand(MI, OpNo, O);
2358 bool NVPTXAsmPrinter::PrintAsmMemoryOperand(
2359 const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant,
2360 const char *ExtraCode, raw_ostream &O) {
2361 if (ExtraCode && ExtraCode[0])
2362 return true; // Unknown modifier
2365 printMemOperand(MI, OpNo, O);
2371 void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
2372 raw_ostream &O, const char *Modifier) {
2373 const MachineOperand &MO = MI->getOperand(opNum);
2374 switch (MO.getType()) {
2375 case MachineOperand::MO_Register:
2376 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
2377 if (MO.getReg() == NVPTX::VRDepot)
2378 O << DEPOTNAME << getFunctionNumber();
2380 O << NVPTXInstPrinter::getRegisterName(MO.getReg());
2382 emitVirtualRegister(MO.getReg(), O);
2386 case MachineOperand::MO_Immediate:
2389 else if (strstr(Modifier, "vec") == Modifier)
2390 printVecModifiedImmediate(MO, Modifier, O);
2393 "Don't know how to handle modifier on immediate operand");
2396 case MachineOperand::MO_FPImmediate:
2397 printFPConstant(MO.getFPImm(), O);
2400 case MachineOperand::MO_GlobalAddress:
2401 O << *getSymbol(MO.getGlobal());
2404 case MachineOperand::MO_MachineBasicBlock:
2405 O << *MO.getMBB()->getSymbol();
2409 llvm_unreachable("Operand type not supported.");
2413 void NVPTXAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
2414 raw_ostream &O, const char *Modifier) {
2415 printOperand(MI, opNum, O);
2417 if (Modifier && !strcmp(Modifier, "add")) {
2419 printOperand(MI, opNum + 1, O);
2421 if (MI->getOperand(opNum + 1).isImm() &&
2422 MI->getOperand(opNum + 1).getImm() == 0)
2423 return; // don't print ',0' or '+0'
2425 printOperand(MI, opNum + 1, O);
2430 // Force static initialization.
2431 extern "C" void LLVMInitializeNVPTXBackendAsmPrinter() {
2432 RegisterAsmPrinter<NVPTXAsmPrinter> X(TheNVPTXTarget32);
2433 RegisterAsmPrinter<NVPTXAsmPrinter> Y(TheNVPTXTarget64);
2436 void NVPTXAsmPrinter::emitSrcInText(StringRef filename, unsigned line) {
2437 std::stringstream temp;
2438 LineReader *reader = this->getReader(filename.str());
2440 temp << filename.str();
2444 temp << reader->readLine(line);
2446 this->OutStreamer.EmitRawText(Twine(temp.str()));
2449 LineReader *NVPTXAsmPrinter::getReader(std::string filename) {
2451 reader = new LineReader(filename);
2454 if (reader->fileName() != filename) {
2456 reader = new LineReader(filename);
2462 std::string LineReader::readLine(unsigned lineNum) {
2463 if (lineNum < theCurLine) {
2465 fstr.seekg(0, std::ios::beg);
2467 while (theCurLine < lineNum) {
2468 fstr.getline(buff, 500);
2474 // Force static initialization.
2475 extern "C" void LLVMInitializeNVPTXAsmPrinter() {
2476 RegisterAsmPrinter<NVPTXAsmPrinter> X(TheNVPTXTarget32);
2477 RegisterAsmPrinter<NVPTXAsmPrinter> Y(TheNVPTXTarget64);