1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the NVPTX implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "NVPTXFrameLowering.h"
16 #include "NVPTXRegisterInfo.h"
17 #include "NVPTXSubtarget.h"
18 #include "NVPTXTargetMachine.h"
19 #include "llvm/ADT/BitVector.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/MC/MachineLocation.h"
25 #include "llvm/Target/TargetInstrInfo.h"
29 NVPTXFrameLowering::NVPTXFrameLowering()
30 : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {}
32 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
34 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF) const {
35 if (MF.getFrameInfo()->hasStackObjects()) {
36 MachineBasicBlock &MBB = MF.front();
37 // Insert "mov.u32 %SP, %Depot"
38 MachineBasicBlock::iterator MBBI = MBB.begin();
39 // This instruction really occurs before first instruction
40 // in the BB, so giving it no debug location.
41 DebugLoc dl = DebugLoc();
43 MachineRegisterInfo &MRI = MF.getRegInfo();
46 // cvta.local %SP, %SPL;
47 if (static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit()) {
48 unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int64RegsRegClass);
50 BuildMI(MBB, MBBI, dl, MF.getSubtarget().getInstrInfo()->get(
51 NVPTX::cvta_local_yes_64),
52 NVPTX::VRFrame).addReg(LocalReg);
54 MF.getSubtarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64),
55 LocalReg).addImm(MF.getFunctionNumber());
57 unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int32RegsRegClass);
59 BuildMI(MBB, MBBI, dl,
60 MF.getSubtarget().getInstrInfo()->get(NVPTX::cvta_local_yes),
61 NVPTX::VRFrame).addReg(LocalReg);
63 MF.getSubtarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR),
64 LocalReg).addImm(MF.getFunctionNumber());
69 void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,
70 MachineBasicBlock &MBB) const {}
72 // This function eliminates ADJCALLSTACKDOWN,
73 // ADJCALLSTACKUP pseudo instructions
74 void NVPTXFrameLowering::eliminateCallFramePseudoInstr(
75 MachineFunction &MF, MachineBasicBlock &MBB,
76 MachineBasicBlock::iterator I) const {
77 // Simply discard ADJCALLSTACKDOWN,
78 // ADJCALLSTACKUP instructions.