1 //===- NVPTXInstrFormats.td - NVPTX Instruction Formats-------*- tblgen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Describe NVPTX instructions format
13 //===----------------------------------------------------------------------===//
15 // Vector instruction type enum
16 class VecInstTypeEnum<bits<4> val> {
19 def VecNOP : VecInstTypeEnum<0>;
21 // Generic NVPTX Format
23 class NVPTXInst<dag outs, dag ins, string asmstr, list<dag> pattern>
27 let Namespace = "NVPTX";
28 dag OutOperandList = outs;
29 dag InOperandList = ins;
30 let AsmString = asmstr;
31 let Pattern = pattern;
34 bits<4> VecInstType = VecNOP.Value;
41 bit IsSurfTexQuery = 0;
42 bit IsTexModeUnified = 0;
44 // The following field is encoded as log2 of the vector size minus one,
45 // with 0 meaning the operation is not a surface instruction. For example,
46 // if IsSuld == 2, then the instruction is a suld instruction with vector size
50 let TSFlags{3-0} = VecInstType;
51 let TSFlags{4-4} = IsSimpleMove;
52 let TSFlags{5-5} = IsLoad;
53 let TSFlags{6-6} = IsStore;
54 let TSFlags{7} = IsTex;
55 let TSFlags{9-8} = IsSuld;
56 let TSFlags{10} = IsSust;
57 let TSFlags{11} = IsSurfTexQuery;
58 let TSFlags{12} = IsTexModeUnified;