1 //===-- NVPTXTargetMachine.cpp - Define TargetMachine for NVPTX -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the NVPTX target.
12 //===----------------------------------------------------------------------===//
14 #include "NVPTXTargetMachine.h"
15 #include "MCTargetDesc/NVPTXMCAsmInfo.h"
17 #include "NVPTXAllocaHoisting.h"
18 #include "NVPTXLowerAggrCopies.h"
19 #include "NVPTXSplitBBatBar.h"
20 #include "llvm/ADT/OwningPtr.h"
21 #include "llvm/Analysis/Passes.h"
22 #include "llvm/Analysis/Verifier.h"
23 #include "llvm/Assembly/PrintModulePass.h"
24 #include "llvm/CodeGen/AsmPrinter.h"
25 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/Passes.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/MC/MCAsmInfo.h"
30 #include "llvm/MC/MCInstrInfo.h"
31 #include "llvm/MC/MCStreamer.h"
32 #include "llvm/MC/MCSubtargetInfo.h"
33 #include "llvm/PassManager.h"
34 #include "llvm/Support/CommandLine.h"
35 #include "llvm/Support/Debug.h"
36 #include "llvm/Support/FormattedStream.h"
37 #include "llvm/Support/TargetRegistry.h"
38 #include "llvm/Support/raw_ostream.h"
39 #include "llvm/Target/TargetInstrInfo.h"
40 #include "llvm/Target/TargetLowering.h"
41 #include "llvm/Target/TargetLoweringObjectFile.h"
42 #include "llvm/Target/TargetMachine.h"
43 #include "llvm/Target/TargetOptions.h"
44 #include "llvm/Target/TargetRegisterInfo.h"
45 #include "llvm/Target/TargetSubtargetInfo.h"
46 #include "llvm/Transforms/Scalar.h"
50 extern "C" void LLVMInitializeNVPTXTarget() {
51 // Register the target.
52 RegisterTargetMachine<NVPTXTargetMachine32> X(TheNVPTXTarget32);
53 RegisterTargetMachine<NVPTXTargetMachine64> Y(TheNVPTXTarget64);
55 RegisterMCAsmInfo<NVPTXMCAsmInfo> A(TheNVPTXTarget32);
56 RegisterMCAsmInfo<NVPTXMCAsmInfo> B(TheNVPTXTarget64);
60 NVPTXTargetMachine::NVPTXTargetMachine(
61 const Target &T, StringRef TT, StringRef CPU, StringRef FS,
62 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
63 CodeGenOpt::Level OL, bool is64bit)
64 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
65 Subtarget(TT, CPU, FS, is64bit), DL(Subtarget.getDataLayout()),
66 InstrInfo(*this), TLInfo(*this), TSInfo(*this),
68 *this, is64bit) /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {}
70 void NVPTXTargetMachine32::anchor() {}
72 NVPTXTargetMachine32::NVPTXTargetMachine32(
73 const Target &T, StringRef TT, StringRef CPU, StringRef FS,
74 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
76 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
78 void NVPTXTargetMachine64::anchor() {}
80 NVPTXTargetMachine64::NVPTXTargetMachine64(
81 const Target &T, StringRef TT, StringRef CPU, StringRef FS,
82 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
84 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
87 class NVPTXPassConfig : public TargetPassConfig {
89 NVPTXPassConfig(NVPTXTargetMachine *TM, PassManagerBase &PM)
90 : TargetPassConfig(TM, PM) {}
92 NVPTXTargetMachine &getNVPTXTargetMachine() const {
93 return getTM<NVPTXTargetMachine>();
96 virtual bool addInstSelector();
97 virtual bool addPreRegAlloc();
101 TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) {
102 NVPTXPassConfig *PassConfig = new NVPTXPassConfig(this, PM);
106 bool NVPTXPassConfig::addInstSelector() {
107 addPass(createLowerAggrCopies());
108 addPass(createSplitBBatBarPass());
109 addPass(createAllocaHoisting());
110 addPass(createNVPTXISelDag(getNVPTXTargetMachine(), getOptLevel()));
114 bool NVPTXPassConfig::addPreRegAlloc() { return false; }