1 //===-- PIC16ISelDAGToDAG.cpp - A dag to dag inst selector for PIC16 ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the PIC16 target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "pic16-isel"
17 #include "PIC16ISelLowering.h"
18 #include "PIC16RegisterInfo.h"
19 #include "PIC16Subtarget.h"
20 #include "PIC16TargetMachine.h"
21 #include "llvm/GlobalValue.h"
22 #include "llvm/Instructions.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/Type.h"
25 #include "llvm/CodeGen/MachineConstantPool.h"
26 #include "llvm/CodeGen/MachineFunction.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/SelectionDAGISel.h"
30 #include "llvm/CodeGen/SelectionDAGNodes.h"
31 #include "llvm/Support/CFG.h"
32 #include "llvm/Support/Compiler.h"
33 #include "llvm/Support/Debug.h"
34 #include "llvm/Target/TargetMachine.h"
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
44 //===----------------------------------------------------------------------===//
45 // PIC16DAGToDAGISel - PIC16 specific code to select PIC16 machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
50 class VISIBILITY_HIDDEN PIC16DAGToDAGISel : public SelectionDAGISel {
52 /// TM - Keep a reference to PIC16TargetMachine.
53 PIC16TargetMachine &TM;
55 /// PIC16Lowering - This object fully describes how to lower LLVM code to an
56 /// PIC16-specific SelectionDAG.
57 PIC16TargetLowering PIC16Lowering;
59 /// Subtarget - Keep a pointer to the PIC16Subtarget around so that we can
60 /// make the right decision when generating code for different targets.
61 //TODO: add initialization on constructor
62 //const PIC16Subtarget *Subtarget;
65 PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
66 SelectionDAGISel(PIC16Lowering),
67 TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
69 virtual void InstructionSelectBasicBlock(SelectionDAG &SD);
72 virtual const char *getPassName() const {
73 return "PIC16 DAG->DAG Pattern Instruction Selection";
77 // Include the pieces autogenerated from the target description.
78 #include "PIC16GenDAGISel.inc"
80 SDNode *Select(SDOperand N);
82 // Select addressing mode. currently assume base + offset addr mode.
83 bool SelectAM(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset);
84 bool SelectDirectAM(SDOperand Op, SDOperand N, SDOperand &Base,
86 bool StoreInDirectAM(SDOperand Op, SDOperand N, SDOperand &fsr);
87 bool LoadFSR(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset);
88 bool LoadNothing(SDOperand Op, SDOperand N, SDOperand &Base,
91 // getI8Imm - Return a target constant with the specified
93 inline SDOperand getI8Imm(unsigned Imm) {
94 return CurDAG->getTargetConstant(Imm, MVT::i8);
105 /// InstructionSelectBasicBlock - This callback is invoked by
106 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
107 void PIC16DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &SD)
110 // Codegen the basic block.
112 DOUT << "===== Instruction selection begins:\n";
116 // Select target instructions for the DAG.
117 SD.setRoot(SelectRoot(SD.getRoot()));
120 DOUT << "===== Instruction selection ends:\n";
123 SD.RemoveDeadNodes();
125 // Emit machine code to BB.
126 ScheduleAndEmitDAG(SD);
130 bool PIC16DAGToDAGISel::
131 SelectDirectAM (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
133 GlobalAddressSDNode *GA;
136 // if Address is FI, get the TargetFrameIndex.
137 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(N)) {
138 cout << "--------- its frame Index\n";
139 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
140 Offset = CurDAG->getTargetConstant(0, MVT::i32);
144 if (N.getOpcode() == ISD::GlobalAddress) {
145 GA = dyn_cast<GlobalAddressSDNode>(N);
146 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
147 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
152 if (N.getOpcode() == ISD::ADD) {
153 GC = dyn_cast<ConstantSDNode>(N.getOperand(1));
154 Offset = CurDAG->getTargetConstant((unsigned char)GC->getValue(), MVT::i8);
155 if ((GA = dyn_cast<GlobalAddressSDNode>(N.getOperand(0)))) {
156 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
160 else if (FrameIndexSDNode *FIN
161 = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
162 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
171 //FIXME: must also account for preinc/predec/postinc/postdec
172 bool PIC16DAGToDAGISel::
173 StoreInDirectAM (SDOperand Op, SDOperand N, SDOperand &fsr)
176 if (N.getOpcode() == ISD::LOAD) {
177 LoadSDNode *LD = dyn_cast<LoadSDNode>(N);
179 fsr = LD->getBasePtr();
181 else if (isa<RegisterSDNode>(N.Val)) {
182 //FIXME an attempt to retrieve the register number
184 cout << "this is a register\n";
185 Reg = dyn_cast<RegisterSDNode>(N.Val);
186 fsr = CurDAG->getRegister(Reg->getReg(),MVT::i16);
189 cout << "this is not a register\n";
190 // FIXME must use whatever load is using
191 fsr = CurDAG->getRegister(1,MVT::i16);
198 bool PIC16DAGToDAGISel::
199 LoadFSR (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
201 GlobalAddressSDNode *GA;
203 if (N.getOpcode() == ISD::GlobalAddress) {
204 GA = dyn_cast<GlobalAddressSDNode>(N);
205 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
206 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
210 else if (N.getOpcode() == PIC16ISD::Package) {
211 CurDAG->setGraphColor(Op.Val, "blue");
218 //don't thake this seriously, it will change
219 bool PIC16DAGToDAGISel::
220 LoadNothing (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
222 GlobalAddressSDNode *GA;
223 if (N.getOpcode() == ISD::GlobalAddress) {
224 GA = dyn_cast<GlobalAddressSDNode>(N);
225 cout << "==========" << GA->getOffset() << "\n";
226 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
227 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
236 /// Select instructions not customized! Used for
237 /// expanded, promoted and normal instructions
238 SDNode* PIC16DAGToDAGISel::Select(SDOperand N)
240 SDNode *Node = N.Val;
241 unsigned Opcode = Node->getOpcode();
243 // Dump information about the Node being selected
245 DOUT << std::string(Indent, ' ') << "Selecting: ";
246 DEBUG(Node->dump(CurDAG));
251 // If we have a custom node, we already have selected!
252 if (Opcode >= ISD::BUILTIN_OP_END && Opcode < PIC16ISD::FIRST_NUMBER) {
254 DOUT << std::string(Indent-2, ' ') << "== ";
255 DEBUG(Node->dump(CurDAG));
263 // Instruction Selection not handled by custom or by the
264 // auto-generated tablegen selection should be handled here.
270 // Select the default instruction.
271 SDNode *ResNode = SelectCode(N);
274 DOUT << std::string(Indent-2, ' ') << "=> ";
275 if (ResNode == NULL || ResNode == N.Val)
276 DEBUG(N.Val->dump(CurDAG));
278 DEBUG(ResNode->dump(CurDAG));
286 /// createPIC16ISelDag - This pass converts a legalized DAG into a
287 /// PIC16-specific DAG, ready for instruction scheduling.
288 FunctionPass *llvm::createPIC16ISelDag(PIC16TargetMachine &TM) {
289 return new PIC16DAGToDAGISel(TM);