1 //===-- PIC16ISelDAGToDAG.cpp - A dag to dag inst selector for PIC16 ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the PIC16 target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "pic16-isel"
17 #include "PIC16ISelLowering.h"
18 #include "PIC16RegisterInfo.h"
19 #include "PIC16Subtarget.h"
20 #include "PIC16TargetMachine.h"
21 #include "llvm/GlobalValue.h"
22 #include "llvm/Instructions.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/Type.h"
25 #include "llvm/CodeGen/MachineConstantPool.h"
26 #include "llvm/CodeGen/MachineFunction.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/SelectionDAGISel.h"
30 #include "llvm/CodeGen/SelectionDAGNodes.h"
31 #include "llvm/Support/CFG.h"
32 #include "llvm/Support/Compiler.h"
33 #include "llvm/Support/Debug.h"
34 #include "llvm/Target/TargetMachine.h"
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
44 //===----------------------------------------------------------------------===//
45 // PIC16DAGToDAGISel - PIC16 specific code to select PIC16 machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
50 class VISIBILITY_HIDDEN PIC16DAGToDAGISel : public SelectionDAGISel {
52 /// TM - Keep a reference to PIC16TargetMachine.
53 PIC16TargetMachine &TM;
55 /// PIC16Lowering - This object fully describes how to lower LLVM code to an
56 /// PIC16-specific SelectionDAG.
57 PIC16TargetLowering PIC16Lowering;
60 PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
61 SelectionDAGISel(PIC16Lowering),
62 TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
64 virtual void InstructionSelectBasicBlock(SelectionDAG &SD);
67 virtual const char *getPassName() const {
68 return "PIC16 DAG->DAG Pattern Instruction Selection";
72 // Include the pieces autogenerated from the target description.
73 #include "PIC16GenDAGISel.inc"
75 SDNode *Select(SDOperand N);
77 // Select addressing mode. currently assume base + offset addr mode.
78 bool SelectAM(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset);
79 bool SelectDirectAM(SDOperand Op, SDOperand N, SDOperand &Base,
81 bool StoreInDirectAM(SDOperand Op, SDOperand N, SDOperand &fsr);
82 bool LoadFSR(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset);
83 bool LoadNothing(SDOperand Op, SDOperand N, SDOperand &Base,
86 // getI8Imm - Return a target constant with the specified
88 inline SDOperand getI8Imm(unsigned Imm) {
89 return CurDAG->getTargetConstant(Imm, MVT::i8);
100 /// InstructionSelectBasicBlock - This callback is invoked by
101 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
102 void PIC16DAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &SD)
105 // Codegen the basic block.
107 DOUT << "===== Instruction selection begins:\n";
112 // Select target instructions for the DAG.
113 SD.setRoot(SelectRoot(SD.getRoot()));
115 DOUT << "===== Instruction selection ends:\n";
117 SD.RemoveDeadNodes();
119 // Emit machine code to BB.
120 ScheduleAndEmitDAG(SD);
124 bool PIC16DAGToDAGISel::
125 SelectDirectAM (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
127 GlobalAddressSDNode *GA;
130 // if Address is FI, get the TargetFrameIndex.
131 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(N)) {
132 DOUT << "--------- its frame Index\n";
133 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
134 Offset = CurDAG->getTargetConstant(0, MVT::i32);
138 if (N.getOpcode() == ISD::GlobalAddress) {
139 GA = dyn_cast<GlobalAddressSDNode>(N);
140 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
141 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
146 if (N.getOpcode() == ISD::ADD) {
147 GC = dyn_cast<ConstantSDNode>(N.getOperand(1));
148 Offset = CurDAG->getTargetConstant((unsigned char)GC->getValue(), MVT::i8);
149 if ((GA = dyn_cast<GlobalAddressSDNode>(N.getOperand(0)))) {
150 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
154 else if (FrameIndexSDNode *FIN
155 = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
156 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
165 // FIXME: must also account for preinc/predec/postinc/postdec.
166 bool PIC16DAGToDAGISel::
167 StoreInDirectAM (SDOperand Op, SDOperand N, SDOperand &fsr)
170 if (N.getOpcode() == ISD::LOAD) {
171 LoadSDNode *LD = dyn_cast<LoadSDNode>(N);
173 fsr = LD->getBasePtr();
175 else if (isa<RegisterSDNode>(N.Val)) {
176 //FIXME an attempt to retrieve the register number
178 DOUT << "this is a register\n";
179 Reg = dyn_cast<RegisterSDNode>(N.Val);
180 fsr = CurDAG->getRegister(Reg->getReg(),MVT::i16);
183 DOUT << "this is not a register\n";
184 // FIXME must use whatever load is using
185 fsr = CurDAG->getRegister(1,MVT::i16);
192 bool PIC16DAGToDAGISel::
193 LoadFSR (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
195 GlobalAddressSDNode *GA;
197 if (N.getOpcode() == ISD::GlobalAddress) {
198 GA = dyn_cast<GlobalAddressSDNode>(N);
199 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
200 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
204 else if (N.getOpcode() == PIC16ISD::Package) {
205 CurDAG->setGraphColor(Op.Val, "blue");
212 // LoadNothing - Don't thake this seriously, it will change.
213 bool PIC16DAGToDAGISel::
214 LoadNothing (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
216 GlobalAddressSDNode *GA;
217 if (N.getOpcode() == ISD::GlobalAddress) {
218 GA = dyn_cast<GlobalAddressSDNode>(N);
219 DOUT << "==========" << GA->getOffset() << "\n";
220 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
221 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
230 /// Select - Select instructions not customized! Used for
231 /// expanded, promoted and normal instructions.
232 SDNode* PIC16DAGToDAGISel::Select(SDOperand N)
234 SDNode *Node = N.Val;
235 unsigned Opcode = Node->getOpcode();
237 // Dump information about the Node being selected
239 DOUT << std::string(Indent, ' ') << "Selecting: ";
240 DEBUG(Node->dump(CurDAG));
245 // If we have a custom node, we already have selected!
246 if (Opcode >= ISD::BUILTIN_OP_END && Opcode < PIC16ISD::FIRST_NUMBER) {
248 DOUT << std::string(Indent-2, ' ') << "== ";
249 DEBUG(Node->dump(CurDAG));
257 // FIXME: Instruction Selection not handled by custom or by the
258 // auto-generated tablegen selection should be handled here.
264 // Select the default instruction.
265 SDNode *ResNode = SelectCode(N);
268 DOUT << std::string(Indent-2, ' ') << "=> ";
269 if (ResNode == NULL || ResNode == N.Val)
270 DEBUG(N.Val->dump(CurDAG));
272 DEBUG(ResNode->dump(CurDAG));
280 /// createPIC16ISelDag - This pass converts a legalized DAG into a
281 /// PIC16-specific DAG, ready for instruction scheduling.
282 FunctionPass *llvm::createPIC16ISelDag(PIC16TargetMachine &TM) {
283 return new PIC16DAGToDAGISel(TM);