2 // The LLVM Compiler Infrastructure
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
7 //===----------------------------------------------------------------------===//
9 // This file defines the interfaces that PIC16 uses to lower LLVM code into a
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "pic16-lower"
16 #include "PIC16ISelLowering.h"
17 #include "PIC16TargetMachine.h"
18 #include "llvm/DerivedTypes.h"
19 #include "llvm/GlobalValue.h"
20 #include "llvm/Function.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
32 // PIC16TargetLowering Constructor.
33 PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
34 : TargetLowering(TM) {
36 Subtarget = &TM.getSubtarget<PIC16Subtarget>();
38 addRegisterClass(MVT::i8, PIC16::GPRRegisterClass);
40 setShiftAmountType(MVT::i8);
41 setShiftAmountFlavor(Extend);
43 // SRA library call names
44 setPIC16LibcallName(PIC16ISD::SRA_I8, "__intrinsics.sra.i8");
45 setLibcallName(RTLIB::SRA_I16, "__intrinsics.sra.i16");
46 setLibcallName(RTLIB::SRA_I32, "__intrinsics.sra.i32");
48 // SHL library call names
49 setPIC16LibcallName(PIC16ISD::SLL_I8, "__intrinsics.sll.i8");
50 setLibcallName(RTLIB::SHL_I16, "__intrinsics.sll.i16");
51 setLibcallName(RTLIB::SHL_I32, "__intrinsics.sll.i32");
53 // SRL library call names
54 setPIC16LibcallName(PIC16ISD::SRL_I8, "__intrinsics.srl.i8");
55 setLibcallName(RTLIB::SRL_I16, "__intrinsics.srl.i16");
56 setLibcallName(RTLIB::SRL_I32, "__intrinsics.srl.i32");
58 // MUL Library call names
59 setPIC16LibcallName(PIC16ISD::MUL_I8, "__intrinsics.mul.i8");
60 setLibcallName(RTLIB::MUL_I16, "__intrinsics.mul.i16");
61 setLibcallName(RTLIB::MUL_I32, "__intrinsics.mul.i32");
63 setOperationAction(ISD::GlobalAddress, MVT::i16, Custom);
64 setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom);
66 setOperationAction(ISD::LOAD, MVT::i8, Legal);
67 setOperationAction(ISD::LOAD, MVT::i16, Custom);
68 setOperationAction(ISD::LOAD, MVT::i32, Custom);
70 setOperationAction(ISD::STORE, MVT::i8, Legal);
71 setOperationAction(ISD::STORE, MVT::i16, Custom);
72 setOperationAction(ISD::STORE, MVT::i32, Custom);
74 setOperationAction(ISD::ADDE, MVT::i8, Custom);
75 setOperationAction(ISD::ADDC, MVT::i8, Custom);
76 setOperationAction(ISD::SUBE, MVT::i8, Custom);
77 setOperationAction(ISD::SUBC, MVT::i8, Custom);
78 setOperationAction(ISD::ADD, MVT::i8, Custom);
79 setOperationAction(ISD::ADD, MVT::i16, Custom);
81 setOperationAction(ISD::OR, MVT::i8, Custom);
82 setOperationAction(ISD::AND, MVT::i8, Custom);
83 setOperationAction(ISD::XOR, MVT::i8, Custom);
85 setOperationAction(ISD::FrameIndex, MVT::i16, Custom);
86 setOperationAction(ISD::CALL, MVT::i16, Custom);
87 setOperationAction(ISD::RET, MVT::Other, Custom);
89 setOperationAction(ISD::MUL, MVT::i8, Custom);
90 setOperationAction(ISD::MUL, MVT::i16, Expand);
91 setOperationAction(ISD::MUL, MVT::i32, Expand);
93 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand);
94 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand);
95 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
96 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand);
97 setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand);
98 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
99 setOperationAction(ISD::MULHU, MVT::i8, Expand);
100 setOperationAction(ISD::MULHU, MVT::i16, Expand);
101 setOperationAction(ISD::MULHU, MVT::i32, Expand);
102 setOperationAction(ISD::MULHS, MVT::i8, Expand);
103 setOperationAction(ISD::MULHS, MVT::i16, Expand);
104 setOperationAction(ISD::MULHS, MVT::i32, Expand);
106 setOperationAction(ISD::SRA, MVT::i8, Custom);
107 setOperationAction(ISD::SRA, MVT::i16, Expand);
108 setOperationAction(ISD::SRA, MVT::i32, Expand);
109 setOperationAction(ISD::SHL, MVT::i8, Custom);
110 setOperationAction(ISD::SHL, MVT::i16, Expand);
111 setOperationAction(ISD::SHL, MVT::i32, Expand);
112 setOperationAction(ISD::SRL, MVT::i8, Custom);
113 setOperationAction(ISD::SRL, MVT::i16, Expand);
114 setOperationAction(ISD::SRL, MVT::i32, Expand);
116 // PIC16 does not support shift parts
117 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand);
118 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand);
119 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
120 setOperationAction(ISD::SHL_PARTS, MVT::i8, Expand);
121 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand);
122 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
123 setOperationAction(ISD::SRL_PARTS, MVT::i8, Expand);
124 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand);
125 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
128 // PIC16 does not have a SETCC, expand it to SELECT_CC.
129 setOperationAction(ISD::SETCC, MVT::i8, Expand);
130 setOperationAction(ISD::SELECT, MVT::i8, Expand);
131 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
132 setOperationAction(ISD::BRIND, MVT::Other, Expand);
134 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
135 setOperationAction(ISD::BR_CC, MVT::i8, Custom);
137 //setOperationAction(ISD::TRUNCATE, MVT::i16, Custom);
138 setTruncStoreAction(MVT::i16, MVT::i8, Custom);
140 // Now deduce the information based on the above mentioned
142 computeRegisterProperties();
145 static void PopulateResults(SDValue N, SmallVectorImpl<SDValue>&Results) {
146 if (N.getOpcode() == ISD::MERGE_VALUES) {
147 int NumResults = N.getNumOperands();
148 for( int i = 0; i < NumResults; i++)
149 Results.push_back(N.getOperand(i));
152 Results.push_back(N);
155 MVT PIC16TargetLowering::getSetCCResultType(MVT ValType) const {
161 PIC16TargetLowering::setPIC16LibcallName(PIC16ISD::PIC16Libcall Call,
163 PIC16LibcallNames[Call] = Name;
167 PIC16TargetLowering::getPIC16LibcallName(PIC16ISD::PIC16Libcall Call) {
168 return PIC16LibcallNames[Call];
172 PIC16TargetLowering::MakePIC16Libcall(PIC16ISD::PIC16Libcall Call,
173 MVT RetVT, const SDValue *Ops,
174 unsigned NumOps, bool isSigned,
175 SelectionDAG &DAG, DebugLoc dl) {
177 TargetLowering::ArgListTy Args;
178 Args.reserve(NumOps);
180 TargetLowering::ArgListEntry Entry;
181 for (unsigned i = 0; i != NumOps; ++i) {
183 Entry.Ty = Entry.Node.getValueType().getTypeForMVT();
184 Entry.isSExt = isSigned;
185 Entry.isZExt = !isSigned;
186 Args.push_back(Entry);
188 SDValue Callee = DAG.getExternalSymbol(getPIC16LibcallName(Call), MVT::i8);
190 const Type *RetTy = RetVT.getTypeForMVT();
191 std::pair<SDValue,SDValue> CallInfo =
192 LowerCallTo(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false,
193 false, CallingConv::C, false, Callee, Args, DAG, dl);
195 return CallInfo.first;
199 PIC16TargetLowering::getCurrentFrame(SelectionDAG &DAG) {
200 MachineFunction &MF = DAG.getMachineFunction();
201 const Function *Func = MF.getFunction();
202 const std::string FuncName = Func->getName();
204 // this is causing memory waste
205 // because for every call new memory will be allocated
206 char *tmpName = new char [strlen(FuncName.c_str()) + 6];
207 sprintf(tmpName, "%s.tmp", FuncName.c_str());
209 // if the external symbol of the same name already exists then
210 // it will not create the new one.
211 return DAG.getTargetExternalSymbol(tmpName, MVT::i8);
215 PIC16TargetLowering::getCurrentFrameIndex(SelectionDAG &DAG, SDValue &ES,
216 unsigned SlotSize, int &FromFI) {
217 MachineFunction &MF = DAG.getMachineFunction();
218 const Function *Func = MF.getFunction();
219 const std::string FuncName = Func->getName();
221 // this is causing memory waste
222 // because for every call new memory will be allocated
223 char *tmpName = new char [strlen(FuncName.c_str()) + 6];
224 sprintf(tmpName, "%s.tmp", FuncName.c_str());
226 // if the external symbol of the same name already exists then
227 // it will not create the new one.
228 ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
230 // Alignment is always 1
231 //FromFI = MF.getFrameInfo()->CreateStackObject(SlotSize, 1);
232 FromFI = MF.getFrameInfo()->CreateStackObject(1, 1);
234 for(unsigned i=1;i<SlotSize; ++i) {
235 FI = MF.getFrameInfo()->CreateStackObject(1, 1);
239 const char *PIC16TargetLowering::getTargetNodeName(unsigned Opcode) const {
241 default: return NULL;
242 case PIC16ISD::Lo: return "PIC16ISD::Lo";
243 case PIC16ISD::Hi: return "PIC16ISD::Hi";
244 case PIC16ISD::MTLO: return "PIC16ISD::MTLO";
245 case PIC16ISD::MTHI: return "PIC16ISD::MTHI";
246 case PIC16ISD::Banksel: return "PIC16ISD::Banksel";
247 case PIC16ISD::PIC16Load: return "PIC16ISD::PIC16Load";
248 case PIC16ISD::PIC16LdWF: return "PIC16ISD::PIC16LdWF";
249 case PIC16ISD::PIC16Store: return "PIC16ISD::PIC16Store";
250 case PIC16ISD::PIC16StWF: return "PIC16ISD::PIC16StWF";
251 case PIC16ISD::BCF: return "PIC16ISD::BCF";
252 case PIC16ISD::LSLF: return "PIC16ISD::LSLF";
253 case PIC16ISD::LRLF: return "PIC16ISD::LRLF";
254 case PIC16ISD::RLF: return "PIC16ISD::RLF";
255 case PIC16ISD::RRF: return "PIC16ISD::RRF";
256 case PIC16ISD::CALL: return "PIC16ISD::CALL";
257 case PIC16ISD::SUBCC: return "PIC16ISD::SUBCC";
258 case PIC16ISD::SELECT_ICC: return "PIC16ISD::SELECT_ICC";
259 case PIC16ISD::BRCOND: return "PIC16ISD::BRCOND";
260 case PIC16ISD::Dummy: return "PIC16ISD::Dummy";
264 void PIC16TargetLowering::ReplaceNodeResults(SDNode *N,
265 SmallVectorImpl<SDValue>&Results,
268 switch (N->getOpcode()) {
269 case ISD::GlobalAddress:
270 Results.push_back(ExpandGlobalAddress(N, DAG));
272 case ISD::ExternalSymbol:
273 Results.push_back(ExpandExternalSymbol(N, DAG));
276 Results.push_back(ExpandStore(N, DAG));
279 PopulateResults(ExpandLoad(N, DAG), Results);
282 // Results.push_back(ExpandAdd(N, DAG));
284 case ISD::FrameIndex:
285 Results.push_back(ExpandFrameIndex(N, DAG));
288 assert (0 && "not implemented");
293 SDValue PIC16TargetLowering::ExpandFrameIndex(SDNode *N, SelectionDAG &DAG) {
295 // Currently handling FrameIndex of size MVT::i16 only
296 // One example of this scenario is when return value is written on
299 if (N->getValueType(0) != MVT::i16)
302 // Expand the FrameIndex into ExternalSymbol and a Constant node
303 // The constant will represent the frame index number
304 // Get the current function frame
305 MachineFunction &MF = DAG.getMachineFunction();
306 const Function *Func = MF.getFunction();
307 const std::string Name = Func->getName();
309 FrameIndexSDNode *FR = dyn_cast<FrameIndexSDNode>(SDValue(N,0));
310 int Index = FR->getIndex();
313 FI[0] = DAG.getTargetFrameIndex(Index, MVT::i8);
314 FI[1] = DAG.getTargetFrameIndex(Index + 1, MVT::i8);
315 return DAG.getNode(ISD::BUILD_PAIR, N->getValueType(0), FI[0], FI[1]);
319 SDValue PIC16TargetLowering::ExpandStore(SDNode *N, SelectionDAG &DAG) {
320 StoreSDNode *St = cast<StoreSDNode>(N);
321 SDValue Chain = St->getChain();
322 SDValue Src = St->getValue();
323 SDValue Ptr = St->getBasePtr();
324 MVT ValueType = Src.getValueType();
325 unsigned StoreOffset = 0;
327 SDValue PtrLo, PtrHi;
328 LegalizeAddress(Ptr, DAG, PtrLo, PtrHi, StoreOffset);
330 if (ValueType == MVT::i8) {
331 return DAG.getNode (PIC16ISD::PIC16Store, MVT::Other, Chain, Src,
333 DAG.getConstant (0 + StoreOffset, MVT::i8));
335 else if (ValueType == MVT::i16) {
336 // Get the Lo and Hi parts from MERGE_VALUE or BUILD_PAIR.
337 SDValue SrcLo, SrcHi;
338 GetExpandedParts(Src, DAG, SrcLo, SrcHi);
339 SDValue ChainLo = Chain, ChainHi = Chain;
340 if (Chain.getOpcode() == ISD::TokenFactor) {
341 ChainLo = Chain.getOperand(0);
342 ChainHi = Chain.getOperand(1);
344 SDValue Store1 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other,
347 DAG.getConstant (0 + StoreOffset, MVT::i8));
349 SDValue Store2 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other, ChainHi,
351 DAG.getConstant (1 + StoreOffset, MVT::i8));
353 return DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(Store1),
356 else if (ValueType == MVT::i32) {
357 // Get the Lo and Hi parts from MERGE_VALUE or BUILD_PAIR.
358 SDValue SrcLo, SrcHi;
359 GetExpandedParts(Src, DAG, SrcLo, SrcHi);
361 // Get the expanded parts of each of SrcLo and SrcHi.
362 SDValue SrcLo1, SrcLo2, SrcHi1, SrcHi2;
363 GetExpandedParts(SrcLo, DAG, SrcLo1, SrcLo2);
364 GetExpandedParts(SrcHi, DAG, SrcHi1, SrcHi2);
366 SDValue ChainLo = Chain, ChainHi = Chain;
367 if (Chain.getOpcode() == ISD::TokenFactor) {
368 ChainLo = Chain.getOperand(0);
369 ChainHi = Chain.getOperand(1);
371 SDValue ChainLo1 = ChainLo, ChainLo2 = ChainLo, ChainHi1 = ChainHi,
373 if (ChainLo.getOpcode() == ISD::TokenFactor) {
374 ChainLo1 = ChainLo.getOperand(0);
375 ChainLo2 = ChainLo.getOperand(1);
377 if (ChainHi.getOpcode() == ISD::TokenFactor) {
378 ChainHi1 = ChainHi.getOperand(0);
379 ChainHi2 = ChainHi.getOperand(1);
381 SDValue Store1 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other,
383 SrcLo1, PtrLo, PtrHi,
384 DAG.getConstant (0 + StoreOffset, MVT::i8));
386 SDValue Store2 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other, ChainLo2,
387 SrcLo2, PtrLo, PtrHi,
388 DAG.getConstant (1 + StoreOffset, MVT::i8));
390 SDValue Store3 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other, ChainHi1,
391 SrcHi1, PtrLo, PtrHi,
392 DAG.getConstant (2 + StoreOffset, MVT::i8));
394 SDValue Store4 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other, ChainHi2,
395 SrcHi2, PtrLo, PtrHi,
396 DAG.getConstant (3 + StoreOffset, MVT::i8));
398 SDValue RetLo = DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(Store1),
400 SDValue RetHi = DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(Store3),
402 return DAG.getNode(ISD::TokenFactor, MVT::Other, RetLo, RetHi);
406 assert (0 && "value type not supported");
411 SDValue PIC16TargetLowering::ExpandExternalSymbol(SDNode *N, SelectionDAG &DAG)
413 ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(SDValue(N, 0));
415 SDValue TES = DAG.getTargetExternalSymbol(ES->getSymbol(), MVT::i8);
417 SDValue Lo = DAG.getNode(PIC16ISD::Lo, MVT::i8, TES);
418 SDValue Hi = DAG.getNode(PIC16ISD::Hi, MVT::i8, TES);
420 return DAG.getNode(ISD::BUILD_PAIR, MVT::i16, Lo, Hi);
423 // ExpandGlobalAddress -
424 SDValue PIC16TargetLowering::ExpandGlobalAddress(SDNode *N, SelectionDAG &DAG) {
425 GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(SDValue(N, 0));
427 SDValue TGA = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i8,
430 SDValue Lo = DAG.getNode(PIC16ISD::Lo, MVT::i8, TGA);
431 SDValue Hi = DAG.getNode(PIC16ISD::Hi, MVT::i8, TGA);
433 return DAG.getNode(ISD::BUILD_PAIR, MVT::i16, Lo, Hi);
436 bool PIC16TargetLowering::isDirectAddress(const SDValue &Op) {
437 assert (Op.getNode() != NULL && "Can't operate on NULL SDNode!!");
439 if (Op.getOpcode() == ISD::BUILD_PAIR) {
440 if (Op.getOperand(0).getOpcode() == PIC16ISD::Lo)
446 // Return true if DirectAddress is in ROM_SPACE
447 bool PIC16TargetLowering::isRomAddress(const SDValue &Op) {
449 // RomAddress is a GlobalAddress in ROM_SPACE_
450 // If the Op is not a GlobalAddress return NULL without checking
452 if (!isDirectAddress(Op))
455 // Its a GlobalAddress.
456 // It is BUILD_PAIR((PIC16Lo TGA), (PIC16Hi TGA)) and Op is BUILD_PAIR
457 SDValue TGA = Op.getOperand(0).getOperand(0);
458 GlobalAddressSDNode *GSDN = dyn_cast<GlobalAddressSDNode>(TGA);
459 const Type *ValueType = GSDN->getGlobal()->getType();
461 if (!isa<PointerType>(ValueType)) {
462 assert(0 && "TGA must be of a PointerType");
465 int AddrSpace = dyn_cast<PointerType>(ValueType)->getAddressSpace();
466 if (AddrSpace == PIC16ISD::ROM_SPACE)
469 // Any other address space return it false
473 // Extract the out flag
474 SDValue PIC16TargetLowering::getOutFlag(SDValue &Op) {
475 SDValue Flag = Op.getValue(Op.getNode()->getNumValues() - 1);
477 assert (Flag.getValueType() == MVT::Flag && "Node does not have an out Flag");
482 // To extract chain value from the SDValue Nodes
483 // This function will help to maintain the chain extracting
484 // code at one place. In case of any change in future it will
485 // help maintain the code.
486 SDValue PIC16TargetLowering::getChain(SDValue &Op) {
487 SDValue Chain = Op.getValue(Op.getNode()->getNumValues() - 1);
489 // If the last value returned in Flag then the chain is
490 // second last value returned.
491 if (Chain.getValueType() == MVT::Flag)
492 Chain = Op.getValue(Op.getNode()->getNumValues() - 2);
494 // All nodes may not produce a chain. Therefore following assert
495 // verifies that the node is returning a chain only.
496 assert (Chain.getValueType() == MVT::Other && "Node does not have a chain");
501 void PIC16TargetLowering::GetExpandedParts(SDValue Op, SelectionDAG &DAG,
503 SDValue &Lo, SDValue &Hi) {
504 SDNode *N = Op.getNode();
506 std::vector<SDValue> Opers;
507 NewVT = getTypeToTransformTo(N->getValueType(0));
509 // extract the lo component
511 Opers.push_back(DAG.getConstant(0,MVT::i8));
512 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT,NewVT,&Opers[0],Opers.size());
513 // extract the hi component
516 Opers.push_back(DAG.getConstant(1,MVT::i8));
517 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT,NewVT,&Opers[0],Opers.size());
520 // Legalize FrameIndex into ExternalSymbol and offset.
522 PIC16TargetLowering::LegalizeFrameIndex(SDValue Op, SelectionDAG &DAG,
523 SDValue &ES, int &Offset) {
525 MachineFunction &MF = DAG.getMachineFunction();
526 const Function *Func = MF.getFunction();
527 const std::string Name = Func->getName();
529 char *tmpName = new char [strlen(Name.c_str()) + 8];
530 sprintf(tmpName, "%s.args", Name.c_str());
531 ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
532 FrameIndexSDNode *FR = dyn_cast<FrameIndexSDNode>(Op);
533 Offset = FR->getIndex();
538 // This function legalizes the PIC16 Addresses. If the Pointer is
539 // -- Direct address variable residing
540 // --> then a Banksel for that variable will be created.
542 // --> then it will be treated as an indirect address.
543 // -- Indirect address
544 // --> then the address will be loaded into FSR
545 // -- ADD with constant operand
546 // --> then constant operand of ADD will be returned as Offset
547 // and non-constant operand of ADD will be treated as pointer.
548 // Returns the high and lo part of the address, and the offset(in case of ADD).
550 void PIC16TargetLowering:: LegalizeAddress(SDValue Ptr, SelectionDAG &DAG,
551 SDValue &Lo, SDValue &Hi,
554 // Offset, by default, should be 0
557 // If the pointer is ADD with constant,
558 // return the constant value as the offset
559 if (Ptr.getOpcode() == ISD::ADD) {
560 SDValue OperLeft = Ptr.getOperand(0);
561 SDValue OperRight = Ptr.getOperand(1);
562 if (OperLeft.getOpcode() == ISD::Constant) {
563 Offset = dyn_cast<ConstantSDNode>(OperLeft)->getZExtValue();
565 } else if (OperRight.getOpcode() == ISD::Constant) {
566 Offset = dyn_cast<ConstantSDNode>(OperRight)->getZExtValue();
571 // If the pointer is Type i8 and an external symbol
572 // then treat it as direct address.
573 // One example for such case is storing and loading
574 // from function frame during a call
575 if (Ptr.getValueType() == MVT::i8) {
576 switch (Ptr.getOpcode()) {
577 case ISD::TargetExternalSymbol:
579 Hi = DAG.getConstant(1, MVT::i8);
584 if (Ptr.getOpcode() == ISD::BUILD_PAIR &&
585 Ptr.getOperand(0).getOpcode() == ISD::TargetFrameIndex) {
588 LegalizeFrameIndex(Ptr.getOperand(0), DAG, Lo, FrameOffset);
589 Hi = DAG.getConstant(1, MVT::i8);
590 Offset += FrameOffset;
594 if (isDirectAddress(Ptr) && !isRomAddress(Ptr)) {
595 // Direct addressing case for RAM variables. The Hi part is constant
596 // and the Lo part is the TGA itself.
597 Lo = Ptr.getOperand(0).getOperand(0);
599 // For direct addresses Hi is a constant. Value 1 for the constant
600 // signifies that banksel needs to generated for it. Value 0 for
601 // the constant signifies that banksel does not need to be generated
602 // for it. Mark it as 1 now and optimize later.
603 Hi = DAG.getConstant(1, MVT::i8);
607 // Indirect addresses. Get the hi and lo parts of ptr.
608 GetExpandedParts(Ptr, DAG, Lo, Hi);
610 // Put the hi and lo parts into FSR.
611 Lo = DAG.getNode(PIC16ISD::MTLO, MVT::i8, Lo);
612 Hi = DAG.getNode(PIC16ISD::MTHI, MVT::i8, Hi);
617 //SDValue PIC16TargetLowering::ExpandAdd(SDNode *N, SelectionDAG &DAG) {
618 //SDValue OperLeft = N->getOperand(0);
619 //SDValue OperRight = N->getOperand(1);
621 //if((OperLeft.getOpcode() == ISD::Constant) ||
622 //(OperRight.getOpcode() == ISD::Constant)) {
626 // These case are yet to be handled
630 SDValue PIC16TargetLowering::ExpandLoad(SDNode *N, SelectionDAG &DAG) {
631 LoadSDNode *LD = dyn_cast<LoadSDNode>(SDValue(N, 0));
632 SDValue Chain = LD->getChain();
633 SDValue Ptr = LD->getBasePtr();
635 SDValue Load, Offset;
638 SDValue PtrLo, PtrHi;
641 // Legalize direct/indirect addresses. This will give the lo and hi parts
642 // of the address and the offset.
643 LegalizeAddress(Ptr, DAG, PtrLo, PtrHi, LoadOffset);
645 // Load from the pointer (direct address or FSR)
646 VT = N->getValueType(0);
647 unsigned NumLoads = VT.getSizeInBits() / 8;
648 std::vector<SDValue> PICLoads;
650 MVT MemVT = LD->getMemoryVT();
651 if(ISD::isNON_EXTLoad(N)) {
652 for (iter=0; iter<NumLoads ; ++iter) {
653 // Add the pointer offset if any
654 Offset = DAG.getConstant(iter + LoadOffset, MVT::i8);
655 Tys = DAG.getVTList(MVT::i8, MVT::Other);
656 Load = DAG.getNode(PIC16ISD::PIC16Load, Tys, Chain, PtrLo, PtrHi,
658 PICLoads.push_back(Load);
661 // If it is extended load then use PIC16Load for Memory Bytes
662 // and for all extended bytes perform action based on type of
663 // extention - i.e. SignExtendedLoad or ZeroExtendedLoad
666 // For extended loads this is the memory value type
667 // i.e. without any extension
668 MVT MemVT = LD->getMemoryVT();
669 unsigned MemBytes = MemVT.getSizeInBits() / 8;
670 unsigned ExtdBytes = VT.getSizeInBits() / 8;
671 Offset = DAG.getConstant(LoadOffset, MVT::i8);
673 Tys = DAG.getVTList(MVT::i8, MVT::Other);
674 // For MemBytes generate PIC16Load with proper offset
675 for (iter=0; iter<MemBytes; ++iter) {
676 // Add the pointer offset if any
677 Offset = DAG.getConstant(iter + LoadOffset, MVT::i8);
678 Load = DAG.getNode(PIC16ISD::PIC16Load, Tys, Chain, PtrLo, PtrHi,
680 PICLoads.push_back(Load);
683 // For SignExtendedLoad
684 if (ISD::isSEXTLoad(N)) {
685 // For all ExtdBytes use the Right Shifted(Arithmetic) Value of the
687 SDValue SRA = DAG.getNode(ISD::SRA, MVT::i8, Load,
688 DAG.getConstant(7, MVT::i8));
689 for (iter=MemBytes; iter<ExtdBytes; ++iter) {
690 PICLoads.push_back(SRA);
692 } else if (ISD::isZEXTLoad(N)) {
693 // ZeroExtendedLoad -- For all ExtdBytes use constant 0
694 SDValue ConstZero = DAG.getConstant(0, MVT::i8);
695 for (iter=MemBytes; iter<ExtdBytes; ++iter) {
696 PICLoads.push_back(ConstZero);
703 // Operand of Load is illegal -- Load itself is legal
706 else if (VT == MVT::i16) {
707 BP = DAG.getNode(ISD::BUILD_PAIR, VT, PICLoads[0], PICLoads[1]);
708 if (MemVT == MVT::i8)
709 Chain = getChain(PICLoads[0]);
711 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(PICLoads[0]),
712 getChain(PICLoads[1]));
713 } else if (VT == MVT::i32) {
715 BPs[0] = DAG.getNode(ISD::BUILD_PAIR, MVT::i16, PICLoads[0], PICLoads[1]);
716 BPs[1] = DAG.getNode(ISD::BUILD_PAIR, MVT::i16, PICLoads[2], PICLoads[3]);
717 BP = DAG.getNode(ISD::BUILD_PAIR, VT, BPs[0], BPs[1]);
718 if (MemVT == MVT::i8)
719 Chain = getChain(PICLoads[0]);
720 else if (MemVT == MVT::i16)
721 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(PICLoads[0]),
722 getChain(PICLoads[1]));
725 Chains[0] = DAG.getNode(ISD::TokenFactor, MVT::Other,
726 getChain(PICLoads[0]), getChain(PICLoads[1]));
727 Chains[1] = DAG.getNode(ISD::TokenFactor, MVT::Other,
728 getChain(PICLoads[2]), getChain(PICLoads[3]));
729 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, Chains[0], Chains[1]);
732 Tys = DAG.getVTList(VT, MVT::Other);
733 return DAG.getNode(ISD::MERGE_VALUES, Tys, BP, Chain);
736 SDValue PIC16TargetLowering::LowerShift(SDValue Op, SelectionDAG &DAG) {
737 // We should have handled larger operands in type legalizer itself.
738 assert (Op.getValueType() == MVT::i8 && "illegal shift to lower");
740 SDNode *N = Op.getNode();
741 SDValue Value = N->getOperand(0);
742 SDValue Amt = N->getOperand(1);
743 PIC16ISD::PIC16Libcall CallCode;
744 switch (N->getOpcode()) {
746 CallCode = PIC16ISD::SRA_I8;
749 CallCode = PIC16ISD::SLL_I8;
752 CallCode = PIC16ISD::SRL_I8;
755 assert ( 0 && "This shift is not implemented yet.");
758 SmallVector<SDValue, 2> Ops(2);
761 SDValue Call = MakePIC16Libcall(CallCode, N->getValueType(0), &Ops[0], 2,
762 true, DAG, N->getDebugLoc());
767 PIC16TargetLowering::LowerOperationWrapper(SDNode *N,
768 SmallVectorImpl<SDValue>&Results,
770 SDValue Op = SDValue(N, 0);
773 switch (Op.getOpcode()) {
774 case ISD::FORMAL_ARGUMENTS:
775 Res = LowerFORMAL_ARGUMENTS(Op, DAG); break;
777 Res = ExpandLoad(Op.getNode(), DAG); break;
779 Res = LowerCALL(Op, DAG); break;
781 // All other operations are handled in LowerOperation.
782 Res = LowerOperation(Op, DAG);
784 Results.push_back(Res);
791 unsigned NumValues = N->getNumValues();
792 for (i = 0; i < NumValues ; i++) {
793 Results.push_back(SDValue(N, i));
797 SDValue PIC16TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
798 switch (Op.getOpcode()) {
799 case ISD::FORMAL_ARGUMENTS:
800 return LowerFORMAL_ARGUMENTS(Op, DAG);
804 return LowerADD(Op, DAG);
808 return LowerSUB(Op, DAG);
810 return ExpandLoad(Op.getNode(), DAG);
812 return ExpandStore(Op.getNode(), DAG);
816 return LowerShift(Op, DAG);
820 return LowerBinOp(Op, DAG);
822 return LowerCALL(Op, DAG);
824 return LowerRET(Op, DAG);
826 return LowerBR_CC(Op, DAG);
828 return LowerSELECT_CC(Op, DAG);
833 SDValue PIC16TargetLowering::ConvertToMemOperand(SDValue Op,
836 assert (Op.getValueType() == MVT::i8
837 && "illegal value type to store on stack.");
839 MachineFunction &MF = DAG.getMachineFunction();
840 const Function *Func = MF.getFunction();
841 const std::string FuncName = Func->getName();
843 char *tmpName = new char [strlen(FuncName.c_str()) + 6];
845 // Put the value on stack.
846 // Get a stack slot index and convert to es.
847 int FI = MF.getFrameInfo()->CreateStackObject(1, 1);
848 sprintf(tmpName, "%s.tmp", FuncName.c_str());
849 SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
851 // Store the value to ES.
852 SDValue Store = DAG.getNode (PIC16ISD::PIC16Store, MVT::Other,
855 DAG.getConstant (1, MVT::i8), // Banksel.
856 DAG.getConstant (FI, MVT::i8));
858 // Load the value from ES.
859 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other);
860 SDValue Load = DAG.getNode(PIC16ISD::PIC16Load, Tys, Store,
861 ES, DAG.getConstant (1, MVT::i8),
862 DAG.getConstant (FI, MVT::i8));
864 return Load.getValue(0);
868 PIC16TargetLowering::LowerCallArguments(SDValue Op, SDValue Chain,
869 SDValue FrameAddress,
872 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
873 unsigned NumOps = TheCall->getNumArgs();
875 SDValue Arg, StoreAt;
881 // FIXME: This portion of code currently assumes only
882 // primitive types being passed as arguments.
884 // Legalize the address before use
885 SDValue PtrLo, PtrHi;
886 unsigned AddressOffset;
888 LegalizeAddress(FrameAddress, DAG, PtrLo, PtrHi, AddressOffset);
891 std::vector<SDValue> Ops;
892 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
893 for (unsigned i=ArgCount, Offset = 0; i<NumOps; i++) {
895 Arg = TheCall->getArg(i);
897 StoreOffset = (Offset + AddressOffset);
899 // Store the argument on frame
902 Ops.push_back(Chain);
903 Ops.push_back(Arg.getValue(0));
904 Ops.push_back(PtrLo);
905 Ops.push_back(PtrHi);
906 Ops.push_back(DAG.getConstant(StoreOffset, MVT::i8));
907 Ops.push_back(InFlag);
909 StoreRet = DAG.getNode (PIC16ISD::PIC16StWF, Tys, &Ops[0], Ops.size());
911 Chain = getChain(StoreRet);
912 InFlag = getOutFlag(StoreRet);
914 // Update the frame offset to be used for next argument
915 ArgVT = Arg.getValueType();
916 Size = ArgVT.getSizeInBits();
917 Size = Size/8; // Calculate size in bytes
918 Offset += Size; // Increase the frame offset
924 PIC16TargetLowering::LowerCallReturn(SDValue Op, SDValue Chain,
925 SDValue FrameAddress,
928 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
929 // Currently handling primitive types only. They will come in
931 unsigned RetVals = TheCall->getNumRetVals();
933 std::vector<SDValue> ResultVals;
935 // Return immediately if the return type is void
939 // Call has something to return
941 // Legalize the address before use
944 LegalizeAddress(FrameAddress, DAG, LdLo, LdHi, LdOffset);
946 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other, MVT::Flag);
949 for(unsigned i=0, Offset=0;i<RetVals;i++) {
951 LoadRet = DAG.getNode(PIC16ISD::PIC16LdWF, Tys, Chain, LdLo, LdHi,
952 DAG.getConstant(LdOffset + Offset, MVT::i8),
955 InFlag = getOutFlag(LoadRet);
957 Chain = getChain(LoadRet);
959 ResultVals.push_back(LoadRet);
962 // To return use MERGE_VALUES
963 ResultVals.push_back(Chain);
964 SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size());
968 SDValue PIC16TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) {
969 //int NumOps = Op.getNode()->getNumOperands();
971 // For default cases LLVM returns the value on the function frame
972 // So let LLVM do this for all the cases other than character
976 SDValue PIC16TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
977 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
978 SDValue Chain = TheCall->getChain();
979 SDValue Callee = TheCall->getCallee();
981 if (Callee.getValueType() == MVT::i16 &&
982 Callee.getOpcode() == ISD::BUILD_PAIR) {
983 // It has come from TypeLegalizer for lowering
985 Callee = Callee.getOperand(0).getOperand(0);
987 std::vector<SDValue> Ops;
988 Ops.push_back(Chain);
989 Ops.push_back(Callee);
991 // Add the call arguments and their flags
992 unsigned NumArgs = TheCall->getNumArgs();
993 for(i=0;i<NumArgs;i++) {
994 Ops.push_back(TheCall->getArg(i));
995 Ops.push_back(TheCall->getArgFlagsVal(i));
998 std::vector<MVT> NodeTys;
999 unsigned NumRets = TheCall->getNumRetVals();
1000 for(i=0;i<NumRets;i++)
1001 NodeTys.push_back(TheCall->getRetValType(i));
1003 // Return a Chain as well
1004 NodeTys.push_back(MVT::Other);
1006 SDVTList VTs = DAG.getVTList(&NodeTys[0], NodeTys.size());
1008 DAG.getCall(TheCall->getCallingConv(), TheCall->getDebugLoc(),
1009 TheCall->isVarArg(), TheCall->isTailCall(),
1010 TheCall->isInreg(), VTs, &Ops[0], Ops.size());
1015 SDValue ZeroOperand = DAG.getConstant(0, MVT::i8);
1017 // Start the call sequence.
1018 // Carring the Constant 0 along the CALLSEQSTART
1019 // because there is nothing else to carry.
1020 SDValue SeqStart = DAG.getCALLSEQ_START(Chain, ZeroOperand);
1021 Chain = getChain(SeqStart);
1023 // For any direct call - callee will be GlobalAddressNode or
1026 // Considering the GlobalAddressNode case here.
1027 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
1028 GlobalValue *GV = G->getGlobal();
1029 Callee = DAG.getTargetGlobalAddress(GV, MVT::i8);
1032 // Considering the ExternalSymbol case here
1033 if (ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(Callee)) {
1034 Callee = DAG.getTargetExternalSymbol(ES->getSymbol(), MVT::i8);
1037 SDValue OperFlag = getOutFlag(Chain); // To manage the data dependency
1041 // Considering GlobalAddress here
1042 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
1043 Name = G->getGlobal()->getName();
1045 // Considering ExternalSymbol here
1046 if (ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(Callee))
1047 Name = ES->getSymbol();
1049 char *argFrame = new char [strlen(Name.c_str()) + 8];
1050 sprintf(argFrame, "%s.args", Name.c_str());
1051 SDValue ArgLabel = DAG.getTargetExternalSymbol(argFrame, MVT::i8);
1053 char *retName = new char [strlen(Name.c_str()) + 8];
1054 sprintf(retName, "%s.retval", Name.c_str());
1055 SDValue RetLabel = DAG.getTargetExternalSymbol(retName, MVT::i8);
1057 // Pass the argument to function before making the call.
1058 SDValue CallArgs = LowerCallArguments(Op, Chain, ArgLabel, OperFlag, DAG);
1059 Chain = getChain(CallArgs);
1060 OperFlag = getOutFlag(CallArgs);
1062 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
1063 SDValue PICCall = DAG.getNode(PIC16ISD::CALL, Tys, Chain, Callee,
1065 Chain = getChain(PICCall);
1066 OperFlag = getOutFlag(PICCall);
1069 // Carrying the Constant 0 along the CALLSEQSTART
1070 // because there is nothing else to carry.
1071 SDValue SeqEnd = DAG.getCALLSEQ_END(Chain, ZeroOperand, ZeroOperand,
1073 Chain = getChain(SeqEnd);
1074 OperFlag = getOutFlag(SeqEnd);
1076 // Lower the return value reading after the call.
1077 return LowerCallReturn(Op, Chain, RetLabel, OperFlag, DAG);
1080 bool PIC16TargetLowering::isDirectLoad(const SDValue Op) {
1081 if (Op.getOpcode() == PIC16ISD::PIC16Load)
1082 if (Op.getOperand(1).getOpcode() == ISD::TargetGlobalAddress
1083 || Op.getOperand(1).getOpcode() == ISD::TargetExternalSymbol)
1088 bool PIC16TargetLowering::NeedToConvertToMemOp(SDValue Op, unsigned &MemOp) {
1089 // Return false if one of the operands is already a direct
1090 // load and that operand has only one use.
1091 if (Op.getOperand(0).getOpcode() == ISD::Constant ||
1092 Op.getOperand(1).getOpcode() == ISD::Constant)
1094 if (isDirectLoad(Op.getOperand(0))) {
1095 if (Op.getOperand(0).hasOneUse())
1100 if (isDirectLoad(Op.getOperand(1))) {
1101 if (Op.getOperand(1).hasOneUse())
1109 SDValue PIC16TargetLowering:: LowerBinOp(SDValue Op, SelectionDAG &DAG) {
1110 // We should have handled larger operands in type legalizer itself.
1111 assert (Op.getValueType() == MVT::i8 && "illegal Op to lower");
1113 if (NeedToConvertToMemOp(Op, MemOp)) {
1114 // Put one value on stack.
1115 SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG);
1117 return DAG.getNode(Op.getOpcode(), MVT::i8, Op.getOperand(MemOp ^ 1),
1125 SDValue PIC16TargetLowering:: LowerADD(SDValue Op, SelectionDAG &DAG) {
1126 // We should have handled larger operands in type legalizer itself.
1127 assert (Op.getValueType() == MVT::i8 && "illegal add to lower");
1129 if (NeedToConvertToMemOp(Op, MemOp)) {
1130 // Put one value on stack.
1131 SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG);
1133 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
1135 if (Op.getOpcode() == ISD::ADDE)
1136 return DAG.getNode(Op.getOpcode(), Tys, Op.getOperand(MemOp ^ 1), NewVal,
1139 return DAG.getNode(Op.getOpcode(), Tys, Op.getOperand(MemOp ^ 1), NewVal);
1141 else if (Op.getOpcode() == ISD::ADD) {
1149 SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {
1150 // We should have handled larger operands in type legalizer itself.
1151 assert (Op.getValueType() == MVT::i8 && "illegal sub to lower");
1153 // Nothing to do if the first operand is already a direct load and it has
1155 if (isDirectLoad(Op.getOperand(0)) && Op.getOperand(0).hasOneUse())
1158 // Put first operand on stack.
1159 SDValue NewVal = ConvertToMemOperand (Op.getOperand(0), DAG);
1161 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
1162 if (Op.getOpcode() == ISD::SUBE)
1163 return DAG.getNode(Op.getOpcode(), Tys, NewVal, Op.getOperand(1),
1166 return DAG.getNode(Op.getOpcode(), Tys, NewVal, Op.getOperand(1));
1169 // LowerFORMAL_ARGUMENTS - In Lowering FORMAL ARGUMENTS - MERGE_VALUES nodes
1170 // is returned. MERGE_VALUES nodes number of operands and number of values are
1171 // equal. Therefore to construct MERGE_VALUE node, UNDEF nodes equal to the
1172 // number of arguments of function have been created.
1174 SDValue PIC16TargetLowering:: LowerFORMAL_ARGUMENTS(SDValue Op,
1175 SelectionDAG &DAG) {
1176 SmallVector<SDValue, 8> ArgValues;
1177 unsigned NumArgs = Op.getNumOperands() - 3;
1179 // Creating UNDEF nodes to meet the requirement of MERGE_VALUES node.
1180 for(unsigned i = 0 ; i<NumArgs ; i++) {
1181 SDValue TempNode = DAG.getNode(ISD::UNDEF, Op.getNode()->getValueType(i));
1182 ArgValues.push_back(TempNode);
1185 ArgValues.push_back(Op.getOperand(0));
1186 return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
1188 ArgValues.size()).getValue(Op.getResNo());
1191 // Perform DAGCombine of PIC16Load
1192 SDValue PIC16TargetLowering::
1193 PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const {
1194 SelectionDAG &DAG = DCI.DAG;
1195 SDValue Chain = N->getOperand(0);
1196 if (N->hasNUsesOfValue(0, 0)) {
1197 DAG.ReplaceAllUsesOfValueWith(SDValue(N,1), Chain);
1203 SDValue PIC16TargetLowering::PerformDAGCombine(SDNode *N,
1204 DAGCombinerInfo &DCI) const {
1205 switch (N->getOpcode()) {
1206 case PIC16ISD::PIC16Load:
1207 return PerformPIC16LoadCombine(N, DCI);
1212 static PIC16CC::CondCodes IntCCToPIC16CC(ISD::CondCode CC) {
1214 default: assert(0 && "Unknown condition code!");
1215 case ISD::SETNE: return PIC16CC::NE;
1216 case ISD::SETEQ: return PIC16CC::EQ;
1217 case ISD::SETGT: return PIC16CC::GT;
1218 case ISD::SETGE: return PIC16CC::GE;
1219 case ISD::SETLT: return PIC16CC::LT;
1220 case ISD::SETLE: return PIC16CC::LE;
1221 case ISD::SETULT: return PIC16CC::ULT;
1222 case ISD::SETULE: return PIC16CC::LE;
1223 case ISD::SETUGE: return PIC16CC::GE;
1224 case ISD::SETUGT: return PIC16CC::UGT;
1228 // Look at LHS/RHS/CC and see if they are a lowered setcc instruction. If so
1229 // set LHS/RHS and SPCC to the LHS/RHS of the setcc and SPCC to the condition.
1230 static void LookThroughSetCC(SDValue &LHS, SDValue &RHS,
1231 ISD::CondCode CC, unsigned &SPCC) {
1232 if (isa<ConstantSDNode>(RHS) &&
1233 cast<ConstantSDNode>(RHS)->getZExtValue() == 0 &&
1235 (LHS.getOpcode() == PIC16ISD::SELECT_ICC &&
1236 LHS.getOperand(3).getOpcode() == PIC16ISD::SUBCC) &&
1237 isa<ConstantSDNode>(LHS.getOperand(0)) &&
1238 isa<ConstantSDNode>(LHS.getOperand(1)) &&
1239 cast<ConstantSDNode>(LHS.getOperand(0))->getZExtValue() == 1 &&
1240 cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue() == 0) {
1241 SDValue CMPCC = LHS.getOperand(3);
1242 SPCC = cast<ConstantSDNode>(LHS.getOperand(2))->getZExtValue();
1243 LHS = CMPCC.getOperand(0);
1244 RHS = CMPCC.getOperand(1);
1248 // Returns appropriate CMP insn and corresponding condition code in PIC16CC
1249 SDValue PIC16TargetLowering::getPIC16Cmp(SDValue LHS, SDValue RHS,
1250 unsigned CC, SDValue &PIC16CC,
1251 SelectionDAG &DAG) {
1252 PIC16CC::CondCodes CondCode = (PIC16CC::CondCodes) CC;
1254 // PIC16 sub is literal - W. So Swap the operands and condition if needed.
1255 // i.e. a < 12 can be rewritten as 12 > a.
1256 if (RHS.getOpcode() == ISD::Constant) {
1265 CondCode = PIC16CC::GT;
1268 CondCode = PIC16CC::LT;
1271 CondCode = PIC16CC::UGT;
1274 CondCode = PIC16CC::ULT;
1277 CondCode = PIC16CC::LE;
1280 CondCode = PIC16CC::GE;
1283 CondCode = PIC16CC::UGE;
1286 CondCode = PIC16CC::ULE;
1291 PIC16CC = DAG.getConstant(CondCode, MVT::i8);
1293 // These are signed comparisons.
1294 SDValue Mask = DAG.getConstant(128, MVT::i8);
1295 if (isSignedComparison(CondCode)) {
1296 LHS = DAG.getNode (ISD::XOR, MVT::i8, LHS, Mask);
1297 RHS = DAG.getNode (ISD::XOR, MVT::i8, RHS, Mask);
1300 SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Flag);
1301 // We can use a subtract operation to set the condition codes. But
1302 // we need to put one operand in memory if required.
1303 // Nothing to do if the first operand is already a valid type (direct load
1304 // for subwf and literal for sublw) and it is used by this operation only.
1305 if ((LHS.getOpcode() == ISD::Constant || isDirectLoad(LHS))
1307 return DAG.getNode(PIC16ISD::SUBCC, VTs, LHS, RHS);
1309 // else convert the first operand to mem.
1310 LHS = ConvertToMemOperand (LHS, DAG);
1311 return DAG.getNode(PIC16ISD::SUBCC, VTs, LHS, RHS);
1315 SDValue PIC16TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) {
1316 SDValue LHS = Op.getOperand(0);
1317 SDValue RHS = Op.getOperand(1);
1318 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
1319 SDValue TrueVal = Op.getOperand(2);
1320 SDValue FalseVal = Op.getOperand(3);
1321 unsigned ORIGCC = ~0;
1323 // If this is a select_cc of a "setcc", and if the setcc got lowered into
1324 // an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
1326 // A setcc: lhs, rhs, cc is expanded by llvm to
1327 // select_cc: result of setcc, 0, 1, 0, setne
1328 // We can think of it as:
1329 // select_cc: lhs, rhs, 1, 0, cc
1330 LookThroughSetCC(LHS, RHS, CC, ORIGCC);
1331 if (ORIGCC == ~0U) ORIGCC = IntCCToPIC16CC (CC);
1334 SDValue Cmp = getPIC16Cmp(LHS, RHS, ORIGCC, PIC16CC, DAG);
1336 return DAG.getNode (PIC16ISD::SELECT_ICC, TrueVal.getValueType(), TrueVal,
1337 FalseVal, PIC16CC, Cmp.getValue(1));
1341 PIC16TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
1342 MachineBasicBlock *BB) {
1343 const TargetInstrInfo &TII = *getTargetMachine().getInstrInfo();
1344 unsigned CC = (PIC16CC::CondCodes)MI->getOperand(3).getImm();
1346 // To "insert" a SELECT_CC instruction, we actually have to insert the diamond
1347 // control-flow pattern. The incoming instruction knows the destination vreg
1348 // to set, the condition code register to branch on, the true/false values to
1349 // select between, and a branch opcode to use.
1350 const BasicBlock *LLVM_BB = BB->getBasicBlock();
1351 MachineFunction::iterator It = BB;
1358 // fallthrough --> copy0MBB
1359 MachineBasicBlock *thisMBB = BB;
1360 MachineFunction *F = BB->getParent();
1361 MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
1362 MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
1363 BuildMI(BB, TII.get(PIC16::pic16brcond)).addMBB(sinkMBB).addImm(CC);
1364 F->insert(It, copy0MBB);
1365 F->insert(It, sinkMBB);
1367 // Update machine-CFG edges by transferring all successors of the current
1368 // block to the new block which will contain the Phi node for the select.
1369 sinkMBB->transferSuccessors(BB);
1370 // Next, add the true and fallthrough blocks as its successors.
1371 BB->addSuccessor(copy0MBB);
1372 BB->addSuccessor(sinkMBB);
1375 // %FalseValue = ...
1376 // # fallthrough to sinkMBB
1379 // Update machine-CFG edges
1380 BB->addSuccessor(sinkMBB);
1383 // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
1386 BuildMI(BB, TII.get(PIC16::PHI), MI->getOperand(0).getReg())
1387 .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
1388 .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB);
1390 F->DeleteMachineInstr(MI); // The pseudo instruction is gone now.
1395 SDValue PIC16TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) {
1396 SDValue Chain = Op.getOperand(0);
1397 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
1398 SDValue LHS = Op.getOperand(2); // LHS of the condition.
1399 SDValue RHS = Op.getOperand(3); // RHS of the condition.
1400 SDValue Dest = Op.getOperand(4); // BB to jump to
1401 unsigned ORIGCC = ~0;
1403 // If this is a br_cc of a "setcc", and if the setcc got lowered into
1404 // an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
1405 LookThroughSetCC(LHS, RHS, CC, ORIGCC);
1406 if (ORIGCC == ~0U) ORIGCC = IntCCToPIC16CC (CC);
1408 // Get the Compare insn and condition code.
1410 SDValue Cmp = getPIC16Cmp(LHS, RHS, ORIGCC, PIC16CC, DAG);
1412 return DAG.getNode(PIC16ISD::BRCOND, MVT::Other, Chain, Dest, PIC16CC,