2 // The LLVM Compiler Infrastructure
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
7 //===----------------------------------------------------------------------===//
9 // This file defines the interfaces that PIC16 uses to lower LLVM code into a
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "pic16-lower"
16 #include "PIC16ISelLowering.h"
17 #include "PIC16TargetMachine.h"
18 #include "llvm/DerivedTypes.h"
19 #include "llvm/GlobalValue.h"
20 #include "llvm/Function.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
32 // PIC16TargetLowering Constructor.
33 PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
34 : TargetLowering(TM), TmpSize(0) {
36 Subtarget = &TM.getSubtarget<PIC16Subtarget>();
38 addRegisterClass(MVT::i8, PIC16::GPRRegisterClass);
40 setShiftAmountType(MVT::i8);
41 setShiftAmountFlavor(Extend);
43 // SRA library call names
44 setPIC16LibcallName(PIC16ISD::SRA_I8, "__intrinsics.sra.i8");
45 setLibcallName(RTLIB::SRA_I16, "__intrinsics.sra.i16");
46 setLibcallName(RTLIB::SRA_I32, "__intrinsics.sra.i32");
48 // SHL library call names
49 setPIC16LibcallName(PIC16ISD::SLL_I8, "__intrinsics.sll.i8");
50 setLibcallName(RTLIB::SHL_I16, "__intrinsics.sll.i16");
51 setLibcallName(RTLIB::SHL_I32, "__intrinsics.sll.i32");
53 // SRL library call names
54 setPIC16LibcallName(PIC16ISD::SRL_I8, "__intrinsics.srl.i8");
55 setLibcallName(RTLIB::SRL_I16, "__intrinsics.srl.i16");
56 setLibcallName(RTLIB::SRL_I32, "__intrinsics.srl.i32");
58 // MUL Library call names
59 setPIC16LibcallName(PIC16ISD::MUL_I8, "__intrinsics.mul.i8");
60 setLibcallName(RTLIB::MUL_I16, "__intrinsics.mul.i16");
61 setLibcallName(RTLIB::MUL_I32, "__intrinsics.mul.i32");
63 setOperationAction(ISD::GlobalAddress, MVT::i16, Custom);
64 setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom);
66 setOperationAction(ISD::LOAD, MVT::i8, Legal);
67 setOperationAction(ISD::LOAD, MVT::i16, Custom);
68 setOperationAction(ISD::LOAD, MVT::i32, Custom);
70 setOperationAction(ISD::STORE, MVT::i8, Legal);
71 setOperationAction(ISD::STORE, MVT::i16, Custom);
72 setOperationAction(ISD::STORE, MVT::i32, Custom);
74 setOperationAction(ISD::ADDE, MVT::i8, Custom);
75 setOperationAction(ISD::ADDC, MVT::i8, Custom);
76 setOperationAction(ISD::SUBE, MVT::i8, Custom);
77 setOperationAction(ISD::SUBC, MVT::i8, Custom);
78 setOperationAction(ISD::ADD, MVT::i8, Custom);
79 setOperationAction(ISD::ADD, MVT::i16, Custom);
81 setOperationAction(ISD::OR, MVT::i8, Custom);
82 setOperationAction(ISD::AND, MVT::i8, Custom);
83 setOperationAction(ISD::XOR, MVT::i8, Custom);
85 setOperationAction(ISD::FrameIndex, MVT::i16, Custom);
86 setOperationAction(ISD::CALL, MVT::i16, Custom);
87 setOperationAction(ISD::RET, MVT::Other, Custom);
89 setOperationAction(ISD::MUL, MVT::i8, Custom);
90 setOperationAction(ISD::MUL, MVT::i16, Expand);
91 setOperationAction(ISD::MUL, MVT::i32, Expand);
93 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand);
94 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand);
95 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
96 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand);
97 setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand);
98 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
99 setOperationAction(ISD::MULHU, MVT::i8, Expand);
100 setOperationAction(ISD::MULHU, MVT::i16, Expand);
101 setOperationAction(ISD::MULHU, MVT::i32, Expand);
102 setOperationAction(ISD::MULHS, MVT::i8, Expand);
103 setOperationAction(ISD::MULHS, MVT::i16, Expand);
104 setOperationAction(ISD::MULHS, MVT::i32, Expand);
106 setOperationAction(ISD::SRA, MVT::i8, Custom);
107 setOperationAction(ISD::SRA, MVT::i16, Expand);
108 setOperationAction(ISD::SRA, MVT::i32, Expand);
109 setOperationAction(ISD::SHL, MVT::i8, Custom);
110 setOperationAction(ISD::SHL, MVT::i16, Expand);
111 setOperationAction(ISD::SHL, MVT::i32, Expand);
112 setOperationAction(ISD::SRL, MVT::i8, Custom);
113 setOperationAction(ISD::SRL, MVT::i16, Expand);
114 setOperationAction(ISD::SRL, MVT::i32, Expand);
116 // PIC16 does not support shift parts
117 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand);
118 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand);
119 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
120 setOperationAction(ISD::SHL_PARTS, MVT::i8, Expand);
121 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand);
122 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
123 setOperationAction(ISD::SRL_PARTS, MVT::i8, Expand);
124 setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand);
125 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
128 // PIC16 does not have a SETCC, expand it to SELECT_CC.
129 setOperationAction(ISD::SETCC, MVT::i8, Expand);
130 setOperationAction(ISD::SELECT, MVT::i8, Expand);
131 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
132 setOperationAction(ISD::BRIND, MVT::Other, Expand);
134 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
135 setOperationAction(ISD::BR_CC, MVT::i8, Custom);
137 //setOperationAction(ISD::TRUNCATE, MVT::i16, Custom);
138 setTruncStoreAction(MVT::i16, MVT::i8, Custom);
140 // Now deduce the information based on the above mentioned
142 computeRegisterProperties();
145 // getOutFlag - Extract the flag result if the Op has it.
146 static SDValue getOutFlag(SDValue &Op) {
147 // Flag is the last value of the node.
148 SDValue Flag = Op.getValue(Op.getNode()->getNumValues() - 1);
150 assert (Flag.getValueType() == MVT::Flag
151 && "Node does not have an out Flag");
155 // Get the TmpOffset for FrameIndex
156 unsigned PIC16TargetLowering::GetTmpOffsetForFI(unsigned FI, unsigned size) {
157 std::map<unsigned, unsigned>::iterator
158 MapIt = FiTmpOffsetMap.find(FI);
159 if (MapIt != FiTmpOffsetMap.end())
160 return MapIt->second;
162 // This FI (FrameIndex) is not yet mapped, so map it
163 FiTmpOffsetMap[FI] = TmpSize;
165 return FiTmpOffsetMap[FI];
168 // To extract chain value from the SDValue Nodes
169 // This function will help to maintain the chain extracting
170 // code at one place. In case of any change in future it will
171 // help maintain the code.
172 static SDValue getChain(SDValue &Op) {
173 SDValue Chain = Op.getValue(Op.getNode()->getNumValues() - 1);
175 // If the last value returned in Flag then the chain is
176 // second last value returned.
177 if (Chain.getValueType() == MVT::Flag)
178 Chain = Op.getValue(Op.getNode()->getNumValues() - 2);
180 // All nodes may not produce a chain. Therefore following assert
181 // verifies that the node is returning a chain only.
182 assert (Chain.getValueType() == MVT::Other
183 && "Node does not have a chain");
188 /// PopulateResults - Helper function to LowerOperation.
189 /// If a node wants to return multiple results after lowering,
190 /// it stuffs them into an array of SDValue called Results.
192 static void PopulateResults(SDValue N, SmallVectorImpl<SDValue>&Results) {
193 if (N.getOpcode() == ISD::MERGE_VALUES) {
194 int NumResults = N.getNumOperands();
195 for( int i = 0; i < NumResults; i++)
196 Results.push_back(N.getOperand(i));
199 Results.push_back(N);
202 MVT PIC16TargetLowering::getSetCCResultType(MVT ValType) const {
206 /// The type legalizer framework of generating legalizer can generate libcalls
207 /// only when the operand/result types are illegal.
208 /// PIC16 needs to generate libcalls even for the legal types (i8) for some ops.
209 /// For example an arithmetic right shift. These functions are used to lower
210 /// such operations that generate libcall for legal types.
213 PIC16TargetLowering::setPIC16LibcallName(PIC16ISD::PIC16Libcall Call,
215 PIC16LibcallNames[Call] = Name;
219 PIC16TargetLowering::getPIC16LibcallName(PIC16ISD::PIC16Libcall Call) {
220 return PIC16LibcallNames[Call];
224 PIC16TargetLowering::MakePIC16Libcall(PIC16ISD::PIC16Libcall Call,
225 MVT RetVT, const SDValue *Ops,
226 unsigned NumOps, bool isSigned,
227 SelectionDAG &DAG, DebugLoc dl) {
229 TargetLowering::ArgListTy Args;
230 Args.reserve(NumOps);
232 TargetLowering::ArgListEntry Entry;
233 for (unsigned i = 0; i != NumOps; ++i) {
235 Entry.Ty = Entry.Node.getValueType().getTypeForMVT();
236 Entry.isSExt = isSigned;
237 Entry.isZExt = !isSigned;
238 Args.push_back(Entry);
240 SDValue Callee = DAG.getExternalSymbol(getPIC16LibcallName(Call), MVT::i8);
242 const Type *RetTy = RetVT.getTypeForMVT();
243 std::pair<SDValue,SDValue> CallInfo =
244 LowerCallTo(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false,
245 false, CallingConv::C, false, Callee, Args, DAG, dl);
247 return CallInfo.first;
250 const char *PIC16TargetLowering::getTargetNodeName(unsigned Opcode) const {
252 default: return NULL;
253 case PIC16ISD::Lo: return "PIC16ISD::Lo";
254 case PIC16ISD::Hi: return "PIC16ISD::Hi";
255 case PIC16ISD::MTLO: return "PIC16ISD::MTLO";
256 case PIC16ISD::MTHI: return "PIC16ISD::MTHI";
257 case PIC16ISD::MTPCLATH: return "PIC16ISD::MTPCLATH";
258 case PIC16ISD::PIC16Connect: return "PIC16ISD::PIC16Connect";
259 case PIC16ISD::Banksel: return "PIC16ISD::Banksel";
260 case PIC16ISD::PIC16Load: return "PIC16ISD::PIC16Load";
261 case PIC16ISD::PIC16LdArg: return "PIC16ISD::PIC16LdArg";
262 case PIC16ISD::PIC16LdWF: return "PIC16ISD::PIC16LdWF";
263 case PIC16ISD::PIC16Store: return "PIC16ISD::PIC16Store";
264 case PIC16ISD::PIC16StWF: return "PIC16ISD::PIC16StWF";
265 case PIC16ISD::BCF: return "PIC16ISD::BCF";
266 case PIC16ISD::LSLF: return "PIC16ISD::LSLF";
267 case PIC16ISD::LRLF: return "PIC16ISD::LRLF";
268 case PIC16ISD::RLF: return "PIC16ISD::RLF";
269 case PIC16ISD::RRF: return "PIC16ISD::RRF";
270 case PIC16ISD::CALL: return "PIC16ISD::CALL";
271 case PIC16ISD::CALLW: return "PIC16ISD::CALLW";
272 case PIC16ISD::SUBCC: return "PIC16ISD::SUBCC";
273 case PIC16ISD::SELECT_ICC: return "PIC16ISD::SELECT_ICC";
274 case PIC16ISD::BRCOND: return "PIC16ISD::BRCOND";
275 case PIC16ISD::Dummy: return "PIC16ISD::Dummy";
279 void PIC16TargetLowering::ReplaceNodeResults(SDNode *N,
280 SmallVectorImpl<SDValue>&Results,
283 switch (N->getOpcode()) {
284 case ISD::GlobalAddress:
285 Results.push_back(ExpandGlobalAddress(N, DAG));
287 case ISD::ExternalSymbol:
288 Results.push_back(ExpandExternalSymbol(N, DAG));
291 Results.push_back(ExpandStore(N, DAG));
294 PopulateResults(ExpandLoad(N, DAG), Results);
297 // Results.push_back(ExpandAdd(N, DAG));
299 case ISD::FrameIndex:
300 Results.push_back(ExpandFrameIndex(N, DAG));
303 assert (0 && "not implemented");
308 SDValue PIC16TargetLowering::ExpandFrameIndex(SDNode *N, SelectionDAG &DAG) {
310 // Currently handling FrameIndex of size MVT::i16 only
311 // One example of this scenario is when return value is written on
314 if (N->getValueType(0) != MVT::i16)
317 // Expand the FrameIndex into ExternalSymbol and a Constant node
318 // The constant will represent the frame index number
319 // Get the current function frame
320 MachineFunction &MF = DAG.getMachineFunction();
321 const Function *Func = MF.getFunction();
322 const std::string Name = Func->getName();
324 FrameIndexSDNode *FR = dyn_cast<FrameIndexSDNode>(SDValue(N,0));
325 // FIXME there isn't really debug info here
326 DebugLoc dl = FR->getDebugLoc();
327 int Index = FR->getIndex();
329 // Expand FrameIndex like GlobalAddress and ExternalSymbol
330 // Also use Offset field for lo and hi parts. The default
332 SDValue Offset = DAG.getConstant(0, MVT::i8);
333 SDValue FI = DAG.getTargetFrameIndex(Index, MVT::i8);
334 SDValue Lo = DAG.getNode(PIC16ISD::Lo, dl, MVT::i8, FI, Offset);
335 SDValue Hi = DAG.getNode(PIC16ISD::Hi, dl, MVT::i8, FI, Offset);
336 return DAG.getNode(ISD::BUILD_PAIR, dl, N->getValueType(0), Lo, Hi);
340 SDValue PIC16TargetLowering::ExpandStore(SDNode *N, SelectionDAG &DAG) {
341 StoreSDNode *St = cast<StoreSDNode>(N);
342 SDValue Chain = St->getChain();
343 SDValue Src = St->getValue();
344 SDValue Ptr = St->getBasePtr();
345 MVT ValueType = Src.getValueType();
346 unsigned StoreOffset = 0;
347 DebugLoc dl = N->getDebugLoc();
349 SDValue PtrLo, PtrHi;
350 LegalizeAddress(Ptr, DAG, PtrLo, PtrHi, StoreOffset, dl);
352 if (ValueType == MVT::i8) {
353 return DAG.getNode (PIC16ISD::PIC16Store, dl, MVT::Other, Chain, Src,
355 DAG.getConstant (0 + StoreOffset, MVT::i8));
357 else if (ValueType == MVT::i16) {
358 // Get the Lo and Hi parts from MERGE_VALUE or BUILD_PAIR.
359 SDValue SrcLo, SrcHi;
360 GetExpandedParts(Src, DAG, SrcLo, SrcHi);
361 SDValue ChainLo = Chain, ChainHi = Chain;
362 if (Chain.getOpcode() == ISD::TokenFactor) {
363 ChainLo = Chain.getOperand(0);
364 ChainHi = Chain.getOperand(1);
366 SDValue Store1 = DAG.getNode(PIC16ISD::PIC16Store, dl, MVT::Other,
369 DAG.getConstant (0 + StoreOffset, MVT::i8));
371 SDValue Store2 = DAG.getNode(PIC16ISD::PIC16Store, dl, MVT::Other, ChainHi,
373 DAG.getConstant (1 + StoreOffset, MVT::i8));
375 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, getChain(Store1),
378 else if (ValueType == MVT::i32) {
379 // Get the Lo and Hi parts from MERGE_VALUE or BUILD_PAIR.
380 SDValue SrcLo, SrcHi;
381 GetExpandedParts(Src, DAG, SrcLo, SrcHi);
383 // Get the expanded parts of each of SrcLo and SrcHi.
384 SDValue SrcLo1, SrcLo2, SrcHi1, SrcHi2;
385 GetExpandedParts(SrcLo, DAG, SrcLo1, SrcLo2);
386 GetExpandedParts(SrcHi, DAG, SrcHi1, SrcHi2);
388 SDValue ChainLo = Chain, ChainHi = Chain;
389 if (Chain.getOpcode() == ISD::TokenFactor) {
390 ChainLo = Chain.getOperand(0);
391 ChainHi = Chain.getOperand(1);
393 SDValue ChainLo1 = ChainLo, ChainLo2 = ChainLo, ChainHi1 = ChainHi,
395 if (ChainLo.getOpcode() == ISD::TokenFactor) {
396 ChainLo1 = ChainLo.getOperand(0);
397 ChainLo2 = ChainLo.getOperand(1);
399 if (ChainHi.getOpcode() == ISD::TokenFactor) {
400 ChainHi1 = ChainHi.getOperand(0);
401 ChainHi2 = ChainHi.getOperand(1);
403 SDValue Store1 = DAG.getNode(PIC16ISD::PIC16Store, dl, MVT::Other,
405 SrcLo1, PtrLo, PtrHi,
406 DAG.getConstant (0 + StoreOffset, MVT::i8));
408 SDValue Store2 = DAG.getNode(PIC16ISD::PIC16Store, dl, MVT::Other, ChainLo2,
409 SrcLo2, PtrLo, PtrHi,
410 DAG.getConstant (1 + StoreOffset, MVT::i8));
412 SDValue Store3 = DAG.getNode(PIC16ISD::PIC16Store, dl, MVT::Other, ChainHi1,
413 SrcHi1, PtrLo, PtrHi,
414 DAG.getConstant (2 + StoreOffset, MVT::i8));
416 SDValue Store4 = DAG.getNode(PIC16ISD::PIC16Store, dl, MVT::Other, ChainHi2,
417 SrcHi2, PtrLo, PtrHi,
418 DAG.getConstant (3 + StoreOffset, MVT::i8));
420 SDValue RetLo = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
421 getChain(Store1), getChain(Store2));
422 SDValue RetHi = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
423 getChain(Store3), getChain(Store4));
424 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, RetLo, RetHi);
428 assert (0 && "value type not supported");
433 SDValue PIC16TargetLowering::ExpandExternalSymbol(SDNode *N, SelectionDAG &DAG)
435 ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(SDValue(N, 0));
436 // FIXME there isn't really debug info here
437 DebugLoc dl = ES->getDebugLoc();
439 SDValue TES = DAG.getTargetExternalSymbol(ES->getSymbol(), MVT::i8);
440 SDValue Offset = DAG.getConstant(0, MVT::i8);
441 SDValue Lo = DAG.getNode(PIC16ISD::Lo, dl, MVT::i8, TES, Offset);
442 SDValue Hi = DAG.getNode(PIC16ISD::Hi, dl, MVT::i8, TES, Offset);
444 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i16, Lo, Hi);
447 // ExpandGlobalAddress -
448 SDValue PIC16TargetLowering::ExpandGlobalAddress(SDNode *N, SelectionDAG &DAG) {
449 GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(SDValue(N, 0));
450 // FIXME there isn't really debug info here
451 DebugLoc dl = G->getDebugLoc();
453 SDValue TGA = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i8,
456 SDValue Offset = DAG.getConstant(0, MVT::i8);
457 SDValue Lo = DAG.getNode(PIC16ISD::Lo, dl, MVT::i8, TGA, Offset);
458 SDValue Hi = DAG.getNode(PIC16ISD::Hi, dl, MVT::i8, TGA, Offset);
460 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i16, Lo, Hi);
463 bool PIC16TargetLowering::isDirectAddress(const SDValue &Op) {
464 assert (Op.getNode() != NULL && "Can't operate on NULL SDNode!!");
466 if (Op.getOpcode() == ISD::BUILD_PAIR) {
467 if (Op.getOperand(0).getOpcode() == PIC16ISD::Lo)
473 // Return true if DirectAddress is in ROM_SPACE
474 bool PIC16TargetLowering::isRomAddress(const SDValue &Op) {
476 // RomAddress is a GlobalAddress in ROM_SPACE_
477 // If the Op is not a GlobalAddress return NULL without checking
479 if (!isDirectAddress(Op))
482 // Its a GlobalAddress.
483 // It is BUILD_PAIR((PIC16Lo TGA), (PIC16Hi TGA)) and Op is BUILD_PAIR
484 SDValue TGA = Op.getOperand(0).getOperand(0);
485 GlobalAddressSDNode *GSDN = dyn_cast<GlobalAddressSDNode>(TGA);
486 int AddrSpace = GSDN->getGlobal()->getType()->getAddressSpace();
488 if (AddrSpace == PIC16ISD::ROM_SPACE)
491 // Any other address space return it false
496 // GetExpandedParts - This function is on the similiar lines as
497 // the GetExpandedInteger in type legalizer is. This returns expanded
498 // parts of Op in Lo and Hi.
500 void PIC16TargetLowering::GetExpandedParts(SDValue Op, SelectionDAG &DAG,
501 SDValue &Lo, SDValue &Hi) {
502 SDNode *N = Op.getNode();
503 DebugLoc dl = N->getDebugLoc();
504 MVT NewVT = getTypeToTransformTo(N->getValueType(0));
506 // Extract the lo component.
507 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NewVT, Op,
508 DAG.getConstant(0, MVT::i8));
510 // extract the hi component
511 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NewVT, Op,
512 DAG.getConstant(1, MVT::i8));
515 // Legalize FrameIndex into ExternalSymbol and offset.
517 PIC16TargetLowering::LegalizeFrameIndex(SDValue Op, SelectionDAG &DAG,
518 SDValue &ES, int &Offset) {
520 MachineFunction &MF = DAG.getMachineFunction();
521 const Function *Func = MF.getFunction();
522 MachineFrameInfo *MFI = MF.getFrameInfo();
523 const std::string Name = Func->getName();
525 FrameIndexSDNode *FR = dyn_cast<FrameIndexSDNode>(Op);
527 // FrameIndices are not stack offsets. But they represent the request
528 // for space on stack. That space requested may be more than one byte.
529 // Therefore, to calculate the stack offset that a FrameIndex aligns
530 // with, we need to traverse all the FrameIndices available earlier in
531 // the list and add their requested size.
532 unsigned FIndex = FR->getIndex();
533 char *tmpName = new char [strlen(Name.c_str()) + 8];
534 if (FIndex < ReservedFrameCount) {
535 sprintf(tmpName, "%s.frame", Name.c_str());
536 ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
538 for (unsigned i=0; i<FIndex ; ++i) {
539 Offset += MFI->getObjectSize(i);
542 // FrameIndex has been made for some temporary storage
543 sprintf(tmpName, "%s.tmp", Name.c_str());
544 ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
545 Offset = GetTmpOffsetForFI(FIndex, MFI->getObjectSize(FIndex));
551 // This function legalizes the PIC16 Addresses. If the Pointer is
552 // -- Direct address variable residing
553 // --> then a Banksel for that variable will be created.
555 // --> then it will be treated as an indirect address.
556 // -- Indirect address
557 // --> then the address will be loaded into FSR
558 // -- ADD with constant operand
559 // --> then constant operand of ADD will be returned as Offset
560 // and non-constant operand of ADD will be treated as pointer.
561 // Returns the high and lo part of the address, and the offset(in case of ADD).
563 void PIC16TargetLowering::LegalizeAddress(SDValue Ptr, SelectionDAG &DAG,
564 SDValue &Lo, SDValue &Hi,
565 unsigned &Offset, DebugLoc dl) {
567 // Offset, by default, should be 0
570 // If the pointer is ADD with constant,
571 // return the constant value as the offset
572 if (Ptr.getOpcode() == ISD::ADD) {
573 SDValue OperLeft = Ptr.getOperand(0);
574 SDValue OperRight = Ptr.getOperand(1);
575 if (OperLeft.getOpcode() == ISD::Constant) {
576 Offset = dyn_cast<ConstantSDNode>(OperLeft)->getZExtValue();
578 } else if (OperRight.getOpcode() == ISD::Constant) {
579 Offset = dyn_cast<ConstantSDNode>(OperRight)->getZExtValue();
584 // If the pointer is Type i8 and an external symbol
585 // then treat it as direct address.
586 // One example for such case is storing and loading
587 // from function frame during a call
588 if (Ptr.getValueType() == MVT::i8) {
589 switch (Ptr.getOpcode()) {
590 case ISD::TargetExternalSymbol:
592 Hi = DAG.getConstant(1, MVT::i8);
597 // Expansion of FrameIndex has Lo/Hi parts
598 if (isDirectAddress(Ptr)) {
599 SDValue TFI = Ptr.getOperand(0).getOperand(0);
600 if (TFI.getOpcode() == ISD::TargetFrameIndex) {
602 LegalizeFrameIndex(TFI, DAG, Lo, FrameOffset);
603 Hi = DAG.getConstant(1, MVT::i8);
604 Offset += FrameOffset;
609 if (isDirectAddress(Ptr) && !isRomAddress(Ptr)) {
610 // Direct addressing case for RAM variables. The Hi part is constant
611 // and the Lo part is the TGA itself.
612 Lo = Ptr.getOperand(0).getOperand(0);
614 // For direct addresses Hi is a constant. Value 1 for the constant
615 // signifies that banksel needs to generated for it. Value 0 for
616 // the constant signifies that banksel does not need to be generated
617 // for it. Mark it as 1 now and optimize later.
618 Hi = DAG.getConstant(1, MVT::i8);
622 // Indirect addresses. Get the hi and lo parts of ptr.
623 GetExpandedParts(Ptr, DAG, Lo, Hi);
625 // Put the hi and lo parts into FSR.
626 Lo = DAG.getNode(PIC16ISD::MTLO, dl, MVT::i8, Lo);
627 Hi = DAG.getNode(PIC16ISD::MTHI, dl, MVT::i8, Hi);
632 SDValue PIC16TargetLowering::ExpandLoad(SDNode *N, SelectionDAG &DAG) {
633 LoadSDNode *LD = dyn_cast<LoadSDNode>(SDValue(N, 0));
634 SDValue Chain = LD->getChain();
635 SDValue Ptr = LD->getBasePtr();
636 DebugLoc dl = LD->getDebugLoc();
638 SDValue Load, Offset;
641 SDValue PtrLo, PtrHi;
644 // Legalize direct/indirect addresses. This will give the lo and hi parts
645 // of the address and the offset.
646 LegalizeAddress(Ptr, DAG, PtrLo, PtrHi, LoadOffset, dl);
648 // Load from the pointer (direct address or FSR)
649 VT = N->getValueType(0);
650 unsigned NumLoads = VT.getSizeInBits() / 8;
651 std::vector<SDValue> PICLoads;
653 MVT MemVT = LD->getMemoryVT();
654 if(ISD::isNON_EXTLoad(N)) {
655 for (iter=0; iter<NumLoads ; ++iter) {
656 // Add the pointer offset if any
657 Offset = DAG.getConstant(iter + LoadOffset, MVT::i8);
658 Tys = DAG.getVTList(MVT::i8, MVT::Other);
659 Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Chain, PtrLo, PtrHi,
661 PICLoads.push_back(Load);
664 // If it is extended load then use PIC16Load for Memory Bytes
665 // and for all extended bytes perform action based on type of
666 // extention - i.e. SignExtendedLoad or ZeroExtendedLoad
669 // For extended loads this is the memory value type
670 // i.e. without any extension
671 MVT MemVT = LD->getMemoryVT();
672 unsigned MemBytes = MemVT.getSizeInBits() / 8;
673 unsigned ExtdBytes = VT.getSizeInBits() / 8;
674 Offset = DAG.getConstant(LoadOffset, MVT::i8);
676 Tys = DAG.getVTList(MVT::i8, MVT::Other);
677 // For MemBytes generate PIC16Load with proper offset
678 for (iter=0; iter<MemBytes; ++iter) {
679 // Add the pointer offset if any
680 Offset = DAG.getConstant(iter + LoadOffset, MVT::i8);
681 Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Chain, PtrLo, PtrHi,
683 PICLoads.push_back(Load);
686 // For SignExtendedLoad
687 if (ISD::isSEXTLoad(N)) {
688 // For all ExtdBytes use the Right Shifted(Arithmetic) Value of the
690 SDValue SRA = DAG.getNode(ISD::SRA, dl, MVT::i8, Load,
691 DAG.getConstant(7, MVT::i8));
692 for (iter=MemBytes; iter<ExtdBytes; ++iter) {
693 PICLoads.push_back(SRA);
695 } else if (ISD::isZEXTLoad(N)) {
696 // ZeroExtendedLoad -- For all ExtdBytes use constant 0
697 SDValue ConstZero = DAG.getConstant(0, MVT::i8);
698 for (iter=MemBytes; iter<ExtdBytes; ++iter) {
699 PICLoads.push_back(ConstZero);
706 // Operand of Load is illegal -- Load itself is legal
709 else if (VT == MVT::i16) {
710 BP = DAG.getNode(ISD::BUILD_PAIR, dl, VT, PICLoads[0], PICLoads[1]);
711 if (MemVT == MVT::i8)
712 Chain = getChain(PICLoads[0]);
714 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
715 getChain(PICLoads[0]), getChain(PICLoads[1]));
716 } else if (VT == MVT::i32) {
718 BPs[0] = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i16,
719 PICLoads[0], PICLoads[1]);
720 BPs[1] = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i16,
721 PICLoads[2], PICLoads[3]);
722 BP = DAG.getNode(ISD::BUILD_PAIR, dl, VT, BPs[0], BPs[1]);
723 if (MemVT == MVT::i8)
724 Chain = getChain(PICLoads[0]);
725 else if (MemVT == MVT::i16)
726 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
727 getChain(PICLoads[0]), getChain(PICLoads[1]));
730 Chains[0] = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
731 getChain(PICLoads[0]), getChain(PICLoads[1]));
732 Chains[1] = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
733 getChain(PICLoads[2]), getChain(PICLoads[3]));
734 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
735 Chains[0], Chains[1]);
738 Tys = DAG.getVTList(VT, MVT::Other);
739 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys, BP, Chain);
742 SDValue PIC16TargetLowering::LowerShift(SDValue Op, SelectionDAG &DAG) {
743 // We should have handled larger operands in type legalizer itself.
744 assert (Op.getValueType() == MVT::i8 && "illegal shift to lower");
746 SDNode *N = Op.getNode();
747 SDValue Value = N->getOperand(0);
748 SDValue Amt = N->getOperand(1);
749 PIC16ISD::PIC16Libcall CallCode;
750 switch (N->getOpcode()) {
752 CallCode = PIC16ISD::SRA_I8;
755 CallCode = PIC16ISD::SLL_I8;
758 CallCode = PIC16ISD::SRL_I8;
761 assert ( 0 && "This shift is not implemented yet.");
764 SmallVector<SDValue, 2> Ops(2);
767 SDValue Call = MakePIC16Libcall(CallCode, N->getValueType(0), &Ops[0], 2,
768 true, DAG, N->getDebugLoc());
773 PIC16TargetLowering::LowerOperationWrapper(SDNode *N,
774 SmallVectorImpl<SDValue>&Results,
776 SDValue Op = SDValue(N, 0);
779 switch (Op.getOpcode()) {
780 case ISD::FORMAL_ARGUMENTS:
781 Res = LowerFORMAL_ARGUMENTS(Op, DAG); break;
783 Res = ExpandLoad(Op.getNode(), DAG); break;
785 Res = LowerCALL(Op, DAG); break;
787 // All other operations are handled in LowerOperation.
788 Res = LowerOperation(Op, DAG);
790 Results.push_back(Res);
797 unsigned NumValues = N->getNumValues();
798 for (i = 0; i < NumValues ; i++) {
799 Results.push_back(SDValue(N, i));
803 SDValue PIC16TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
804 switch (Op.getOpcode()) {
805 case ISD::FORMAL_ARGUMENTS:
806 return LowerFORMAL_ARGUMENTS(Op, DAG);
810 return LowerADD(Op, DAG);
814 return LowerSUB(Op, DAG);
816 return ExpandLoad(Op.getNode(), DAG);
818 return ExpandStore(Op.getNode(), DAG);
822 return LowerShift(Op, DAG);
826 return LowerBinOp(Op, DAG);
828 return LowerCALL(Op, DAG);
830 return LowerRET(Op, DAG);
832 return LowerBR_CC(Op, DAG);
834 return LowerSELECT_CC(Op, DAG);
839 SDValue PIC16TargetLowering::ConvertToMemOperand(SDValue Op,
842 assert (Op.getValueType() == MVT::i8
843 && "illegal value type to store on stack.");
845 MachineFunction &MF = DAG.getMachineFunction();
846 const Function *Func = MF.getFunction();
847 const std::string FuncName = Func->getName();
849 char *tmpName = new char [strlen(FuncName.c_str()) + 8];
851 // Put the value on stack.
852 // Get a stack slot index and convert to es.
853 int FI = MF.getFrameInfo()->CreateStackObject(1, 1);
854 sprintf(tmpName, "%s.tmp", FuncName.c_str());
855 SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
857 // Store the value to ES.
858 SDValue Store = DAG.getNode (PIC16ISD::PIC16Store, dl, MVT::Other,
861 DAG.getConstant (1, MVT::i8), // Banksel.
862 DAG.getConstant (GetTmpOffsetForFI(FI, 1),
865 // Load the value from ES.
866 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other);
867 SDValue Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Store,
868 ES, DAG.getConstant (1, MVT::i8),
869 DAG.getConstant (GetTmpOffsetForFI(FI, 1),
872 return Load.getValue(0);
875 SDValue PIC16TargetLowering::
876 LowerIndirectCallArguments(SDValue Op, SDValue Chain, SDValue InFlag,
877 SDValue DataAddr_Lo, SDValue DataAddr_Hi,
879 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
880 unsigned NumOps = TheCall->getNumArgs();
881 DebugLoc dl = TheCall->getDebugLoc();
883 // If call has no arguments then do nothing and return.
887 std::vector<SDValue> Ops;
888 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
889 SDValue Arg, StoreRet;
891 // For PIC16 ABI the arguments come after the return value.
892 unsigned RetVals = TheCall->getNumRetVals();
893 for (unsigned i = 0, ArgOffset = RetVals; i < NumOps; i++) {
895 Arg = TheCall->getArg(i);
898 Ops.push_back(Chain);
900 Ops.push_back(DataAddr_Lo);
901 Ops.push_back(DataAddr_Hi);
902 Ops.push_back(DAG.getConstant(ArgOffset, MVT::i8));
903 Ops.push_back(InFlag);
905 StoreRet = DAG.getNode (PIC16ISD::PIC16StWF, dl, Tys, &Ops[0], Ops.size());
907 Chain = getChain(StoreRet);
908 InFlag = getOutFlag(StoreRet);
914 SDValue PIC16TargetLowering::
915 LowerDirectCallArguments(SDValue Op, SDValue Chain, SDValue ArgLabel,
916 SDValue InFlag, SelectionDAG &DAG) {
917 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
918 unsigned NumOps = TheCall->getNumArgs();
919 DebugLoc dl = TheCall->getDebugLoc();
921 SDValue Arg, StoreAt;
926 // If call has no arguments then do nothing and return.
930 // FIXME: This portion of code currently assumes only
931 // primitive types being passed as arguments.
933 // Legalize the address before use
934 SDValue PtrLo, PtrHi;
935 unsigned AddressOffset;
937 LegalizeAddress(ArgLabel, DAG, PtrLo, PtrHi, AddressOffset, dl);
940 std::vector<SDValue> Ops;
941 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
942 for (unsigned i=ArgCount, Offset = 0; i<NumOps; i++) {
944 Arg = TheCall->getArg(i);
945 StoreOffset = (Offset + AddressOffset);
947 // Store the argument on frame
950 Ops.push_back(Chain);
952 Ops.push_back(PtrLo);
953 Ops.push_back(PtrHi);
954 Ops.push_back(DAG.getConstant(StoreOffset, MVT::i8));
955 Ops.push_back(InFlag);
957 StoreRet = DAG.getNode (PIC16ISD::PIC16StWF, dl, Tys, &Ops[0], Ops.size());
959 Chain = getChain(StoreRet);
960 InFlag = getOutFlag(StoreRet);
962 // Update the frame offset to be used for next argument
963 ArgVT = Arg.getValueType();
964 Size = ArgVT.getSizeInBits();
965 Size = Size/8; // Calculate size in bytes
966 Offset += Size; // Increase the frame offset
971 SDValue PIC16TargetLowering::
972 LowerIndirectCallReturn (SDValue Op, SDValue Chain, SDValue InFlag,
973 SDValue DataAddr_Lo, SDValue DataAddr_Hi,
975 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
976 DebugLoc dl = TheCall->getDebugLoc();
977 unsigned RetVals = TheCall->getNumRetVals();
979 // If call does not have anything to return
980 // then do nothing and go back.
984 // Call has something to return
985 std::vector<SDValue> ResultVals;
988 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other, MVT::Flag);
989 for(unsigned i=0;i<RetVals;i++) {
990 LoadRet = DAG.getNode(PIC16ISD::PIC16LdWF, dl, Tys, Chain, DataAddr_Lo,
991 DataAddr_Hi, DAG.getConstant(i, MVT::i8),
993 InFlag = getOutFlag(LoadRet);
994 Chain = getChain(LoadRet);
995 ResultVals.push_back(LoadRet);
997 ResultVals.push_back(Chain);
998 SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size(), dl);
1002 SDValue PIC16TargetLowering::
1003 LowerDirectCallReturn(SDValue Op, SDValue Chain, SDValue RetLabel,
1004 SDValue InFlag, SelectionDAG &DAG) {
1005 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
1006 DebugLoc dl = TheCall->getDebugLoc();
1007 // Currently handling primitive types only. They will come in
1009 unsigned RetVals = TheCall->getNumRetVals();
1011 std::vector<SDValue> ResultVals;
1013 // Return immediately if the return type is void
1017 // Call has something to return
1019 // Legalize the address before use
1022 LegalizeAddress(RetLabel, DAG, LdLo, LdHi, LdOffset, dl);
1024 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other, MVT::Flag);
1027 for(unsigned i=0, Offset=0;i<RetVals;i++) {
1029 LoadRet = DAG.getNode(PIC16ISD::PIC16LdWF, dl, Tys, Chain, LdLo, LdHi,
1030 DAG.getConstant(LdOffset + Offset, MVT::i8),
1033 InFlag = getOutFlag(LoadRet);
1035 Chain = getChain(LoadRet);
1037 ResultVals.push_back(LoadRet);
1040 // To return use MERGE_VALUES
1041 ResultVals.push_back(Chain);
1042 SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size(), dl);
1046 SDValue PIC16TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) {
1047 SDValue Chain = Op.getOperand(0);
1048 DebugLoc dl = Op.getDebugLoc();
1050 if (Op.getNumOperands() == 1) // return void
1053 // return should have odd number of operands
1054 if ((Op.getNumOperands() % 2) == 0 ) {
1055 assert(0 && "Do not know how to return this many arguments!");
1059 // Number of values to return
1060 unsigned NumRet = (Op.getNumOperands() / 2);
1062 // Function returns value always on stack with the offset starting
1064 MachineFunction &MF = DAG.getMachineFunction();
1065 const Function *F = MF.getFunction();
1066 std::string FuncName = F->getName();
1068 char *tmpName = new char [strlen(FuncName.c_str()) + 8];
1069 sprintf(tmpName, "%s.frame", FuncName.c_str());
1070 SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Other);
1071 SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
1072 SDValue BS = DAG.getConstant(1, MVT::i8);
1074 for(unsigned i=0;i<NumRet; ++i) {
1075 RetVal = Op.getNode()->getOperand(2*i + 1);
1076 Chain = DAG.getNode (PIC16ISD::PIC16Store, dl, MVT::Other, Chain, RetVal,
1078 DAG.getConstant (i, MVT::i8));
1081 return DAG.getNode(ISD::RET, dl, MVT::Other, Chain);
1084 // CALL node may have some operands non-legal to PIC16. Generate new CALL
1085 // node with all the operands legal.
1086 // Currently only Callee operand of the CALL node is non-legal. This function
1087 // legalizes the Callee operand and uses all other operands as are to generate
1090 SDValue PIC16TargetLowering::LegalizeCALL(SDValue Op, SelectionDAG &DAG) {
1091 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
1092 SDValue Chain = TheCall->getChain();
1093 SDValue Callee = TheCall->getCallee();
1094 DebugLoc dl = TheCall->getDebugLoc();
1097 assert(Callee.getValueType() == MVT::i16 &&
1098 "Don't know how to legalize this call node!!!");
1099 assert(Callee.getOpcode() == ISD::BUILD_PAIR &&
1100 "Don't know how to legalize this call node!!!");
1102 if (isDirectAddress(Callee)) {
1103 // Come here for direct calls
1104 Callee = Callee.getOperand(0).getOperand(0);
1106 // Come here for indirect calls
1108 // Indirect addresses. Get the hi and lo parts of ptr.
1109 GetExpandedParts(Callee, DAG, Lo, Hi);
1110 // Connect Lo and Hi parts of the callee with the PIC16Connect
1111 Callee = DAG.getNode(PIC16ISD::PIC16Connect, dl, MVT::i8, Lo, Hi);
1113 std::vector<SDValue> Ops;
1114 Ops.push_back(Chain);
1115 Ops.push_back(Callee);
1117 // Add the call arguments and their flags
1118 unsigned NumArgs = TheCall->getNumArgs();
1119 for(i=0;i<NumArgs;i++) {
1120 Ops.push_back(TheCall->getArg(i));
1121 Ops.push_back(TheCall->getArgFlagsVal(i));
1123 std::vector<MVT> NodeTys;
1124 unsigned NumRets = TheCall->getNumRetVals();
1125 for(i=0;i<NumRets;i++)
1126 NodeTys.push_back(TheCall->getRetValType(i));
1128 // Return a Chain as well
1129 NodeTys.push_back(MVT::Other);
1131 SDVTList VTs = DAG.getVTList(&NodeTys[0], NodeTys.size());
1132 // Generate new call with all the operands legal
1133 return DAG.getCall(TheCall->getCallingConv(), dl,
1134 TheCall->isVarArg(), TheCall->isTailCall(),
1135 TheCall->isInreg(), VTs, &Ops[0], Ops.size());
1138 void PIC16TargetLowering::
1139 GetDataAddress(DebugLoc dl, SDValue Callee, SDValue &Chain,
1140 SDValue &DataAddr_Lo, SDValue &DataAddr_Hi,
1141 SelectionDAG &DAG) {
1142 assert (Callee.getOpcode() == PIC16ISD::PIC16Connect
1143 && "Don't know what to do of such callee!!");
1144 SDValue ZeroOperand = DAG.getConstant(0, MVT::i8);
1145 SDValue SeqStart = DAG.getCALLSEQ_START(Chain, ZeroOperand);
1146 Chain = getChain(SeqStart);
1147 SDValue OperFlag = getOutFlag(SeqStart); // To manage the data dependency
1149 // Get the Lo and Hi part of code address
1150 SDValue Lo = Callee.getOperand(0);
1151 SDValue Hi = Callee.getOperand(1);
1153 SDValue Data_Lo, Data_Hi;
1154 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other, MVT::Flag);
1155 Hi = DAG.getNode(PIC16ISD::MTPCLATH, dl, MVT::i8, Hi);
1156 // Subtract 2 from Lo to get the Lower part of DataAddress.
1157 Data_Lo = DAG.getNode(ISD::SUB, dl, MVT::i8, Lo, DAG.getConstant(2, MVT::i8));
1158 Callee = DAG.getNode(PIC16ISD::PIC16Connect, dl, MVT::i8, Data_Lo, Hi);
1159 SDValue Call = DAG.getNode(PIC16ISD::CALLW, dl, Tys, Chain, Callee,
1161 Chain = getChain(Call);
1162 OperFlag = getOutFlag(Call);
1163 SDValue SeqEnd = DAG.getCALLSEQ_END(Chain, ZeroOperand, ZeroOperand,
1165 Chain = getChain(SeqEnd);
1166 OperFlag = getOutFlag(SeqEnd);
1168 // Low part of Data Address
1169 DataAddr_Lo = DAG.getNode(PIC16ISD::MTLO, dl, MVT::i8, Call, OperFlag);
1171 // Make the second call.
1172 SeqStart = DAG.getCALLSEQ_START(Chain, ZeroOperand);
1173 Chain = getChain(SeqStart);
1174 OperFlag = getOutFlag(SeqStart); // To manage the data dependency
1176 // Subtract 1 to Lo part for the second code word.
1177 Data_Lo = DAG.getNode(ISD::SUB, dl, MVT::i8, Lo, DAG.getConstant(1, MVT::i8));
1178 // Use new Lo to make another CALLW
1179 Callee = DAG.getNode(PIC16ISD::PIC16Connect, dl, MVT::i8, Data_Lo, Hi);
1180 Call = DAG.getNode(PIC16ISD::CALLW, dl, Tys, Chain, Callee, OperFlag);
1181 Chain = getChain(Call);
1182 OperFlag = getOutFlag(Call);
1183 SeqEnd = DAG.getCALLSEQ_END(Chain, ZeroOperand, ZeroOperand,
1185 Chain = getChain(SeqEnd);
1186 OperFlag = getOutFlag(SeqEnd);
1187 // Hi part of Data Address
1188 DataAddr_Hi = DAG.getNode(PIC16ISD::MTHI, dl, MVT::i8, Call, OperFlag);
1192 SDValue PIC16TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
1193 CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
1194 SDValue Chain = TheCall->getChain();
1195 SDValue Callee = TheCall->getCallee();
1196 DebugLoc dl = TheCall->getDebugLoc();
1197 if (Callee.getValueType() == MVT::i16 &&
1198 Callee.getOpcode() == ISD::BUILD_PAIR) {
1199 // Control should come here only from TypeLegalizer for lowering
1201 // Legalize the non-legal arguments of call and return the
1202 // new call with legal arguments.
1203 return LegalizeCALL(Op, DAG);
1205 // Control should come here from Legalize DAG.
1206 // Here all the operands of CALL node should be legal.
1208 // If this is an indirect call then to pass the arguments
1209 // and read the return value back, we need the data address
1210 // of the function being called.
1211 // To get the data address two more calls need to be made.
1213 // The flag to track if this is a direct or indirect call.
1214 bool IsDirectCall = true;
1215 unsigned RetVals = TheCall->getNumRetVals();
1216 unsigned NumArgs = TheCall->getNumArgs();
1218 SDValue DataAddr_Lo, DataAddr_Hi;
1219 if (Callee.getOpcode() == PIC16ISD::PIC16Connect) {
1220 IsDirectCall = false; // This is indirect call
1221 // Read DataAddress only if we have to pass arguments or
1222 // read return value.
1223 if ((RetVals > 0) || (NumArgs > 0))
1224 GetDataAddress(dl, Callee, Chain, DataAddr_Lo, DataAddr_Hi, DAG);
1227 SDValue ZeroOperand = DAG.getConstant(0, MVT::i8);
1229 // Start the call sequence.
1230 // Carring the Constant 0 along the CALLSEQSTART
1231 // because there is nothing else to carry.
1232 SDValue SeqStart = DAG.getCALLSEQ_START(Chain, ZeroOperand);
1233 Chain = getChain(SeqStart);
1234 SDValue OperFlag = getOutFlag(SeqStart); // To manage the data dependency
1237 // For any direct call - callee will be GlobalAddressNode or
1239 SDValue ArgLabel, RetLabel;
1241 // Considering the GlobalAddressNode case here.
1242 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
1243 GlobalValue *GV = G->getGlobal();
1244 Callee = DAG.getTargetGlobalAddress(GV, MVT::i8);
1245 Name = G->getGlobal()->getName();
1246 } else {// Considering the ExternalSymbol case here
1247 ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(Callee);
1248 Callee = DAG.getTargetExternalSymbol(ES->getSymbol(), MVT::i8);
1249 Name = ES->getSymbol();
1252 // Label for argument passing
1253 char *argFrame = new char [strlen(Name.c_str()) + 8];
1254 sprintf(argFrame, "%s.args", Name.c_str());
1255 ArgLabel = DAG.getTargetExternalSymbol(argFrame, MVT::i8);
1257 // Label for reading return value
1258 char *retName = new char [strlen(Name.c_str()) + 8];
1259 sprintf(retName, "%s.retval", Name.c_str());
1260 RetLabel = DAG.getTargetExternalSymbol(retName, MVT::i8);
1263 SDValue CodeAddr_Lo = Callee.getOperand(0);
1264 SDValue CodeAddr_Hi = Callee.getOperand(1);
1266 /*CodeAddr_Lo = DAG.getNode(ISD::ADD, dl, MVT::i8, CodeAddr_Lo,
1267 DAG.getConstant(2, MVT::i8));*/
1269 // move Hi part in PCLATH
1270 CodeAddr_Hi = DAG.getNode(PIC16ISD::MTPCLATH, dl, MVT::i8, CodeAddr_Hi);
1271 Callee = DAG.getNode(PIC16ISD::PIC16Connect, dl, MVT::i8, CodeAddr_Lo,
1275 // Pass the argument to function before making the call.
1278 CallArgs = LowerDirectCallArguments(Op, Chain, ArgLabel, OperFlag, DAG);
1279 Chain = getChain(CallArgs);
1280 OperFlag = getOutFlag(CallArgs);
1282 CallArgs = LowerIndirectCallArguments(Op, Chain, OperFlag, DataAddr_Lo,
1284 Chain = getChain(CallArgs);
1285 OperFlag = getOutFlag(CallArgs);
1288 SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
1289 SDValue PICCall = DAG.getNode(PIC16ISD::CALL, dl, Tys, Chain, Callee,
1291 Chain = getChain(PICCall);
1292 OperFlag = getOutFlag(PICCall);
1295 // Carrying the Constant 0 along the CALLSEQSTART
1296 // because there is nothing else to carry.
1297 SDValue SeqEnd = DAG.getCALLSEQ_END(Chain, ZeroOperand, ZeroOperand,
1299 Chain = getChain(SeqEnd);
1300 OperFlag = getOutFlag(SeqEnd);
1302 // Lower the return value reading after the call.
1304 return LowerDirectCallReturn(Op, Chain, RetLabel, OperFlag, DAG);
1306 return LowerIndirectCallReturn(Op, Chain, OperFlag, DataAddr_Lo,
1310 bool PIC16TargetLowering::isDirectLoad(const SDValue Op) {
1311 if (Op.getOpcode() == PIC16ISD::PIC16Load)
1312 if (Op.getOperand(1).getOpcode() == ISD::TargetGlobalAddress
1313 || Op.getOperand(1).getOpcode() == ISD::TargetExternalSymbol)
1318 // NeedToConvertToMemOp - Returns true if one of the operands of the
1319 // operation 'Op' needs to be put into memory. Also returns the
1320 // operand no. of the operand to be converted in 'MemOp'. Remember, PIC16 has
1321 // no instruction that can operation on two registers. Most insns take
1322 // one register and one memory operand (addwf) / Constant (addlw).
1323 bool PIC16TargetLowering::NeedToConvertToMemOp(SDValue Op, unsigned &MemOp) {
1324 // If one of the operand is a constant, return false.
1325 if (Op.getOperand(0).getOpcode() == ISD::Constant ||
1326 Op.getOperand(1).getOpcode() == ISD::Constant)
1329 // Return false if one of the operands is already a direct
1330 // load and that operand has only one use.
1331 if (isDirectLoad(Op.getOperand(0))) {
1332 if (Op.getOperand(0).hasOneUse())
1337 if (isDirectLoad(Op.getOperand(1))) {
1338 if (Op.getOperand(1).hasOneUse())
1346 // LowerBinOp - Lower a commutative binary operation that does not
1347 // affect status flag carry.
1348 SDValue PIC16TargetLowering::LowerBinOp(SDValue Op, SelectionDAG &DAG) {
1349 DebugLoc dl = Op.getDebugLoc();
1351 // We should have handled larger operands in type legalizer itself.
1352 assert (Op.getValueType() == MVT::i8 && "illegal Op to lower");
1355 if (NeedToConvertToMemOp(Op, MemOp)) {
1356 // Put one value on stack.
1357 SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG, dl);
1359 return DAG.getNode(Op.getOpcode(), dl, MVT::i8, Op.getOperand(MemOp ^ 1),
1367 // LowerADD - Lower all types of ADD operations including the ones
1368 // that affects carry.
1369 SDValue PIC16TargetLowering::LowerADD(SDValue Op, SelectionDAG &DAG) {
1370 // We should have handled larger operands in type legalizer itself.
1371 assert (Op.getValueType() == MVT::i8 && "illegal add to lower");
1372 DebugLoc dl = Op.getDebugLoc();
1374 if (NeedToConvertToMemOp(Op, MemOp)) {
1375 // Put one value on stack.
1376 SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG, dl);
1378 // ADDC and ADDE produces two results.
1379 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
1381 // ADDE has three operands, the last one is a flag.
1382 if (Op.getOpcode() == ISD::ADDE)
1383 return DAG.getNode(Op.getOpcode(), dl, Tys, Op.getOperand(MemOp ^ 1),
1384 NewVal, Op.getOperand(2));
1385 // ADDC has two operands.
1386 else if (Op.getOpcode() == ISD::ADDC)
1387 return DAG.getNode(Op.getOpcode(), dl, Tys, Op.getOperand(MemOp ^ 1),
1389 // ADD it is. It produces only one result.
1391 return DAG.getNode(Op.getOpcode(), dl, MVT::i8, Op.getOperand(MemOp ^ 1),
1394 else if (Op.getOpcode() == ISD::ADD)
1400 SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {
1401 DebugLoc dl = Op.getDebugLoc();
1402 // We should have handled larger operands in type legalizer itself.
1403 assert (Op.getValueType() == MVT::i8 && "illegal sub to lower");
1405 // Nothing to do if the first operand is already a direct load and it has
1407 if (isDirectLoad(Op.getOperand(0)) && Op.getOperand(0).hasOneUse())
1410 // Put first operand on stack.
1411 SDValue NewVal = ConvertToMemOperand (Op.getOperand(0), DAG, dl);
1413 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
1414 if (Op.getOpcode() == ISD::SUBE)
1415 return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1),
1418 return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1));
1421 void PIC16TargetLowering::InitReservedFrameCount(const Function *F) {
1422 unsigned NumArgs = F->arg_size();
1424 bool isVoidFunc = (F->getReturnType()->getTypeID() == Type::VoidTyID);
1427 ReservedFrameCount = NumArgs;
1429 ReservedFrameCount = NumArgs + 1;
1432 // LowerFORMAL_ARGUMENTS - Argument values are loaded from the
1433 // <fname>.args + offset. All arguments are already broken to leaglized
1434 // types, so the offset just runs from 0 to NumArgVals - 1.
1436 SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
1437 SelectionDAG &DAG) {
1438 SmallVector<SDValue, 8> ArgValues;
1439 unsigned NumArgVals = Op.getNode()->getNumValues() - 1;
1440 DebugLoc dl = Op.getDebugLoc();
1441 SDValue Chain = Op.getOperand(0); // Formal arguments' chain
1444 // Get the callee's name to create the <fname>.args label to pass args.
1445 MachineFunction &MF = DAG.getMachineFunction();
1446 const Function *F = MF.getFunction();
1447 std::string FuncName = F->getName();
1449 // Reset the map of FI and TmpOffset
1450 ResetTmpOffsetMap();
1451 // Initialize the ReserveFrameCount
1452 InitReservedFrameCount(F);
1454 // Create the <fname>.args external symbol.
1455 char *tmpName = new char [strlen(FuncName.c_str()) + 6];
1456 sprintf(tmpName, "%s.args", FuncName.c_str());
1457 SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
1459 // Load arg values from the label + offset.
1460 SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Other);
1461 SDValue BS = DAG.getConstant(1, MVT::i8);
1462 for (unsigned i = 0; i < NumArgVals ; ++i) {
1463 SDValue Offset = DAG.getConstant(i, MVT::i8);
1464 SDValue PICLoad = DAG.getNode(PIC16ISD::PIC16LdArg, dl, VTs, Chain, ES, BS,
1466 Chain = getChain(PICLoad);
1467 ArgValues.push_back(PICLoad);
1470 // Return a MERGE_VALUE node.
1471 ArgValues.push_back(Op.getOperand(0));
1472 return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(),
1473 &ArgValues[0], ArgValues.size()).getValue(Op.getResNo());
1476 // Perform DAGCombine of PIC16Load.
1477 // FIXME - Need a more elaborate comment here.
1478 SDValue PIC16TargetLowering::
1479 PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const {
1480 SelectionDAG &DAG = DCI.DAG;
1481 SDValue Chain = N->getOperand(0);
1482 if (N->hasNUsesOfValue(0, 0)) {
1483 DAG.ReplaceAllUsesOfValueWith(SDValue(N,1), Chain);
1488 // For all the functions with arguments some STORE nodes are generated
1489 // that store the argument on the frameindex. However in PIC16 the arguments
1490 // are passed on stack only. Therefore these STORE nodes are redundant.
1491 // To remove these STORE nodes will be removed in PerformStoreCombine
1493 // Currently this function is doint nothing and will be updated for removing
1494 // unwanted store operations
1495 SDValue PIC16TargetLowering::
1496 PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const {
1497 return SDValue(N, 0);
1499 // Storing an undef value is of no use, so remove it
1500 if (isStoringUndef(N, Chain, DAG)) {
1501 return Chain; // remove the store and return the chain
1503 //else everything is ok.
1504 return SDValue(N, 0);
1508 SDValue PIC16TargetLowering::PerformDAGCombine(SDNode *N,
1509 DAGCombinerInfo &DCI) const {
1510 switch (N->getOpcode()) {
1512 return PerformStoreCombine(N, DCI);
1513 case PIC16ISD::PIC16Load:
1514 return PerformPIC16LoadCombine(N, DCI);
1519 static PIC16CC::CondCodes IntCCToPIC16CC(ISD::CondCode CC) {
1521 default: assert(0 && "Unknown condition code!");
1522 case ISD::SETNE: return PIC16CC::NE;
1523 case ISD::SETEQ: return PIC16CC::EQ;
1524 case ISD::SETGT: return PIC16CC::GT;
1525 case ISD::SETGE: return PIC16CC::GE;
1526 case ISD::SETLT: return PIC16CC::LT;
1527 case ISD::SETLE: return PIC16CC::LE;
1528 case ISD::SETULT: return PIC16CC::ULT;
1529 case ISD::SETULE: return PIC16CC::LE;
1530 case ISD::SETUGE: return PIC16CC::GE;
1531 case ISD::SETUGT: return PIC16CC::UGT;
1535 // Look at LHS/RHS/CC and see if they are a lowered setcc instruction. If so
1536 // set LHS/RHS and SPCC to the LHS/RHS of the setcc and SPCC to the condition.
1537 static void LookThroughSetCC(SDValue &LHS, SDValue &RHS,
1538 ISD::CondCode CC, unsigned &SPCC) {
1539 if (isa<ConstantSDNode>(RHS) &&
1540 cast<ConstantSDNode>(RHS)->getZExtValue() == 0 &&
1542 (LHS.getOpcode() == PIC16ISD::SELECT_ICC &&
1543 LHS.getOperand(3).getOpcode() == PIC16ISD::SUBCC) &&
1544 isa<ConstantSDNode>(LHS.getOperand(0)) &&
1545 isa<ConstantSDNode>(LHS.getOperand(1)) &&
1546 cast<ConstantSDNode>(LHS.getOperand(0))->getZExtValue() == 1 &&
1547 cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue() == 0) {
1548 SDValue CMPCC = LHS.getOperand(3);
1549 SPCC = cast<ConstantSDNode>(LHS.getOperand(2))->getZExtValue();
1550 LHS = CMPCC.getOperand(0);
1551 RHS = CMPCC.getOperand(1);
1555 // Returns appropriate CMP insn and corresponding condition code in PIC16CC
1556 SDValue PIC16TargetLowering::getPIC16Cmp(SDValue LHS, SDValue RHS,
1557 unsigned CC, SDValue &PIC16CC,
1558 SelectionDAG &DAG, DebugLoc dl) {
1559 PIC16CC::CondCodes CondCode = (PIC16CC::CondCodes) CC;
1561 // PIC16 sub is literal - W. So Swap the operands and condition if needed.
1562 // i.e. a < 12 can be rewritten as 12 > a.
1563 if (RHS.getOpcode() == ISD::Constant) {
1572 CondCode = PIC16CC::GT;
1575 CondCode = PIC16CC::LT;
1578 CondCode = PIC16CC::UGT;
1581 CondCode = PIC16CC::ULT;
1584 CondCode = PIC16CC::LE;
1587 CondCode = PIC16CC::GE;
1590 CondCode = PIC16CC::UGE;
1593 CondCode = PIC16CC::ULE;
1598 PIC16CC = DAG.getConstant(CondCode, MVT::i8);
1600 // These are signed comparisons.
1601 SDValue Mask = DAG.getConstant(128, MVT::i8);
1602 if (isSignedComparison(CondCode)) {
1603 LHS = DAG.getNode (ISD::XOR, dl, MVT::i8, LHS, Mask);
1604 RHS = DAG.getNode (ISD::XOR, dl, MVT::i8, RHS, Mask);
1607 SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Flag);
1608 // We can use a subtract operation to set the condition codes. But
1609 // we need to put one operand in memory if required.
1610 // Nothing to do if the first operand is already a valid type (direct load
1611 // for subwf and literal for sublw) and it is used by this operation only.
1612 if ((LHS.getOpcode() == ISD::Constant || isDirectLoad(LHS))
1614 return DAG.getNode(PIC16ISD::SUBCC, dl, VTs, LHS, RHS);
1616 // else convert the first operand to mem.
1617 LHS = ConvertToMemOperand (LHS, DAG, dl);
1618 return DAG.getNode(PIC16ISD::SUBCC, dl, VTs, LHS, RHS);
1622 SDValue PIC16TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) {
1623 SDValue LHS = Op.getOperand(0);
1624 SDValue RHS = Op.getOperand(1);
1625 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
1626 SDValue TrueVal = Op.getOperand(2);
1627 SDValue FalseVal = Op.getOperand(3);
1628 unsigned ORIGCC = ~0;
1629 DebugLoc dl = Op.getDebugLoc();
1631 // If this is a select_cc of a "setcc", and if the setcc got lowered into
1632 // an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
1634 // A setcc: lhs, rhs, cc is expanded by llvm to
1635 // select_cc: result of setcc, 0, 1, 0, setne
1636 // We can think of it as:
1637 // select_cc: lhs, rhs, 1, 0, cc
1638 LookThroughSetCC(LHS, RHS, CC, ORIGCC);
1639 if (ORIGCC == ~0U) ORIGCC = IntCCToPIC16CC (CC);
1642 SDValue Cmp = getPIC16Cmp(LHS, RHS, ORIGCC, PIC16CC, DAG, dl);
1644 return DAG.getNode (PIC16ISD::SELECT_ICC, dl, TrueVal.getValueType(), TrueVal,
1645 FalseVal, PIC16CC, Cmp.getValue(1));
1649 PIC16TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
1650 MachineBasicBlock *BB) const {
1651 const TargetInstrInfo &TII = *getTargetMachine().getInstrInfo();
1652 unsigned CC = (PIC16CC::CondCodes)MI->getOperand(3).getImm();
1653 DebugLoc dl = MI->getDebugLoc();
1655 // To "insert" a SELECT_CC instruction, we actually have to insert the diamond
1656 // control-flow pattern. The incoming instruction knows the destination vreg
1657 // to set, the condition code register to branch on, the true/false values to
1658 // select between, and a branch opcode to use.
1659 const BasicBlock *LLVM_BB = BB->getBasicBlock();
1660 MachineFunction::iterator It = BB;
1667 // fallthrough --> copy0MBB
1668 MachineBasicBlock *thisMBB = BB;
1669 MachineFunction *F = BB->getParent();
1670 MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
1671 MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
1672 BuildMI(BB, dl, TII.get(PIC16::pic16brcond)).addMBB(sinkMBB).addImm(CC);
1673 F->insert(It, copy0MBB);
1674 F->insert(It, sinkMBB);
1676 // Update machine-CFG edges by transferring all successors of the current
1677 // block to the new block which will contain the Phi node for the select.
1678 sinkMBB->transferSuccessors(BB);
1679 // Next, add the true and fallthrough blocks as its successors.
1680 BB->addSuccessor(copy0MBB);
1681 BB->addSuccessor(sinkMBB);
1684 // %FalseValue = ...
1685 // # fallthrough to sinkMBB
1688 // Update machine-CFG edges
1689 BB->addSuccessor(sinkMBB);
1692 // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
1695 BuildMI(BB, dl, TII.get(PIC16::PHI), MI->getOperand(0).getReg())
1696 .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
1697 .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB);
1699 F->DeleteMachineInstr(MI); // The pseudo instruction is gone now.
1704 SDValue PIC16TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) {
1705 SDValue Chain = Op.getOperand(0);
1706 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
1707 SDValue LHS = Op.getOperand(2); // LHS of the condition.
1708 SDValue RHS = Op.getOperand(3); // RHS of the condition.
1709 SDValue Dest = Op.getOperand(4); // BB to jump to
1710 unsigned ORIGCC = ~0;
1711 DebugLoc dl = Op.getDebugLoc();
1713 // If this is a br_cc of a "setcc", and if the setcc got lowered into
1714 // an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
1715 LookThroughSetCC(LHS, RHS, CC, ORIGCC);
1716 if (ORIGCC == ~0U) ORIGCC = IntCCToPIC16CC (CC);
1718 // Get the Compare insn and condition code.
1720 SDValue Cmp = getPIC16Cmp(LHS, RHS, ORIGCC, PIC16CC, DAG, dl);
1722 return DAG.getNode(PIC16ISD::BRCOND, dl, MVT::Other, Chain, Dest, PIC16CC,