1 //===-- PIC16ISelLowering.h - PIC16 DAG Lowering Interface ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that PIC16 uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef PIC16ISELLOWERING_H
16 #define PIC16ISELLOWERING_H
19 #include "PIC16Subtarget.h"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/Target/TargetLowering.h"
27 // Start the numbering from where ISD NodeType finishes.
28 FIRST_NUMBER = ISD::BUILTIN_OP_END,
30 Lo, // Low 8-bits of GlobalAddress.
31 Hi, // High 8-bits of GlobalAddress.
33 PIC16LdArg, // This is replica of PIC16Load but used to load function
34 // arguments and is being used for facilitating for some
35 // store removal optimizations.
41 MTLO, // Move to low part of FSR
42 MTHI, // Move to high part of FSR
43 MTPCLATH, // Move to PCLATCH
44 PIC16Connect, // General connector for PIC16 nodes
46 LSLF, // PIC16 Logical shift left
47 LRLF, // PIC16 Logical shift right
48 RLF, // Rotate left through carry
49 RRF, // Rotate right through carry
50 CALL, // PIC16 Call instruction
51 CALLW, // PIC16 CALLW instruction
52 SUBCC, // Compare for equality or inequality.
53 SELECT_ICC, // Psuedo to be caught in schedular and expanded to brcond.
54 BRCOND, // Conditional branch.
59 // Keep track of different address spaces.
61 RAM_SPACE = 0, // RAM address space
62 ROM_SPACE = 1 // ROM address space number is 1
65 MUL_I8 = RTLIB::UNKNOWN_LIBCALL + 1,
74 //===--------------------------------------------------------------------===//
75 // TargetLowering Implementation
76 //===--------------------------------------------------------------------===//
77 class PIC16TargetLowering : public TargetLowering {
79 explicit PIC16TargetLowering(PIC16TargetMachine &TM);
81 /// getTargetNodeName - This method returns the name of a target specific
83 virtual const char *getTargetNodeName(unsigned Opcode) const;
84 /// getSetCCResultType - Return the ISD::SETCC ValueType
85 virtual MVT::SimpleValueType getSetCCResultType(EVT ValType) const;
86 SDValue LowerShift(SDValue Op, SelectionDAG &DAG);
87 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG);
88 SDValue LowerADD(SDValue Op, SelectionDAG &DAG);
89 SDValue LowerSUB(SDValue Op, SelectionDAG &DAG);
90 SDValue LowerBinOp(SDValue Op, SelectionDAG &DAG);
93 LowerDirectCallReturn(SDValue RetLabel, SDValue Chain, SDValue InFlag,
94 const SmallVectorImpl<ISD::InputArg> &Ins,
95 DebugLoc dl, SelectionDAG &DAG,
96 SmallVectorImpl<SDValue> &InVals);
98 LowerIndirectCallReturn(SDValue Chain, SDValue InFlag,
99 SDValue DataAddr_Lo, SDValue DataAddr_Hi,
100 const SmallVectorImpl<ISD::InputArg> &Ins,
101 DebugLoc dl, SelectionDAG &DAG,
102 SmallVectorImpl<SDValue> &InVals);
106 LowerDirectCallArguments(SDValue ArgLabel, SDValue Chain, SDValue InFlag,
107 const SmallVectorImpl<ISD::OutputArg> &Outs,
108 DebugLoc dl, SelectionDAG &DAG);
111 LowerIndirectCallArguments(SDValue Chain, SDValue InFlag,
112 SDValue DataAddr_Lo, SDValue DataAddr_Hi,
113 const SmallVectorImpl<ISD::OutputArg> &Outs,
114 const SmallVectorImpl<ISD::InputArg> &Ins,
115 DebugLoc dl, SelectionDAG &DAG);
117 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
118 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
119 SDValue getPIC16Cmp(SDValue LHS, SDValue RHS, unsigned OrigCC, SDValue &CC,
120 SelectionDAG &DAG, DebugLoc dl);
121 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
122 MachineBasicBlock *MBB,
123 DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
126 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
127 virtual void ReplaceNodeResults(SDNode *N,
128 SmallVectorImpl<SDValue> &Results,
130 virtual void LowerOperationWrapper(SDNode *N,
131 SmallVectorImpl<SDValue> &Results,
135 LowerFormalArguments(SDValue Chain,
136 CallingConv::ID CallConv,
138 const SmallVectorImpl<ISD::InputArg> &Ins,
139 DebugLoc dl, SelectionDAG &DAG,
140 SmallVectorImpl<SDValue> &InVals);
143 LowerCall(SDValue Chain, SDValue Callee,
144 CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
145 const SmallVectorImpl<ISD::OutputArg> &Outs,
146 const SmallVectorImpl<ISD::InputArg> &Ins,
147 DebugLoc dl, SelectionDAG &DAG,
148 SmallVectorImpl<SDValue> &InVals);
151 LowerReturn(SDValue Chain,
152 CallingConv::ID CallConv, bool isVarArg,
153 const SmallVectorImpl<ISD::OutputArg> &Outs,
154 DebugLoc dl, SelectionDAG &DAG);
156 SDValue ExpandStore(SDNode *N, SelectionDAG &DAG);
157 SDValue ExpandLoad(SDNode *N, SelectionDAG &DAG);
158 SDValue ExpandGlobalAddress(SDNode *N, SelectionDAG &DAG);
159 SDValue ExpandExternalSymbol(SDNode *N, SelectionDAG &DAG);
160 SDValue ExpandFrameIndex(SDNode *N, SelectionDAG &DAG);
162 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
163 SDValue PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
164 SDValue PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
166 // This function returns the Tmp Offset for FrameIndex. If any TmpOffset
167 // already exists for the FI then it returns the same else it creates the
168 // new offset and returns.
169 unsigned GetTmpOffsetForFI(unsigned FI, unsigned slot_size);
170 void ResetTmpOffsetMap() { FiTmpOffsetMap.clear(); SetTmpSize(0); }
171 void InitReservedFrameCount(const Function *F);
173 // Return the size of Tmp variable
174 unsigned GetTmpSize() { return TmpSize; }
175 void SetTmpSize(unsigned Size) { TmpSize = Size; }
177 /// getFunctionAlignment - Return the Log2 alignment of this function.
178 virtual unsigned getFunctionAlignment(const Function *) const {
179 // FIXME: The function never seems to be aligned.
183 // If the Node is a BUILD_PAIR representing a direct Address,
184 // then this function will return true.
185 bool isDirectAddress(const SDValue &Op);
187 // If the Node is a DirectAddress in ROM_SPACE then this
188 // function will return true
189 bool isRomAddress(const SDValue &Op);
191 // Extract the Lo and Hi component of Op.
192 void GetExpandedParts(SDValue Op, SelectionDAG &DAG, SDValue &Lo,
196 // Load pointer can be a direct or indirect address. In PIC16 direct
197 // addresses need Banksel and Indirect addresses need to be loaded to
198 // FSR first. Handle address specific cases here.
199 void LegalizeAddress(SDValue Ptr, SelectionDAG &DAG, SDValue &Chain,
200 SDValue &NewPtr, unsigned &Offset, DebugLoc dl);
202 // FrameIndex should be broken down into ExternalSymbol and FrameOffset.
203 void LegalizeFrameIndex(SDValue Op, SelectionDAG &DAG, SDValue &ES,
206 // For indirect calls data address of the callee frame need to be
207 // extracted. This function fills the arguments DataAddr_Lo and
208 // DataAddr_Hi with the address of the callee frame.
209 void GetDataAddress(DebugLoc dl, SDValue Callee, SDValue &Chain,
210 SDValue &DataAddr_Lo, SDValue &DataAddr_Hi,
213 // We can not have both operands of a binary operation in W.
214 // This function is used to put one operand on stack and generate a load.
215 SDValue ConvertToMemOperand(SDValue Op, SelectionDAG &DAG, DebugLoc dl);
217 // This function checks if we need to put an operand of an operation on
218 // stack and generate a load or not.
219 bool NeedToConvertToMemOp(SDValue Op, unsigned &MemOp);
221 /// Subtarget - Keep a pointer to the PIC16Subtarget around so that we can
222 /// make the right decision when generating code for different targets.
223 const PIC16Subtarget *Subtarget;
226 // Extending the LIB Call framework of LLVM
227 // to hold the names of PIC16Libcalls.
228 const char *PIC16LibcallNames[PIC16ISD::PIC16UnknownCall];
230 // To set and retrieve the lib call names.
231 void setPIC16LibcallName(PIC16ISD::PIC16Libcall Call, const char *Name);
232 const char *getPIC16LibcallName(PIC16ISD::PIC16Libcall Call);
234 // Make PIC16 Libcall.
235 SDValue MakePIC16Libcall(PIC16ISD::PIC16Libcall Call, EVT RetVT,
236 const SDValue *Ops, unsigned NumOps, bool isSigned,
237 SelectionDAG &DAG, DebugLoc dl);
239 // Check if operation has a direct load operand.
240 inline bool isDirectLoad(const SDValue Op);
243 // The frameindexes generated for spill/reload are stack based.
244 // This maps maintain zero based indexes for these FIs.
245 std::map<unsigned, unsigned> FiTmpOffsetMap;
248 // These are the frames for return value and argument passing
249 // These FrameIndices will be expanded to foo.frame external symbol
250 // and all others will be expanded to foo.tmp external symbol.
251 unsigned ReservedFrameCount;
255 #endif // PIC16ISELLOWERING_H