1 //===-- PIC16ISelLowering.h - PIC16 DAG Lowering Interface ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that PIC16 uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef PIC16ISELLOWERING_H
16 #define PIC16ISELLOWERING_H
19 #include "PIC16Subtarget.h"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/CodeGen/SelectionDAGISel.h"
22 #include "llvm/Target/TargetLowering.h"
28 // Start the numbering from where ISD NodeType finishes.
29 FIRST_NUMBER = ISD::BUILTIN_OP_END,
31 Lo, // Low 8-bits of GlobalAddress.
32 Hi, // High 8-bits of GlobalAddress.
34 PIC16LdArg, // This is replica of PIC16Load but used to load function
35 // arguments and is being used for facilitating for some
36 // store removal optimizations.
42 MTLO, // Move to low part of FSR
43 MTHI, // Move to high part of FSR
44 MTPCLATH, // Move to PCLATCH
45 PIC16Connect, // General connector for PIC16 nodes
47 LSLF, // PIC16 Logical shift left
48 LRLF, // PIC16 Logical shift right
49 RLF, // Rotate left through carry
50 RRF, // Rotate right through carry
51 CALL, // PIC16 Call instruction
52 CALLW, // PIC16 CALLW instruction
53 SUBCC, // Compare for equality or inequality.
54 SELECT_ICC, // Psuedo to be caught in schedular and expanded to brcond.
55 BRCOND, // Conditional branch.
60 // Keep track of different address spaces.
62 RAM_SPACE = 0, // RAM address space
63 ROM_SPACE = 1 // ROM address space number is 1
66 MUL_I8 = RTLIB::UNKNOWN_LIBCALL + 1,
75 //===--------------------------------------------------------------------===//
76 // TargetLowering Implementation
77 //===--------------------------------------------------------------------===//
78 class PIC16TargetLowering : public TargetLowering {
80 explicit PIC16TargetLowering(PIC16TargetMachine &TM);
82 /// getTargetNodeName - This method returns the name of a target specific
84 virtual const char *getTargetNodeName(unsigned Opcode) const;
85 /// getSetCCResultType - Return the ISD::SETCC ValueType
86 virtual MVT::SimpleValueType getSetCCResultType(EVT ValType) const;
87 virtual MVT::SimpleValueType getCmpLibcallReturnType() const;
88 SDValue LowerShift(SDValue Op, SelectionDAG &DAG);
89 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG);
90 SDValue LowerADD(SDValue Op, SelectionDAG &DAG);
91 SDValue LowerSUB(SDValue Op, SelectionDAG &DAG);
92 SDValue LowerBinOp(SDValue Op, SelectionDAG &DAG);
95 LowerDirectCallReturn(SDValue RetLabel, SDValue Chain, SDValue InFlag,
96 const SmallVectorImpl<ISD::InputArg> &Ins,
97 DebugLoc dl, SelectionDAG &DAG,
98 SmallVectorImpl<SDValue> &InVals);
100 LowerIndirectCallReturn(SDValue Chain, SDValue InFlag,
101 SDValue DataAddr_Lo, SDValue DataAddr_Hi,
102 const SmallVectorImpl<ISD::InputArg> &Ins,
103 DebugLoc dl, SelectionDAG &DAG,
104 SmallVectorImpl<SDValue> &InVals);
108 LowerDirectCallArguments(SDValue ArgLabel, SDValue Chain, SDValue InFlag,
109 const SmallVectorImpl<ISD::OutputArg> &Outs,
110 DebugLoc dl, SelectionDAG &DAG);
113 LowerIndirectCallArguments(SDValue Chain, SDValue InFlag,
114 SDValue DataAddr_Lo, SDValue DataAddr_Hi,
115 const SmallVectorImpl<ISD::OutputArg> &Outs,
116 const SmallVectorImpl<ISD::InputArg> &Ins,
117 DebugLoc dl, SelectionDAG &DAG);
119 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
120 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
121 SDValue getPIC16Cmp(SDValue LHS, SDValue RHS, unsigned OrigCC, SDValue &CC,
122 SelectionDAG &DAG, DebugLoc dl);
123 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
124 MachineBasicBlock *MBB,
125 DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
128 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
129 virtual void ReplaceNodeResults(SDNode *N,
130 SmallVectorImpl<SDValue> &Results,
132 virtual void LowerOperationWrapper(SDNode *N,
133 SmallVectorImpl<SDValue> &Results,
137 LowerFormalArguments(SDValue Chain,
138 CallingConv::ID CallConv,
140 const SmallVectorImpl<ISD::InputArg> &Ins,
141 DebugLoc dl, SelectionDAG &DAG,
142 SmallVectorImpl<SDValue> &InVals);
145 LowerCall(SDValue Chain, SDValue Callee,
146 CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
147 const SmallVectorImpl<ISD::OutputArg> &Outs,
148 const SmallVectorImpl<ISD::InputArg> &Ins,
149 DebugLoc dl, SelectionDAG &DAG,
150 SmallVectorImpl<SDValue> &InVals);
153 LowerReturn(SDValue Chain,
154 CallingConv::ID CallConv, bool isVarArg,
155 const SmallVectorImpl<ISD::OutputArg> &Outs,
156 DebugLoc dl, SelectionDAG &DAG);
158 SDValue ExpandStore(SDNode *N, SelectionDAG &DAG);
159 SDValue ExpandLoad(SDNode *N, SelectionDAG &DAG);
160 SDValue ExpandGlobalAddress(SDNode *N, SelectionDAG &DAG);
161 SDValue ExpandExternalSymbol(SDNode *N, SelectionDAG &DAG);
162 SDValue ExpandFrameIndex(SDNode *N, SelectionDAG &DAG);
164 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
165 SDValue PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
166 SDValue PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
168 // This function returns the Tmp Offset for FrameIndex. If any TmpOffset
169 // already exists for the FI then it returns the same else it creates the
170 // new offset and returns.
171 unsigned GetTmpOffsetForFI(unsigned FI, unsigned slot_size);
172 void ResetTmpOffsetMap() { FiTmpOffsetMap.clear(); SetTmpSize(0); }
173 void InitReservedFrameCount(const Function *F);
175 // Return the size of Tmp variable
176 unsigned GetTmpSize() { return TmpSize; }
177 void SetTmpSize(unsigned Size) { TmpSize = Size; }
179 /// getFunctionAlignment - Return the Log2 alignment of this function.
180 virtual unsigned getFunctionAlignment(const Function *) const {
181 // FIXME: The function never seems to be aligned.
185 // If the Node is a BUILD_PAIR representing a direct Address,
186 // then this function will return true.
187 bool isDirectAddress(const SDValue &Op);
189 // If the Node is a DirectAddress in ROM_SPACE then this
190 // function will return true
191 bool isRomAddress(const SDValue &Op);
193 // Extract the Lo and Hi component of Op.
194 void GetExpandedParts(SDValue Op, SelectionDAG &DAG, SDValue &Lo,
198 // Load pointer can be a direct or indirect address. In PIC16 direct
199 // addresses need Banksel and Indirect addresses need to be loaded to
200 // FSR first. Handle address specific cases here.
201 void LegalizeAddress(SDValue Ptr, SelectionDAG &DAG, SDValue &Chain,
202 SDValue &NewPtr, unsigned &Offset, DebugLoc dl);
204 // FrameIndex should be broken down into ExternalSymbol and FrameOffset.
205 void LegalizeFrameIndex(SDValue Op, SelectionDAG &DAG, SDValue &ES,
208 // For indirect calls data address of the callee frame need to be
209 // extracted. This function fills the arguments DataAddr_Lo and
210 // DataAddr_Hi with the address of the callee frame.
211 void GetDataAddress(DebugLoc dl, SDValue Callee, SDValue &Chain,
212 SDValue &DataAddr_Lo, SDValue &DataAddr_Hi,
215 // We can not have both operands of a binary operation in W.
216 // This function is used to put one operand on stack and generate a load.
217 SDValue ConvertToMemOperand(SDValue Op, SelectionDAG &DAG, DebugLoc dl);
219 // This function checks if we need to put an operand of an operation on
220 // stack and generate a load or not.
221 // DAG parameter is required to access DAG information during
223 bool NeedToConvertToMemOp(SDValue Op, unsigned &MemOp, SelectionDAG &DAG);
225 /// Subtarget - Keep a pointer to the PIC16Subtarget around so that we can
226 /// make the right decision when generating code for different targets.
227 const PIC16Subtarget *Subtarget;
230 // Extending the LIB Call framework of LLVM
231 // to hold the names of PIC16Libcalls.
232 const char *PIC16LibcallNames[PIC16ISD::PIC16UnknownCall];
234 // To set and retrieve the lib call names.
235 void setPIC16LibcallName(PIC16ISD::PIC16Libcall Call, const char *Name);
236 const char *getPIC16LibcallName(PIC16ISD::PIC16Libcall Call);
238 // Make PIC16 Libcall.
239 SDValue MakePIC16Libcall(PIC16ISD::PIC16Libcall Call, EVT RetVT,
240 const SDValue *Ops, unsigned NumOps, bool isSigned,
241 SelectionDAG &DAG, DebugLoc dl);
243 // Check if operation has a direct load operand.
244 inline bool isDirectLoad(const SDValue Op);
247 // Keep a pointer to SelectionDAGISel to access its public
248 // interface (It is required during legalization)
249 SelectionDAGISel *ISel;
252 // The frameindexes generated for spill/reload are stack based.
253 // This maps maintain zero based indexes for these FIs.
254 std::map<unsigned, unsigned> FiTmpOffsetMap;
257 // These are the frames for return value and argument passing
258 // These FrameIndices will be expanded to foo.frame external symbol
259 // and all others will be expanded to foo.tmp external symbol.
260 unsigned ReservedFrameCount;
264 #endif // PIC16ISELLOWERING_H