1 //===- PIC16RegisterInfo.cpp - PIC16 Register Information -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the PIC16 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "pic16-reg-info"
17 #include "PIC16RegisterInfo.h"
18 #include "llvm/Constants.h"
19 #include "llvm/Function.h"
20 #include "llvm/Type.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineLocation.h"
27 #include "llvm/CodeGen/ValueTypes.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/Target/TargetFrameInfo.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Target/TargetOptions.h"
37 // FIXME: add subtarget support.
38 PIC16RegisterInfo::PIC16RegisterInfo(const TargetInstrInfo &tii)
39 : PIC16GenRegisterInfo(PIC16::ADJCALLSTACKDOWN, PIC16::ADJCALLSTACKUP),
42 /// getRegisterNumbering - Given the enum value for some register, e.g.
43 /// PIC16::RA, return the number that it corresponds to (e.g. 31).
44 unsigned PIC16RegisterInfo::
45 getRegisterNumbering(unsigned RegEnum)
47 assert (RegEnum <= 31 && "Unknown register number!");
51 void PIC16RegisterInfo::
52 copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
53 unsigned DestReg, unsigned SrcReg,
54 const TargetRegisterClass *RC) const
59 void PIC16RegisterInfo::reMaterialize(MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator I,
62 const MachineInstr *Orig) const
64 MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
65 MI->getOperand(0).setReg(DestReg);
69 MachineInstr *PIC16RegisterInfo::
70 foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FI) const
72 MachineInstr *NewMI = NULL;
76 //===----------------------------------------------------------------------===//
78 // Callee Saved Registers methods
80 //===----------------------------------------------------------------------===//
82 /// PIC16 Callee Saved Registers
83 const unsigned* PIC16RegisterInfo::
84 getCalleeSavedRegs(const MachineFunction *MF) const
86 // PIC16 calle-save register range is $16-$26(s0-s7)
87 static const unsigned CalleeSavedRegs[] = { 0 };
88 return CalleeSavedRegs;
91 /// PIC16 Callee Saved Register Classes
92 const TargetRegisterClass* const*
93 PIC16RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const
95 static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 0 };
96 return CalleeSavedRegClasses;
99 BitVector PIC16RegisterInfo::
100 getReservedRegs(const MachineFunction &MF) const
102 BitVector Reserved(getNumRegs());
106 //===----------------------------------------------------------------------===//
108 // Stack Frame Processing methods
109 // +----------------------------+
111 // FIXME: Add stack layout description here.
114 //===----------------------------------------------------------------------===//
116 // hasFP - Return true if the specified function should have a dedicated frame
117 // pointer register. This is true if the function has variable sized allocas or
118 // if frame pointer elimination is disabled.
119 bool PIC16RegisterInfo::
120 hasFP(const MachineFunction &MF) const {
124 // This function eliminate ADJCALLSTACKDOWN,
125 // ADJCALLSTACKUP pseudo instructions
126 void PIC16RegisterInfo::
127 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
128 MachineBasicBlock::iterator I) const {
129 // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
133 // FrameIndex represent objects inside a abstract stack.
134 // We must replace FrameIndex with an stack/frame pointer
136 void PIC16RegisterInfo::
137 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
138 RegScavenger *RS) const
140 MachineInstr &MI = *II;
141 MachineFunction &MF = *MI.getParent()->getParent();
144 while (!MI.getOperand(i).isFrameIndex()) {
146 assert(i < MI.getNumOperands() &&
147 "Instr doesn't have FrameIndex operand!");
150 int FrameIndex = MI.getOperand(i).getIndex();
151 int stackSize = MF.getFrameInfo()->getStackSize();
152 int spOffset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
154 DOUT << "\nFunction : " << MF.getFunction()->getName() << "\n";
155 DOUT << "<--------->\n";
159 DOUT << "FrameIndex : " << FrameIndex << "\n";
160 DOUT << "spOffset : " << spOffset << "\n";
161 DOUT << "stackSize : " << stackSize << "\n";
163 // As explained on LowerFORMAL_ARGUMENTS, detect negative offsets
164 // and adjust SPOffsets considering the final stack size.
165 int Offset = ((spOffset < 0) ? (stackSize + (-(spOffset+4))) : (spOffset));
167 DOUT << "Offset : " << Offset << "\n";
168 DOUT << "<--------->\n";
170 // MI.getOperand(i+1).ChangeToImmediate(Offset);
171 MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false);
174 void PIC16RegisterInfo::
175 emitPrologue(MachineFunction &MF) const
179 void PIC16RegisterInfo::
180 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
184 void PIC16RegisterInfo::
185 processFunctionBeforeFrameFinalized(MachineFunction &MF) const
189 unsigned PIC16RegisterInfo::
190 getRARegister() const {
191 assert(0 && "What is the return address register");
195 unsigned PIC16RegisterInfo::
196 getFrameRegister(MachineFunction &MF) const {
197 return PIC16::STKPTR;
200 unsigned PIC16RegisterInfo::
201 getEHExceptionRegister() const {
202 assert(0 && "What is the exception register");
206 unsigned PIC16RegisterInfo::
207 getEHHandlerRegister() const {
208 assert(0 && "What is the exception handler register");
212 int PIC16RegisterInfo::
213 getDwarfRegNum(unsigned RegNum, bool isEH) const {
214 assert(0 && "What is the dwarf register number");
219 #include "PIC16GenRegisterInfo.inc"